JPH01138761A - Formation of very fine electrode - Google Patents

Formation of very fine electrode

Info

Publication number
JPH01138761A
JPH01138761A JP29600487A JP29600487A JPH01138761A JP H01138761 A JPH01138761 A JP H01138761A JP 29600487 A JP29600487 A JP 29600487A JP 29600487 A JP29600487 A JP 29600487A JP H01138761 A JPH01138761 A JP H01138761A
Authority
JP
Japan
Prior art keywords
resist
formation
pattern
electrode
negative resist
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP29600487A
Other languages
Japanese (ja)
Inventor
Norihiko Samoto
典彦 佐本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP29600487A priority Critical patent/JPH01138761A/en
Publication of JPH01138761A publication Critical patent/JPH01138761A/en
Pending legal-status Critical Current

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  • Electrodes Of Semiconductors (AREA)
  • Drying Of Semiconductors (AREA)
  • Junction Field-Effect Transistors (AREA)

Abstract

PURPOSE:To realize a low-resistance electrode whereto off-setting may be applied with facility by a method wherein a positive resist layer is formed on a negative resist pattern formation surface and the positive resist is so exposed to light and developed that the negative resist edge and the substrate surface may be exposed visible. CONSTITUTION:A negative resist 11 is applied to a substrate, and exposure and development are accomplished for the formation of a desired resist pattern. A positive resist 12 is applied to cover the negative resist 11. The positive resist 12 is exposed to light and developed, which involves the edge of the negative resist 11, for the formation of a double-crank resist pattern. A process follows where in a metal layer 13 is directionally formed by evaporation for the formation of an electrode. The vapor-deposited metal layer 13 is removed from on the resists 11 and 12 in an organic liquid or oxygen plasma for the realization of a double-crank electrode 14.

Description

【発明の詳細な説明】 [産業上の利用分野] 本発明は微細電(への形成法に関し、特に抵抗の低減化
されたF字型微細電極の形成法に関する。
DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention relates to a method for forming a microelectrode, and more particularly to a method for forming an F-shaped microelectrode with reduced resistance.

[従来の技術] 従来、微細電極の抵抗を下げる電極の形成方法トシテ、
持分U31−77370q公報rパターン形成X]に記
載の方法が知られている。前記公報記載の形成法を第2
図(a)〜(C)に示す。即ら、まず第2図(a)に示
すように低感度のポジ型レジスト21を基板20上に塗
布し、ついで高感度のポジ型レジスト22を上記低感度
ポジ型レジスト21土に塗布し、電子線23により露光
する。次いで現像して、マツシュルーム型(丁型)のレ
ジストパターンを17だ後、第2図(b)に示すように
金属24を蒸着し、有機洗浄によりレジス1〜21.2
2およびレジス1〜22上の蒸着金属24を除去するこ
とによって、第2図(C)に示すようにマツシュルーム
型(丁型)の電極25が形成され、電極抵抗の低減化が
図られている。
[Prior art] Conventionally, methods for forming electrodes that reduce the resistance of fine electrodes have been proposed.
The method described in Patent Publication U31-77370q Pattern Formation X is known. The formation method described in the above publication was used as the second method.
Shown in Figures (a) to (C). That is, first, as shown in FIG. 2(a), a low-sensitivity positive resist 21 is coated on the substrate 20, and then a high-sensitivity positive resist 22 is coated on the low-sensitivity positive resist 21. Exposure is performed by an electron beam 23. Next, development was performed to form a pine mushroom-shaped resist pattern 17, after which a metal 24 was vapor-deposited as shown in FIG.
2 and the vapor deposited metal 24 on the resists 1 to 22, a mushroom-shaped electrode 25 is formed as shown in FIG. 2(C), and the electrode resistance is reduced. .

[発明が解決しようとする問題点1 以上述べた形・成仏は、電4※の抵抗が小さくできる点
で従来の単層レジストによって形成された電極に比べて
改善されているものの、高感度レジメ1へを用いている
ため、両側への電極の張出しが生じ、オフセットをかけ
るのが困1′i:″あった。
[Problem to be Solved by the Invention 1] Although the above-mentioned shape and formation are improved compared to electrodes formed using conventional single-layer resist in that the resistance of the electrode 4* can be reduced, it is not possible to use a high-sensitivity regimen. 1, the electrodes protrude to both sides, making it difficult to apply an offset.

本発明の目的は、このような従来の欠点を除去せしめて
、オフセットをかけやすく、かつ抵抗の低減化された電
極の形成法を提供覆ることにおる。
An object of the present invention is to eliminate such conventional drawbacks and provide a method for forming an electrode that is easy to offset and has reduced resistance.

[問題点を解決覆るための手段1 本発明は、半導体基板上にネガ型しジメ1〜による所定
のパターンを形成する工程と、前記パターン形成面上に
ポジ型レジスト層を形成する工程と、首記ネガ型レジメ
1〜端部を含むネガ型レジスト面および基板面が共に露
光11るように前記ポジをレジス1〜を露光・現像して
所定のパターンを形成づる工程と、前記パターン形成面
上に方向性を有して金属を蒸着する工程と、前記各レジ
ストおよびポジ型レジスト上の金属を除去して断面[−
字型の金属パターンを形成する工程とを備えてなること
を特徴とする微細電極の形成法でおる。
[Means for Solving and Overcoming Problems 1] The present invention comprises a step of forming a predetermined pattern using a negative resist layer 1 on a semiconductor substrate, and a step of forming a positive resist layer on the pattern formation surface. A step of exposing and developing the positive resist 1 to form a predetermined pattern so that both the negative resist surface including the ends of the negative resist 1 and the substrate surface are exposed 11 to light, and forming a predetermined pattern on the pattern forming surface. A step of evaporating metal on the resist with directionality, and removing the metal on each of the resists and the positive resist to form a cross section [-
A method for forming a microelectrode is characterized by comprising a step of forming a letter-shaped metal pattern.

[作用1 本発明においては、ネガ型レジストによるパターン而お
よび半導体基板面が共に露ソするように単層のポジ型レ
ジストの露光が行われるので、金属を蒸着することによ
りネガ型レジストの存在する方向に張出しが生じ、「型
の低抵抗電極が形成できる。一方、ネガ型レジストの存
在しない方向には、電極の張出しが存在しないので、こ
の方向へのオフセットがかけやすくなる。また、ポジ型
レジストを露光できるパターンの幅が小さくできなくて
も、基板と接する部分での電極幅を小さくすることがで
きる。
[Operation 1] In the present invention, a single layer of positive resist is exposed so that both the negative resist pattern and the semiconductor substrate surface are exposed. An overhang occurs in the direction, allowing the formation of a low-resistance electrode.On the other hand, since there is no overhang of the electrode in the direction where there is no negative resist, it is easier to offset in this direction. Even if the width of the pattern that can expose the resist cannot be made small, the electrode width at the portion in contact with the substrate can be made small.

[実施例] 次に、図面を参照して、本発明の実施例について説明す
る。
[Example] Next, an example of the present invention will be described with reference to the drawings.

第1図(a)〜(e)は本発明による工程の一例を承り
概略断面図である。まず、第1図(a)に示すように基
板上にネガ型レジスト11(例えば、東し社製、α−C
MS (R))を塗布した後、露光・現像を行って所定
のレジストパターンを形成する。
FIGS. 1(a) to 1(e) are schematic sectional views showing an example of the process according to the present invention. First, as shown in FIG.
After applying MS (R), exposure and development are performed to form a predetermined resist pattern.

次いで第1図(b)に示すように上記ネガ型レジスト1
1を覆うようにポジ型しジスl−12(例えばシラプレ
ー社製、MP−2415)を塗イhする。その後、第1
図(C)に示すように、ネガ型レジスト11の端部を含
むように、ポジ型レジスト12を露光し、現Sすること
によって、[型のレジス1へパターンを得ることができ
る。次いで第1図((1)に示1ように、方向f(を持
たせて電極となる金属13を蒸着する。次いで第1図(
e)に示すように、有機洗浄あるいはtmN (02)
プラズマによってレジメ1−11および12並びにレジ
スト11および12上の蒸着金属13を除去することに
よって[′型の電極14を1qることができる。
Next, as shown in FIG. 1(b), the negative resist 1 is applied.
1, and apply a positive cast film 1-12 (for example, MP-2415 manufactured by Silapray Co., Ltd.). Then the first
As shown in Figure (C), by exposing the positive resist 12 so as to include the ends of the negative resist 11 and performing S, a pattern can be obtained on the resist 1 of the [type]. Next, as shown in FIG.
e) Organic cleaning or tmN (02)
By removing the deposited metal 13 on the regimes 1-11 and 12 and the resists 11 and 12 using plasma, the ['-type electrode 14 can be made 1q.

[発明の効果] 以」二説明したように、本発明においては、一方におい
て電極の張出しを形成できるので低抵抗の電]〜が形成
できると共に、ネガ型しジメ上の存在しない方向には電
44疼の張出しが存在しないので、この方向へのオフセ
ットがかけやすくなる。また、ポジ型しジス1への露光
パターンとネガ型レジストパターンの手ね合U早を制御
することで、基板と接する部分の電極の幅を調整できる
等の効果を有する。
[Effects of the Invention] As explained above, in the present invention, since an overhang of the electrode can be formed on one side, a low-resistance electric current can be formed. Since there is no overhang of the 44-inch, it is easier to offset in this direction. In addition, by controlling the speed at which the exposure pattern on the positive resist 1 and the negative resist pattern are brought together, the width of the electrode in contact with the substrate can be adjusted.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明による工程の一例を承り概略断面図、第
2図は従来例による電(へ形成工程の一例を示す概略断
面図である。 10.20・・・基板     11・・・ネガ型レジ
スト12・・・ポジ型しジスl−13,24・・・蒸着
金属14.25・・・電極 21・・・低感度ポジ型レジスト 22・・・高感度ポジ型レジスト 23・・・電子線
Fig. 1 is a schematic sectional view showing an example of the process according to the present invention, and Fig. 2 is a schematic sectional view showing an example of the electrode forming process according to the conventional example. 10.20...Substrate 11...Negative Type resist 12...Positive type resist l-13, 24...Vapor deposited metal 14.25...Electrode 21...Low sensitivity positive type resist 22...High sensitivity positive type resist 23...Electronic line

Claims (1)

【特許請求の範囲】[Claims] (1)半導体基板上にネガ型レジストによる所定のパタ
ーンを形成する工程と、前記パターン形成面上にポジ型
レジスト層を形成する工程と、前記ネガ型レジスト端部
を含むネガ型レジスト面および基板面が共に露呈するよ
うに前記ポジ型レジストを露光・現像して所定のパター
ンを形成する工程と、前記パターン形成面上に方向性を
有して金属を蒸着する工程と、前記各レジストおよびポ
ジ型レジスト上の金属を除去して断面T字型の金属パタ
ーンを形成する工程とを備えてなることを特徴とする微
細電極の形成法。
(1) A step of forming a predetermined pattern using a negative resist on a semiconductor substrate, a step of forming a positive resist layer on the pattern formation surface, and a negative resist surface including the negative resist end and the substrate. a step of exposing and developing the positive resist to form a predetermined pattern so that both surfaces are exposed; a step of evaporating metal with directionality on the pattern forming surface; 1. A method for forming a microelectrode, comprising the step of removing metal on a mold resist to form a metal pattern having a T-shaped cross section.
JP29600487A 1987-11-26 1987-11-26 Formation of very fine electrode Pending JPH01138761A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP29600487A JPH01138761A (en) 1987-11-26 1987-11-26 Formation of very fine electrode

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP29600487A JPH01138761A (en) 1987-11-26 1987-11-26 Formation of very fine electrode

Publications (1)

Publication Number Publication Date
JPH01138761A true JPH01138761A (en) 1989-05-31

Family

ID=17827885

Family Applications (1)

Application Number Title Priority Date Filing Date
JP29600487A Pending JPH01138761A (en) 1987-11-26 1987-11-26 Formation of very fine electrode

Country Status (1)

Country Link
JP (1) JPH01138761A (en)

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