JPH04168730A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To simplify a manufacturing process, to remove a defective pattern and to form a stable gate electrode by forming a low-resistance gate electrode having a T shape by using the resist of a single layer, which can be silylated. CONSTITUTION:The upper section of a semiconductor substrate 1a, to which an ohmic electrode 2 is shaped, is coated with a resist c6a, a photosensitive section of which can be silylated, a desired region is exposed, and a silylated layer 6b is formed. The resist of a non-exposure section (a region not silylated) is etched up to desired thickness and a pattern is formed, and one part of a thinned region is bored. A recess groove 1c is shaped, a gate metal is evaporated on the whole surface, and a gate electrode 5 is formed through lift-off. Accordingly, the low-resistance gate electrode 5 having a T shape is formed, thus simplifying a manufacturing process while preventing a defective pattern due to the mixing of the resist, then forming the stable gate electrode 5.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention particularly relates to a method of manufacturing a semiconductor device that forms a gate electrode with low gate resistance.

[Conventional technology]

FIG. 2 is a diagram showing a conventional semiconductor device having T-shaped electrodes. In the figure, 1a is a semiconductor substrate, lb is an active layer formed on the semiconductor substrate 1a by ion implantation, etc., and IC is a semiconductor substrate. 2 is an ohmic electrode, 3 is a resist A that determines the gate length,
4 is a resist B that determines the size of the gate electrode head, and 5 is a gate electrode.

Next, the manufacturing method will be explained.

First, as shown in FIG. 2(a), a resist A3 is placed on a semiconductor substrate la on which an active layer 1b and an ohmic electrode 2 are formed in advance.
The upper layer is coated with a thickness of about 1,000 to 3,000 layers,
Resist B4 is applied to a thickness of about 5,000 to 10,000 layers.

Next, as shown in FIG. 1 (bl), an open pattern of the resist B4 is formed in a region that will become the head of the gate electrode 5.

Next, as shown in FIG. 3C, a minute opening of about 0.1 to 0.3 μm is formed in the resist A3 using an electron beam direct writing method or the like.

Next, as shown in FIG. 4(d), after forming a recess groove IC, a gate metal 5 is deposited over the entire surface and lifted off to form a pattern as shown in FIG. 4(e).

[Problem to be solved by the invention]

Conventional semiconductor device manufacturing methods are configured as described above, so the process is complicated, the upper layer resist and the lower layer resist are likely to mix, and the uniformity and reproducibility of fine patterns are low. There was a problem.

This invention has been made to solve the above-mentioned problems, and provides a manufacturing method capable of obtaining a semiconductor device having a T-shaped gate electrode with low gate resistance using a single layer of resist. With the goal.

[Means to solve the problem]

A method for manufacturing a semiconductor device according to the present invention uses a silylatable single-layer resist, exposes a region other than the gate electrode head, selectively silylates the exposed region, and then silylates the exposed region. The resist in the unetched area is etched to a desired depth, and an opening for determining the gate length is formed to obtain a T-shaped gate electrode.

[Effect]

In the present invention, by silylating only the surface of the resist other than the portion where the gate electrode is to be formed, it is possible to form a two-step pattern using a single layer resist to form a T-shaped gate electrode.

〔Example〕

An embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 is a cross-sectional view showing a method of manufacturing a semiconductor device according to an embodiment of the present invention. In the figure, 1a is a semiconductor substrate, lb is an active layer formed by ion implantation or the like on the semiconductor substrate Ia, and 1c 2 is a recess groove formed on the semiconductor substrate Ia, 2 is an ohmic electrode, 5 is a gate electrode, 6a is a resist C16b is a region in which the resist C6a is silylated.

As shown in FIG. 2(a), the active layer 1b and A u G e /N i / formed in advance by Si+ implantation, etc.
On a semiconductor substrate Ia on which an ohmic electrode 2 such as a laminated metal of Au is formed, a resist C6a whose photosensitive portion can be silylated is applied to a thickness of about 5000 to 10000.
Expose the desired area. Next, HMD S (Hexame
The photosensitive area is silylated using thyldisilazane (hexamethyldisilazane) or the like ((b) in the same figure).

Next, the resist in the unexposed areas (non-silylated areas) is etched to the desired thickness using 02RIE or the like.
A pattern as shown in FIG. 2(C) is formed.

Next, as shown in FIG. 4(d), a part of the thinned region is opened using an electron beam direct writing method or the like. Next, the same figure (e)
After forming the recess groove 1c using tartaric acid or the like, the gate metal 5 is deposited on the entire surface and lifted off, as shown in the figure).
You will get a pattern like .

In this example, as described above, silylatable single-layer resists 1 to 1 are used, and after selectively silylating the area other than the area that is to become the gate electrode head, the resist in the non-silylated area is A low-resistance gate electrode with a T-shape is formed by etching to a desired depth, forming an opening to determine the gate length, and forming the electrode by lift-off, which simplifies the manufacturing process and allows multiple A stable gate electrode can be formed without pattern defects due to resist mixing.

〔Effect of the invention〕

As described above, according to the present invention, a low-resistance gate electrode having a T-shape is formed using a single layer of resist that can be silylated. This has the effect that a stable gate electrode can be formed without pattern defects due to

[Brief explanation of drawings]

FIG. 1 is a sectional view showing a method of manufacturing a semiconductor device according to an embodiment of the present invention, and FIG. 2 is a sectional view showing a conventional method of manufacturing a semiconductor device of this type. In the figure, Ia is a semiconductor substrate, 1b is an active layer, 1c is a recess groove, 2 is an ohmic electrode, 3 is a resist A, 4 is a resist B, 5 is a gate electrode, 6a is a resist C, 6b
is the silylated layer of resist C. Note that the same reference numerals in the figures indicate the same or equivalent parts.

Claims (1)

[Claims] (1) In a method for manufacturing a semiconductor device that includes a step of forming a gate electrode having a T-shape, the gate electrode forming step uses a resist that can be silylated, and silylation is performed in a region other than a region that will become the head of the T-shaped structure. etching the resist in non-silylated regions to a desired thickness; and opening a desired region in the thinned region of the resist. A method for manufacturing a semiconductor device.