JPH01138697A - Nonvolatile semiconductor memory - Google Patents
Nonvolatile semiconductor memoryInfo
- Publication number
- JPH01138697A JPH01138697A JP62296358A JP29635887A JPH01138697A JP H01138697 A JPH01138697 A JP H01138697A JP 62296358 A JP62296358 A JP 62296358A JP 29635887 A JP29635887 A JP 29635887A JP H01138697 A JPH01138697 A JP H01138697A
- Authority
- JP
- Japan
- Prior art keywords
- memory
- counter
- semiconductor memory
- time
- output
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 9
- 230000001186 cumulative effect Effects 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000012544 monitoring process Methods 0.000 description 1
Landscapes
- For Increasing The Reliability Of Semiconductor Memories (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
- Read Only Memory (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は電気的に消去可能な不揮発性半導体メモリに関
し、特にその書込回数による寿命を外部より知る手段を
有するメモリに関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an electrically erasable nonvolatile semiconductor memory, and more particularly to a memory having means for externally determining its life span based on the number of writes.
従来、この種の不揮発性半導体メモリは消去回数、書込
み回数に制限があるが、外部から知る手段がなかった。Conventionally, this type of non-volatile semiconductor memory has a limit on the number of times it can be erased and written, but there was no way to know this from the outside.
従って6、実際に使用して不具合が生じるまでわからな
いという欠点がある。Therefore, there is a drawback that it is not known until a problem occurs during actual use.
本発明の目的は前記問題点を解消した不揮発性半導体メ
モリを提供することにある。An object of the present invention is to provide a nonvolatile semiconductor memory that solves the above problems.
本発明は電気的に消去可能な不揮発性半導体メモリにお
いて、書込み回数を計数する計数器と、該計数値を記憶
する不揮発性記憶部と、外部から該計数値を読み出す手
段とを含むことを特徴とする不揮発性半導体メモリであ
る。The present invention is an electrically erasable non-volatile semiconductor memory characterized by including a counter for counting the number of writes, a non-volatile storage section for storing the counted value, and means for reading the counted value from the outside. This is a non-volatile semiconductor memory.
次に、本発明について図面を参照して説明する。 Next, the present invention will be explained with reference to the drawings.
第1図は本発明の一実施例のブロック図である。FIG. 1 is a block diagram of one embodiment of the present invention.
1は本来の不揮発性メモリ、2は書込み回数を計数する
カウンタ、3はカウンタ2の出力を記憶する不揮発性メ
モリでその出力32はカウンタ2の入力21に接続され
ている。4は消去回路である。1 is an original non-volatile memory, 2 is a counter for counting the number of writes, and 3 is a non-volatile memory for storing the output of the counter 2, the output 32 of which is connected to the input 21 of the counter 2. 4 is an erase circuit.
カウンタ2の出力22は不揮発性メモリ3の入力31と
同時に出力端子23にも出力する。ただし本数はn本と
する。不揮発性メモリ3の消去入力33には消去回路4
の出力42が接続され、消去回路4の入力41は内部端
子に接続されている。The output 22 of the counter 2 is output to the output terminal 23 at the same time as the input 31 of the nonvolatile memory 3. However, the number is n. The erase input 33 of the nonvolatile memory 3 includes an erase circuit 4.
The output 42 of the erase circuit 4 is connected, and the input 41 of the erase circuit 4 is connected to an internal terminal.
次に、その動作について説明する。Next, its operation will be explained.
まず内部端子41から消去回路4を駆動し、不揮発性メ
モリ3を初期設定する。これは−回のみ実施するので外
部端子に出して誤操作により再び消去することをさける
ことが望ましい。そして不揮発性メモリ1を消去する際
にも不揮発性メモリ3は消去されない。First, the erase circuit 4 is driven from the internal terminal 41 to initialize the nonvolatile memory 3. Since this is performed only one time, it is desirable to output the data to an external terminal to avoid erasing it again due to an erroneous operation. Even when nonvolatile memory 1 is erased, nonvolatile memory 3 is not erased.
次に不揮発性メモリ3の出力(現在0に初期設定されて
いる)をカウンタ2にロードする。その後、不揮発性メ
モリ1を消去、書込みを行うたびにカウンタ2を1回づ
つアップする。然る後、電源がrOFFJになることを
検出した場合はカウンタ2の内容を不揮発性メモリ3に
書込む。逆に電源がroNJになることを検出したら、
不揮発性メモリ3の内容をカウンタ2にロードする。後
は同様にして不揮発性メモリ1を消去、書込みするたび
に1回カウンタ2をアップする。このようにして不揮発
性メモリ1に対する総書込み回数、すなわち累積書込み
回数が不揮発性メモリ3に記憶される。Next, the output of the non-volatile memory 3 (currently initialized to 0) is loaded into the counter 2. Thereafter, the counter 2 is incremented by one each time the nonvolatile memory 1 is erased or written. After that, when it is detected that the power becomes rOFFJ, the contents of the counter 2 are written to the nonvolatile memory 3. Conversely, if it detects that the power supply becomes roNJ,
Load the contents of non-volatile memory 3 into counter 2. After that, the counter 2 is incremented once each time the nonvolatile memory 1 is erased or written in the same manner. In this way, the total number of writes to the nonvolatile memory 1, ie, the cumulative number of writes, is stored in the nonvolatile memory 3.
以上説明したように本発明は、累積書込み回数を出力端
子からモニターすることにより電気的書込み制限回数を
超えたかどうが知ることができ、従って実際に不良にな
る前に取り換え等の手を打つことで事前に事故を防止で
きる効果を有するものである。As explained above, in the present invention, by monitoring the cumulative number of writes from the output terminal, it is possible to know whether the electrical write limit has been exceeded, and therefore, it is possible to take measures such as replacement before an actual failure occurs. This has the effect of preventing accidents in advance.
第1図は本発明の一実施例を示すブロック図である。
1.3・・・不揮発性メモリ 2・・・カウンタ4・
・・消去回路FIG. 1 is a block diagram showing one embodiment of the present invention. 1.3...Nonvolatile memory 2...Counter 4.
・Erasing circuit
Claims (1)
て、書込み回数を計数する計数器と、該計数値を記憶す
る不揮発性記憶部と、外部から該計数値を読み出す手段
とを含むことを特徴とする不揮発性半導体メモリ。(1) An electrically erasable nonvolatile semiconductor memory, characterized by including a counter that counts the number of writes, a nonvolatile storage section that stores the counted value, and means for reading the counted value from the outside. Non-volatile semiconductor memory.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62296358A JPH01138697A (en) | 1987-11-25 | 1987-11-25 | Nonvolatile semiconductor memory |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62296358A JPH01138697A (en) | 1987-11-25 | 1987-11-25 | Nonvolatile semiconductor memory |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH01138697A true JPH01138697A (en) | 1989-05-31 |
Family
ID=17832518
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP62296358A Pending JPH01138697A (en) | 1987-11-25 | 1987-11-25 | Nonvolatile semiconductor memory |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH01138697A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0493999U (en) * | 1990-12-27 | 1992-08-14 |
-
1987
- 1987-11-25 JP JP62296358A patent/JPH01138697A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0493999U (en) * | 1990-12-27 | 1992-08-14 |
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