JPH01133765U - - Google Patents
Info
- Publication number
- JPH01133765U JPH01133765U JP2934388U JP2934388U JPH01133765U JP H01133765 U JPH01133765 U JP H01133765U JP 2934388 U JP2934388 U JP 2934388U JP 2934388 U JP2934388 U JP 2934388U JP H01133765 U JPH01133765 U JP H01133765U
- Authority
- JP
- Japan
- Prior art keywords
- glass layer
- electrode lands
- wiring pattern
- covered
- substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000011521 glass Substances 0.000 claims description 5
- 239000000758 substrate Substances 0.000 claims description 3
Landscapes
- Non-Metallic Protective Coatings For Printed Circuits (AREA)
Description
第１図は、本考案の実施例を示す電子部品を仮
想線で示した厚膜回路基板の平面図、第２図は第
１図のＡ―Ａ線断面図、第３図は、従来例を示す
電子部品を仮想線で示した厚膜回路基板の平面図
、第４図は第１図のＢ―Ｂ線断面図である。
１１……絶縁基板、１２……電子部品、１３…
…電子部品の電極、１４……電極ランド、１５…
…配線パターン、１６……オーバーコートガラス
層、１７……クロスガラス層。
FIG. 1 is a plan view of a thick film circuit board showing an electronic component according to an embodiment of the present invention with imaginary lines, FIG. 2 is a sectional view taken along line AA in FIG. 1, and FIG. 3 is a conventional example. FIG. 4 is a plan view of a thick film circuit board showing electronic components indicated by virtual lines, and FIG. 4 is a sectional view taken along the line BB in FIG. 11...Insulating substrate, 12...Electronic component, 13...
...Electrode of electronic component, 14... Electrode land, 15...
...Wiring pattern, 16...Overcoat glass layer, 17...Cross glass layer.
Claims (1)
１２の電極１３，１３を半田付けする電極ランド
１４，１４と、この電極ランド１４，１４の近傍
を通過する配線パターン１５とを有する厚膜回路
基板において、前記配線パターン１５の少なくと
も電極ランド１４，１４の近傍がクロスガラス層
１７で覆われ、さらにこのクロスガラス層１７が
オーバーコートガラス層１６で覆われたことを特
徴とする厚膜回路基板。 A thick film having electrode lands 14, 14 to which electrodes 13, 13 of mounted electronic components 12 are soldered on an insulating substrate 11, and a wiring pattern 15 passing near the electrode lands 14, 14. In the circuit board, at least the vicinity of the electrode lands 14, 14 of the wiring pattern 15 is covered with a cross glass layer 17, and the cross glass layer 17 is further covered with an overcoat glass layer 16. substrate.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2934388U JPH01133765U (en) | 1988-03-05 | 1988-03-05 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2934388U JPH01133765U (en) | 1988-03-05 | 1988-03-05 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH01133765U true JPH01133765U (en) | 1989-09-12 |
Family
ID=31253475
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2934388U Pending JPH01133765U (en) | 1988-03-05 | 1988-03-05 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH01133765U (en) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5648196A (en) * | 1979-09-28 | 1981-05-01 | Hitachi Ltd | Hybrid integrated circuit board |
-
1988
- 1988-03-05 JP JP2934388U patent/JPH01133765U/ja active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5648196A (en) * | 1979-09-28 | 1981-05-01 | Hitachi Ltd | Hybrid integrated circuit board |
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