JPH01127846U - - Google Patents

Info

Publication number
JPH01127846U
JPH01127846U JP1988024189U JP2418988U JPH01127846U JP H01127846 U JPH01127846 U JP H01127846U JP 1988024189 U JP1988024189 U JP 1988024189U JP 2418988 U JP2418988 U JP 2418988U JP H01127846 U JPH01127846 U JP H01127846U
Authority
JP
Japan
Prior art keywords
line
light emitting
emitting diode
driving
individual
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1988024189U
Other languages
English (en)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1988024189U priority Critical patent/JPH01127846U/ja
Publication of JPH01127846U publication Critical patent/JPH01127846U/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L24/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49175—Parallel arrangements

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Dot-Matrix Printers And Others (AREA)
  • Printers Or Recording Devices Using Electromagnetic And Radiation Means (AREA)
  • Exposure Or Original Feeding In Electrophotography (AREA)

Description

【図面の簡単な説明】
第１図は本考案の光プリンタヘツドの一実施例
を示す部分拡大平面図、第２図は第１図のＹ―Ｙ
線断面図、第３図は従来の光プリンタヘツドの部
分拡大平面図、第４図は第３図のＸ―Ｘ線断面図
である。 １：電記絶縁性基板、２：共通電力線、３：個
別駆動線、４：制御信号線、５：個別電力線、６
：発光ダイオード素子、７：駆動用ＩＣ素子、４
ａ：ＩＣ素子電源線、１０：抵抗素子。

Claims (1)

    【実用新案登録請求の範囲】
  1. 電気絶縁性基板の一表面上に、(a) 一対の電
    極を有する複数個の発光ダイオード素子と、(b)
    該発光ダイオード素子の一方の電極に共通に接
    続される共通電力線と、(c) 前記発光ダイオー
    ド素子の他方の電極に接続される個別駆動線と、
    (d) 前記個別駆動線の他端に接続される駆動用
    ＩＣ素子と、(e) 該駆動用ＩＣ素子に接続され
    る制御信号線、ＩＣ素子電源線及び個別電力線と
    を取着形成して成る光プリンタヘツドにおいて、
    前記制御信号線とＩＣ素子電源線との間に抵抗素
    子を接続したことを特徴とする光プリンタヘツド
    。
JP1988024189U 1988-02-25 1988-02-25 Pending JPH01127846U (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1988024189U JPH01127846U (ja) 1988-02-25 1988-02-25

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1988024189U JPH01127846U (ja) 1988-02-25 1988-02-25

Publications (1)

Publication Number Publication Date
JPH01127846U true JPH01127846U (ja) 1989-08-31

Family

ID=31243827

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1988024189U Pending JPH01127846U (ja) 1988-02-25 1988-02-25

Country Status (1)

Country Link
JP (1) JPH01127846U (ja)

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