JPH01125555U - - Google Patents
Info
- Publication number
- JPH01125555U JPH01125555U JP1988020470U JP2047088U JPH01125555U JP H01125555 U JPH01125555 U JP H01125555U JP 1988020470 U JP1988020470 U JP 1988020470U JP 2047088 U JP2047088 U JP 2047088U JP H01125555 U JPH01125555 U JP H01125555U
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor chip
- wiring board
- chip mounting
- metal foil
- device characterized
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
- H10W72/531—Shapes of wire connectors
- H10W72/536—Shapes of wire connectors the connected ends being ball-shaped
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
- H10W90/754—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL
Landscapes
- Wire Bonding (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1988020470U JP2554059Y2 (ja) | 1988-02-18 | 1988-02-18 | 半導体装置の実装構造 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1988020470U JP2554059Y2 (ja) | 1988-02-18 | 1988-02-18 | 半導体装置の実装構造 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH01125555U true JPH01125555U (enExample) | 1989-08-28 |
| JP2554059Y2 JP2554059Y2 (ja) | 1997-11-12 |
Family
ID=31236865
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1988020470U Expired - Lifetime JP2554059Y2 (ja) | 1988-02-18 | 1988-02-18 | 半導体装置の実装構造 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2554059Y2 (enExample) |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS59132641U (ja) * | 1983-02-25 | 1984-09-05 | 日本電気株式会社 | 半導体装置用基板 |
| JPS60154543A (ja) * | 1984-01-24 | 1985-08-14 | Nec Corp | 合成樹脂基板を用いた半導体装置 |
| JPS62235799A (ja) * | 1986-04-07 | 1987-10-15 | 日本電気株式会社 | 混成集積回路装置 |
-
1988
- 1988-02-18 JP JP1988020470U patent/JP2554059Y2/ja not_active Expired - Lifetime
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS59132641U (ja) * | 1983-02-25 | 1984-09-05 | 日本電気株式会社 | 半導体装置用基板 |
| JPS60154543A (ja) * | 1984-01-24 | 1985-08-14 | Nec Corp | 合成樹脂基板を用いた半導体装置 |
| JPS62235799A (ja) * | 1986-04-07 | 1987-10-15 | 日本電気株式会社 | 混成集積回路装置 |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2554059Y2 (ja) | 1997-11-12 |