JPH01120331U - - Google Patents
Info
- Publication number
- JPH01120331U JPH01120331U JP1482188U JP1482188U JPH01120331U JP H01120331 U JPH01120331 U JP H01120331U JP 1482188 U JP1482188 U JP 1482188U JP 1482188 U JP1482188 U JP 1482188U JP H01120331 U JPH01120331 U JP H01120331U
- Authority
- JP
- Japan
- Prior art keywords
- pellet
- hole
- semiconductor
- semiconductor pellet
- semiconductor device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 claims description 9
- 239000008188 pellet Substances 0.000 claims description 7
- 238000000465 moulding Methods 0.000 claims 1
- 239000011347 resin Substances 0.000 claims 1
- 229920005989 resin Polymers 0.000 claims 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1515—Shape
- H01L2924/15151—Shape the die mounting substrate comprising an aperture, e.g. for underfilling, outgassing, window type wire connections
Landscapes
- Wire Bonding (AREA)
- Die Bonding (AREA)
Description
第1図は本考案の一実施例にかかる半導体装置
の一部破断斜視図、第2図は同実施例のペレツト
のワイヤボンデイング時を示す横断面図、第3図
は本考案の他の実施例にかかる半導体装置の一部
破断斜視図、第4図は同実施例の要部縦断面図、
第5図は本考案の更に他の実施例にかかる半導体
装置の一部破断斜視図、第6図は従来の半導体装
置の要部断面図である。 1,10,20…半導体装置、2…ペレツト、
2a…電極、3a…ペレツトマウント部、3b…
リード、4…透孔。
の一部破断斜視図、第2図は同実施例のペレツト
のワイヤボンデイング時を示す横断面図、第3図
は本考案の他の実施例にかかる半導体装置の一部
破断斜視図、第4図は同実施例の要部縦断面図、
第5図は本考案の更に他の実施例にかかる半導体
装置の一部破断斜視図、第6図は従来の半導体装
置の要部断面図である。 1,10,20…半導体装置、2…ペレツト、
2a…電極、3a…ペレツトマウント部、3b…
リード、4…透孔。
Claims (1)
- 透孔を有するペレツトマウント部に、前記透孔
を閉塞する状態で半導体ペレツトを載置し、半導
体ペレツト上の電極と、一端を半導体ペレツト近
傍に配設したリードとを電気的に接続して樹脂モ
ールドしたことを特徴とする半導体装置。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1988014821U JPH062264Y2 (ja) | 1988-02-05 | 1988-02-05 | 半導体装置 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1988014821U JPH062264Y2 (ja) | 1988-02-05 | 1988-02-05 | 半導体装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH01120331U true JPH01120331U (ja) | 1989-08-15 |
JPH062264Y2 JPH062264Y2 (ja) | 1994-01-19 |
Family
ID=31226352
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1988014821U Expired - Lifetime JPH062264Y2 (ja) | 1988-02-05 | 1988-02-05 | 半導体装置 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH062264Y2 (ja) |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS583038U (ja) * | 1981-06-29 | 1983-01-10 | 富士通株式会社 | リ−ドフレ−ム |
-
1988
- 1988-02-05 JP JP1988014821U patent/JPH062264Y2/ja not_active Expired - Lifetime
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS583038U (ja) * | 1981-06-29 | 1983-01-10 | 富士通株式会社 | リ−ドフレ−ム |
Also Published As
Publication number | Publication date |
---|---|
JPH062264Y2 (ja) | 1994-01-19 |