JPH01109922A - プログラマブルロジツクアレイ - Google Patents

プログラマブルロジツクアレイ

Info

Publication number
JPH01109922A
JPH01109922A JP62268914A JP26891487A JPH01109922A JP H01109922 A JPH01109922 A JP H01109922A JP 62268914 A JP62268914 A JP 62268914A JP 26891487 A JP26891487 A JP 26891487A JP H01109922 A JPH01109922 A JP H01109922A
Authority
JP
Japan
Prior art keywords
line
product term
power supply
voltage
plane
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62268914A
Other languages
English (en)
Japanese (ja)
Inventor
Kazuhiro Sakashita
和広 坂下
Takashi Oya
大矢 隆司
Takeshi Hashizume
毅 橋爪
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP62268914A priority Critical patent/JPH01109922A/ja
Priority to US07/254,231 priority patent/US4894564A/en
Priority to DE3834760A priority patent/DE3834760A1/de
Publication of JPH01109922A publication Critical patent/JPH01109922A/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/17704Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form the logic functions being realised by the interconnection of rows and columns
    • H03K19/17708Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form the logic functions being realised by the interconnection of rows and columns using an AND matrix followed by an OR matrix, i.e. programmable logic arrays
    • H03K19/17716Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form the logic functions being realised by the interconnection of rows and columns using an AND matrix followed by an OR matrix, i.e. programmable logic arrays with synchronous operation, i.e. using clock signals, e.g. of I/O or coupling register
    • H03K19/1772Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form the logic functions being realised by the interconnection of rows and columns using an AND matrix followed by an OR matrix, i.e. programmable logic arrays with synchronous operation, i.e. using clock signals, e.g. of I/O or coupling register with synchronous operation of at least one of the logical matrixes

Landscapes

  • Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Logic Circuits (AREA)
JP62268914A 1987-10-23 1987-10-23 プログラマブルロジツクアレイ Pending JPH01109922A (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP62268914A JPH01109922A (ja) 1987-10-23 1987-10-23 プログラマブルロジツクアレイ
US07/254,231 US4894564A (en) 1987-10-23 1988-10-06 Programmable logic array with reduced product term line voltage swing to speed operation
DE3834760A DE3834760A1 (de) 1987-10-23 1988-10-12 Programmierbares logikfeld

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62268914A JPH01109922A (ja) 1987-10-23 1987-10-23 プログラマブルロジツクアレイ

Publications (1)

Publication Number Publication Date
JPH01109922A true JPH01109922A (ja) 1989-04-26

Family

ID=17465026

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62268914A Pending JPH01109922A (ja) 1987-10-23 1987-10-23 プログラマブルロジツクアレイ

Country Status (3)

Country Link
US (1) US4894564A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
JP (1) JPH01109922A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
DE (1) DE3834760A1 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0344110A (ja) * 1989-07-11 1991-02-26 Nec Corp 同期式プログラマブルロジックアレイ
JPH03231515A (ja) * 1990-02-06 1991-10-15 Mitsubishi Electric Corp プログラマブル論理装置

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0348539A1 (de) * 1988-06-28 1990-01-03 Deutsche ITT Industries GmbH Programmierbares CMOS-Logik-Feld
US5010258A (en) * 1989-09-12 1991-04-23 Kabushiki Kaisha Toshiba Programable logic array using one control clock signal
JPH0629812A (ja) * 1992-07-09 1994-02-04 Toshiba Corp 電位データ選択回路
US5279818A (en) * 1992-10-13 1994-01-18 Dow Corning Corporation Permanent waving with silicones
GB9426335D0 (en) * 1994-12-29 1995-03-01 Sgs Thomson Microelectronics A fast nor-nor pla operating from a single phase clock
US5760620A (en) * 1996-04-22 1998-06-02 Quantum Effect Design, Inc. CMOS limited-voltage-swing clock driver for reduced power driving high-frequency clocks

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4021781A (en) * 1974-11-19 1977-05-03 Texas Instruments Incorporated Virtual ground read-only-memory for electronic calculator or digital processor
US4233667A (en) * 1978-10-23 1980-11-11 International Business Machines Corporation Demand powered programmable logic array
US4467439A (en) * 1981-06-30 1984-08-21 Ibm Corporation OR Product term function in the search array of a PLA
US4833646A (en) * 1985-03-04 1989-05-23 Lattice Semiconductor Corp. Programmable logic device with limited sense currents and noise reduction
US4831285A (en) * 1988-01-19 1989-05-16 National Semiconductor Corporation Self precharging static programmable logic array

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0344110A (ja) * 1989-07-11 1991-02-26 Nec Corp 同期式プログラマブルロジックアレイ
JPH03231515A (ja) * 1990-02-06 1991-10-15 Mitsubishi Electric Corp プログラマブル論理装置

Also Published As

Publication number Publication date
US4894564A (en) 1990-01-16
DE3834760A1 (de) 1989-05-03
DE3834760C2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1992-10-15

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