JPH01109772A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To decrease the resistance of a gate electrode, by covering the exposed part of a GaAs substrate in a recess with an insulating film before multilayered metal layers are evaporated, and forming the gate electrode comprising the multilayered metal layers. CONSTITUTION:At least a metal layer 3 with a Schottky junction is formed in a region, where multilayered metal layers are to be formed. The exposed part of a GaAs substrate in a recess 1a is covered with an insulating film 7. Thereafter, metal layers 4 and 5 are sequentially formed. Thus, a gate electrode comprising the multilayered metal layers 3-5 is formed. Since the resistance of the gate electrode is made low, metal is not diffused into the GaAs substrate 1. The upper metal layers 3-5 can be formed readily and thickly. In this way, the implementation of the low resistance of the gate electrode can be realized with good reproducibility.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a method of manufacturing a semiconductor device having a gate electrode within a recess.

[Conventional technology]

FIGS. 2(a) and 2(b) are cross-sectional views showing the manufacturing process of a conventional semiconductor device having a gate electrode in a recess.

In this manufacturing process, first, as shown in FIG. 2(a), Ga
A resist 2 is patterned to desired dimensions on an As substrate 1 by photolithography, and this resist 2 is used as a mask.
A recess 1a is formed by wet etching.

Next, as shown in FIG. 2(b), gate metal is deposited in multiple layers, and the resist 2 is removed to create a recess 1a.
A multilayered gate electrode is formed inside.

Normally, the gate electrode is formed of a titanium layer 3.0 as shown in FIG. 2(b). Platinum layer 4. It has a three-layer structure with five gold layers. The titanium layer 3 forms a Schottky electrode, the gold layer 5 serves to lower the resistance of the gate electrode, and the platinum layer 4 serves to reduce the resistance of the gate electrode.
It serves to prevent diffusion into the As substrate 1.

(Problems to be Solved by the Invention) The gate electrode of a conventional semiconductor device is formed as described above, but when depositing the gold layer 5, the recessed portion below the resist 2 is formed on the surface of the GaAs substrate 1. - Since the surface is directly exposed, gold wraps around the GaAs substrate 1 during evaporation, causing the FE
This may lead to deterioration of T characteristics.

Furthermore, if the thickness of the gold layer 5 is increased in order to further reduce the resistance of the gate electrode, lift-off defects are likely to occur, and conversely, if the resist film thickness is increased to eliminate lift-off defects, it becomes difficult to control the dimensions of the resist. There were problems such as.

This invention was made to solve the above-mentioned problems, and there is no fear that the metal for reducing resistance will diffuse into the GaAs substrate during vapor deposition, and the metal for reducing resistance can be easily mixed. An object of the present invention is to obtain a method for manufacturing a semiconductor device that can increase the film thickness of the semiconductor device.

[Means for solving problems]

In the method for manufacturing a semiconductor device according to the present invention, after covering the exposed portion of the GaAs substrate in the recess other than the region where the multilayer metal layer is formed with an insulating film, metal layers are sequentially formed, and a gate electrode made of the multilayer metal layer is formed. It is designed to form a .

[Function] In this invention, since the exposed portion of the GaAs substrate in the recess is covered with an insulating film before depositing the multilayer metal layer, it is possible to reduce the resistance of the gate electrode even when forming the multilayer metal layer. Metal does not diffuse into the GaAs substrate.

Further, since strict dimensional control of the resist is not required when forming the multilayer metal layer, it is possible to easily reduce the resistance of the gate electrode.

〔Example〕

An embodiment of the present invention will be described below with reference to the drawings.

FIGS. 1(a) to 1(e) are cross-sectional views showing steps in an embodiment of the method for manufacturing a semiconductor device of the present invention.

First, as shown in FIG. 1(a), a silicon oxide film 6 is formed on a GaAs substrate 1 by CVD or the like, and then a resist 2 is patterned on this silicon oxide film 6 by photolithography. Thereafter, the silicon oxide film 6 is etched by anisotropic dry etching using the resist 2 as a mask, and then GaA is etched by wet etching.
A recess 1a is formed in the s-substrate 1.

Next, as shown in FIG. 1(b), after depositing a titanium layer 3, the resist 2 is removed to form a Schottky electrode.

Thereafter, as shown in FIG. 1C, a silicon nitride film 7 having a faster anisotropic etching rate than the silicon oxide film 6 is formed by CVD or the like so that the surface of the GaAs substrate 1 is not directly exposed. When the silicon nitride film 7 is anisotropically etched, the sidewall 7a of the silicon nitride film 7 covers the exposed portion of the GaAs substrate 1 in the recess 1a, as shown in FIG.
is formed.

After this, as shown in FIG. 1(e), by photolithography,
After patterning the resist to a larger size than that shown in FIG. 1(a), a platinum layer 4. A gold layer 5 is formed.

In the above embodiment, the silicon nitride film 7 was formed after the titanium layer 3 was formed by the lift-off method, but the titanium layer 3. The same effect can be obtained by forming up to the platinum layer 4 by the lift-off method, then forming the silicon nitride film 7, and finally forming only the gold layer 5.

Furthermore, in the above embodiments, the case where the gate electrode has a titanium/platinum/gold structure has been described, but the present invention can also be applied to cases where other multilayer metals are used for the gate electrode. Furthermore, two types of insulating films, silicon oxide film and silicon nitride film, were used.
If the precision of anisotropic etching is controlled, the same effect can be obtained even if the same insulating film or two other types of insulating films are used.

In addition, the platinum layer and the gold layer were formed by the lift-off method, but the platinum layer and the gold layer were formed on the entire surface by the sputtering method, the resist was patterned by photolithography, and then the platinum layer and the gold layer were anisotropically etched. A similar effect can be obtained by forming a gate electrode.

[Effects of the Invention] As explained above, in the present invention, after forming at least a Schottky junction metal layer in a region where a multilayer metal layer is to be formed, and after covering the exposed portion of the GaAs substrate in the recess with an insulating film, Since the metal layers are sequentially formed to form a gate electrode made of a multilayer metal layer, there is no risk that the metal used to reduce the resistance of the gate electrode will diffuse into the GaAs substrate, and the metal layer of the upper layer can be easily absorbed. This has the effect that the layer can be formed thickly and that the resistance of the gate electrode can be reduced with good reproducibility.

[Brief explanation of the drawing]

FIGS. 1(a) to (e) are cross-sectional views showing steps of an embodiment of the method for manufacturing a semiconductor device of the present invention, and FIGS. 2(a) to (b)
) is a sectional view showing the manufacturing process of a conventional semiconductor device. In the figure, 1 is a GaAs substrate, 2 is a resist, 3 is a titanium layer, 4 is a platinum layer, 5 is a gold layer, 6 is a silicon oxide film,
7 is a silicon nitride film. Note that the same reference numerals in each figure indicate the same or corresponding parts. Agent Masuo Oiwa (2 others) Figure 1

Claims (1)

[Claims] In a method for manufacturing a semiconductor device including a gate electrode made of a multilayer metal layer including a metal layer forming a Schottky junction and a metal layer for reducing resistance in a recess formed in a GaAs substrate, the multilayer metal layer is After forming at least a Schottky junction metal layer in the region to be formed, and covering the exposed portion of the GaAs substrate in the recess with an insulating film, metal layers are sequentially formed to form a gate electrode made of the multilayer metal layer. A method for manufacturing a semiconductor device, characterized in that: