JPH01104027U - - Google Patents

Info

Publication number
JPH01104027U
JPH01104027U JP1987199352U JP19935287U JPH01104027U JP H01104027 U JPH01104027 U JP H01104027U JP 1987199352 U JP1987199352 U JP 1987199352U JP 19935287 U JP19935287 U JP 19935287U JP H01104027 U JPH01104027 U JP H01104027U
Authority
JP
Japan
Prior art keywords
copper plate
solder
semiconductor chip
fixed
integrated circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1987199352U
Other languages
English (en)
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1987199352U priority Critical patent/JPH01104027U/ja
Publication of JPH01104027U publication Critical patent/JPH01104027U/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/50Bond wires
    • H10W72/541Dispositions of bond wires
    • H10W72/5445Dispositions of bond wires being orthogonal to a side surface of the chip, e.g. parallel arrangements
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/851Dispositions of multiple connectors or interconnections
    • H10W72/874On different surfaces
    • H10W72/884Die-attach connectors and bond wires
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/759Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a laterally-adjacent discrete passive device

Landscapes

  • Die Bonding (AREA)
JP1987199352U 1987-12-28 1987-12-28 Pending JPH01104027U (enExample)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1987199352U JPH01104027U (enExample) 1987-12-28 1987-12-28

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1987199352U JPH01104027U (enExample) 1987-12-28 1987-12-28

Publications (1)

Publication Number Publication Date
JPH01104027U true JPH01104027U (enExample) 1989-07-13

Family

ID=31489804

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1987199352U Pending JPH01104027U (enExample) 1987-12-28 1987-12-28

Country Status (1)

Country Link
JP (1) JPH01104027U (enExample)

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