JPH01146548U - - Google Patents

Info

Publication number
JPH01146548U
JPH01146548U JP1988043039U JP4303988U JPH01146548U JP H01146548 U JPH01146548 U JP H01146548U JP 1988043039 U JP1988043039 U JP 1988043039U JP 4303988 U JP4303988 U JP 4303988U JP H01146548 U JPH01146548 U JP H01146548U
Authority
JP
Japan
Prior art keywords
circuit board
conductive plate
protrusion
semiconductor device
heat dissipation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1988043039U
Other languages
English (en)
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1988043039U priority Critical patent/JPH01146548U/ja
Publication of JPH01146548U publication Critical patent/JPH01146548U/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/50Bond wires
    • H10W72/531Shapes of wire connectors
    • H10W72/5363Shapes of wire connectors the connected ends being wedge-shaped
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/754Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL

Landscapes

  • Solid State Image Pick-Up Elements (AREA)
JP1988043039U 1988-03-30 1988-03-30 Pending JPH01146548U (enExample)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1988043039U JPH01146548U (enExample) 1988-03-30 1988-03-30

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1988043039U JPH01146548U (enExample) 1988-03-30 1988-03-30

Publications (1)

Publication Number Publication Date
JPH01146548U true JPH01146548U (enExample) 1989-10-09

Family

ID=31269440

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1988043039U Pending JPH01146548U (enExample) 1988-03-30 1988-03-30

Country Status (1)

Country Link
JP (1) JPH01146548U (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013058645A (ja) * 2011-09-08 2013-03-28 Fuji Electric Co Ltd 半導体装置および半導体装置の製造方法

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013058645A (ja) * 2011-09-08 2013-03-28 Fuji Electric Co Ltd 半導体装置および半導体装置の製造方法

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