JP7631353B2 - スーパージャンクションデバイスのための工程及び構造物 - Google Patents

スーパージャンクションデバイスのための工程及び構造物 Download PDF

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JP7631353B2
JP7631353B2 JP2022545043A JP2022545043A JP7631353B2 JP 7631353 B2 JP7631353 B2 JP 7631353B2 JP 2022545043 A JP2022545043 A JP 2022545043A JP 2022545043 A JP2022545043 A JP 2022545043A JP 7631353 B2 JP7631353 B2 JP 7631353B2
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trench
conductivity type
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superjunction device
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JP2024529567A (ja
JP2024529567A5 (https=
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アンコウディノフ アレクセイ
エス ジョージェスク ソリン
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パワー・インテグレーションズ・インコーポレーテッド
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/64Double-diffused metal-oxide semiconductor [DMOS] FETs
    • H10D30/66Vertical DMOS [VDMOS] FETs
    • H10D30/664Inverted VDMOS transistors, i.e. source-down VDMOS transistors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/01Manufacture or treatment
    • H10D30/021Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/028Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs
    • H10D30/0291Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs of vertical DMOS [VDMOS] FETs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/64Double-diffused metal-oxide semiconductor [DMOS] FETs
    • H10D30/66Vertical DMOS [VDMOS] FETs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/102Constructional design considerations for preventing surface leakage or controlling electric field concentration
    • H10D62/103Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices
    • H10D62/105Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE] 
    • H10D62/109Reduced surface field [RESURF] PN junction structures
    • H10D62/111Multiple RESURF structures, e.g. double RESURF or 3D-RESURF structures
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/113Isolations within a component, i.e. internal isolations
    • H10D62/115Dielectric isolations, e.g. air gaps
    • H10D62/116Dielectric isolations, e.g. air gaps adjoining the input or output regions of field-effect devices, e.g. adjoining source or drain regions
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/124Shapes, relative sizes or dispositions of the regions of semiconductor bodies or of junctions between the regions
    • H10D62/126Top-view geometrical layouts of the regions or the junctions
    • H10D62/127Top-view geometrical layouts of the regions or the junctions of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/13Semiconductor regions connected to electrodes carrying current to be rectified, amplified or switched, e.g. source or drain regions
    • H10D62/149Source or drain regions of field-effect devices
    • H10D62/151Source or drain regions of field-effect devices of IGFETs 
    • H10D62/152Source regions of DMOS transistors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/13Semiconductor regions connected to electrodes carrying current to be rectified, amplified or switched, e.g. source or drain regions
    • H10D62/149Source or drain regions of field-effect devices
    • H10D62/151Source or drain regions of field-effect devices of IGFETs 
    • H10D62/152Source regions of DMOS transistors
    • H10D62/154Dispositions
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/17Semiconductor regions connected to electrodes not carrying current to be rectified, amplified or switched, e.g. channel regions
    • H10D62/393Body regions of DMOS transistors or IGBTs 
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00Ion implantation into wafers, substrates or parts of devices
    • H10P30/20Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
    • H10P30/202Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping characterised by the semiconductor materials
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00Ion implantation into wafers, substrates or parts of devices
    • H10P30/20Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
    • H10P30/21Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping of electrically active species
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00Ion implantation into wafers, substrates or parts of devices
    • H10P30/20Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
    • H10P30/22Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping using masks
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00Ion implantation into wafers, substrates or parts of devices
    • H10P30/20Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
    • H10P30/22Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping using masks
    • H10P30/221Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping using masks characterised by the angle between the ion beam and the mask

Landscapes

  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Chemical & Material Sciences (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Composite Materials (AREA)
  • Crystallography & Structural Chemistry (AREA)
JP2022545043A 2020-01-31 2021-03-19 スーパージャンクションデバイスのための工程及び構造物 Active JP7631353B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US16/778,904 US11316042B2 (en) 2020-01-31 2020-01-31 Process and structure for a superjunction device
PCT/US2021/023142 WO2021155386A1 (en) 2020-01-31 2021-03-19 Process and structure for a superjunction device

Publications (3)

Publication Number Publication Date
JP2024529567A JP2024529567A (ja) 2024-08-07
JP2024529567A5 JP2024529567A5 (https=) 2024-11-25
JP7631353B2 true JP7631353B2 (ja) 2025-02-18

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JP2022545043A Active JP7631353B2 (ja) 2020-01-31 2021-03-19 スーパージャンクションデバイスのための工程及び構造物

Country Status (6)

Country Link
US (1) US11316042B2 (https=)
EP (1) EP4097763A4 (https=)
JP (1) JP7631353B2 (https=)
KR (1) KR102860640B1 (https=)
CN (1) CN115380387A (https=)
WO (1) WO2021155386A1 (https=)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11569345B2 (en) * 2020-11-23 2023-01-31 Alpha And Omega Semiconductor (Cayman) Ltd. Gas dopant doped deep trench super junction high voltage MOSFET
US12074196B2 (en) * 2021-07-08 2024-08-27 Applied Materials, Inc. Gradient doping epitaxy in superjunction to improve breakdown voltage
US20260068236A1 (en) * 2024-08-29 2026-03-05 Applied Materials, Inc. Trench-based super junction structures via sidewall doping

Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2000070684A2 (en) 1999-05-17 2000-11-23 North Carolina State University Silicon carbide power devices comprising charge coupling regions
JP2003179229A (ja) 2001-09-07 2003-06-27 Power Integrations Inc 多層拡張ドレイン構造を有する高電圧縦型トランジスタ
US20090269896A1 (en) 2008-04-24 2009-10-29 Hui Chen Technique for Controlling Trench Profile in Semiconductor Structures
US20100013010A1 (en) 2008-07-16 2010-01-21 Kabushiki Kaisha Toshiba Power semiconductor device
US20110127586A1 (en) 2009-11-30 2011-06-02 Madhur Bobde Lateral super junction device with high substrate-gate breakdown and built-in avalanche clamp diode
US20120064684A1 (en) 2009-12-28 2012-03-15 Force Mos Technology Co. Ltd. Method for manufacturing a super-junction trench mosfet with resurf stepped oxides and trenched contacts
US20140124851A1 (en) 2012-11-08 2014-05-08 Infineon Technologies Austria Ag Radiation-Hardened Power Semiconductor Devices and Methods of Forming Them
US20170148632A1 (en) 2014-09-24 2017-05-25 Alpha And Omega Semiconductor Incorporated Semiconductor device including superjunction structure formed using angled implant process
US20190051743A1 (en) 2007-01-09 2019-02-14 Maxpower Semiconductor, Inc. Semiconductor Device

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19918198B4 (de) * 1998-04-23 2008-04-17 International Rectifier Corp., El Segundo Struktur eines P-Kanal-Graben-MOSFETs
DE19943143B4 (de) * 1999-09-09 2008-04-24 Infineon Technologies Ag Halbleiterbauelement für hohe Sperrspannungen bei gleichzeitig niedrigem Einschaltwiderstand und Verfahren zu dessen Herstellung
US7345342B2 (en) * 2001-01-30 2008-03-18 Fairchild Semiconductor Corporation Power semiconductor devices and methods of manufacture
US7052982B2 (en) 2003-12-19 2006-05-30 Third Dimension (3D) Semiconductor, Inc. Method for manufacturing a superjunction device with wide mesas
US7465986B2 (en) * 2004-08-27 2008-12-16 International Rectifier Corporation Power semiconductor device including insulated source electrodes inside trenches
US7829947B2 (en) * 2009-03-17 2010-11-09 Alpha & Omega Semiconductor Incorporated Bottom-drain LDMOS power MOSFET structure having a top drain strap
CN102709320B (zh) * 2012-02-15 2014-09-24 中山大学 纵向导通的GaN基MISFET 器件及其制作方法
US8765609B2 (en) * 2012-07-25 2014-07-01 Power Integrations, Inc. Deposit/etch for tapered oxide
US9564515B2 (en) 2014-07-28 2017-02-07 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor device having super junction structure and method for manufacturing the same
US20160268446A1 (en) * 2015-03-10 2016-09-15 United Silicon Carbide, Inc. Trench vertical jfet with improved threshold voltage control
JP6454447B2 (ja) 2015-12-02 2019-01-16 アーベーベー・シュバイツ・アーゲー 半導体装置の製造方法
CN107302023A (zh) * 2017-07-13 2017-10-27 深圳市金誉半导体有限公司 超结型沟槽功率mosfet器件及其制备方法

Patent Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2000070684A2 (en) 1999-05-17 2000-11-23 North Carolina State University Silicon carbide power devices comprising charge coupling regions
JP2003179229A (ja) 2001-09-07 2003-06-27 Power Integrations Inc 多層拡張ドレイン構造を有する高電圧縦型トランジスタ
US20190051743A1 (en) 2007-01-09 2019-02-14 Maxpower Semiconductor, Inc. Semiconductor Device
US20090269896A1 (en) 2008-04-24 2009-10-29 Hui Chen Technique for Controlling Trench Profile in Semiconductor Structures
US20100013010A1 (en) 2008-07-16 2010-01-21 Kabushiki Kaisha Toshiba Power semiconductor device
US20110127586A1 (en) 2009-11-30 2011-06-02 Madhur Bobde Lateral super junction device with high substrate-gate breakdown and built-in avalanche clamp diode
US20120064684A1 (en) 2009-12-28 2012-03-15 Force Mos Technology Co. Ltd. Method for manufacturing a super-junction trench mosfet with resurf stepped oxides and trenched contacts
US20140124851A1 (en) 2012-11-08 2014-05-08 Infineon Technologies Austria Ag Radiation-Hardened Power Semiconductor Devices and Methods of Forming Them
US20170148632A1 (en) 2014-09-24 2017-05-25 Alpha And Omega Semiconductor Incorporated Semiconductor device including superjunction structure formed using angled implant process

Also Published As

Publication number Publication date
KR20230062469A (ko) 2023-05-09
KR102860640B1 (ko) 2025-09-15
WO2021155386A1 (en) 2021-08-05
EP4097763A1 (en) 2022-12-07
US20210242338A1 (en) 2021-08-05
US11316042B2 (en) 2022-04-26
JP2024529567A (ja) 2024-08-07
EP4097763A4 (en) 2023-11-15
CN115380387A (zh) 2022-11-22

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