JP7392129B2 - 表示デバイスおよび表示ユニット - Google Patents
表示デバイスおよび表示ユニット Download PDFInfo
- Publication number
- JP7392129B2 JP7392129B2 JP2022520996A JP2022520996A JP7392129B2 JP 7392129 B2 JP7392129 B2 JP 7392129B2 JP 2022520996 A JP2022520996 A JP 2022520996A JP 2022520996 A JP2022520996 A JP 2022520996A JP 7392129 B2 JP7392129 B2 JP 7392129B2
- Authority
- JP
- Japan
- Prior art keywords
- display device
- lines
- row
- line
- column
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 238000010586 diagram Methods 0.000 description 16
- 239000011159 matrix material Substances 0.000 description 13
- 239000004065 semiconductor Substances 0.000 description 10
- 230000003595 spectral effect Effects 0.000 description 10
- 230000005855 radiation Effects 0.000 description 8
- 229910000679 solder Inorganic materials 0.000 description 6
- 239000000853 adhesive Substances 0.000 description 3
- 230000001070 adhesive effect Effects 0.000 description 3
- 239000003990 capacitor Substances 0.000 description 3
- 239000004020 conductor Substances 0.000 description 3
- 239000000463 material Substances 0.000 description 3
- 239000004205 dimethyl polysiloxane Substances 0.000 description 2
- 235000013870 dimethyl polysiloxane Nutrition 0.000 description 2
- 239000012799 electrically-conductive coating Substances 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 239000011521 glass Substances 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 238000000034 method Methods 0.000 description 2
- 229920000435 poly(dimethylsiloxane) Polymers 0.000 description 2
- 229920000642 polymer Polymers 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 238000010521 absorption reaction Methods 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 230000001419 dependent effect Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000010292 electrical insulation Methods 0.000 description 1
- QUCZBHXJAUTYHE-UHFFFAOYSA-N gold Chemical compound [Au].[Au] QUCZBHXJAUTYHE-UHFFFAOYSA-N 0.000 description 1
- 238000002955 isolation Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- CXQXSVUQTKDNFP-UHFFFAOYSA-N octamethyltrisiloxane Chemical compound C[Si](C)(C)O[Si](C)(C)O[Si](C)(C)C CXQXSVUQTKDNFP-UHFFFAOYSA-N 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 238000004806 packaging method and process Methods 0.000 description 1
- 238000004987 plasma desorption mass spectroscopy Methods 0.000 description 1
- 229920003023 plastic Polymers 0.000 description 1
- -1 polydimethylsiloxane Polymers 0.000 description 1
- 238000000926 separation method Methods 0.000 description 1
Images
Classifications
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/16—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
- H01L25/167—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits comprising optoelectronic devices, e.g. LED, photodiodes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
- H01L23/5381—Crossover interconnections, e.g. bridge stepovers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
- H01L23/5386—Geometry or layout of the interconnection structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/065—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L25/0655—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00 the devices being arranged next to each other
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2300/00—Aspects of the constitution of display devices
- G09G2300/04—Structural and physical details of display devices
- G09G2300/0404—Matrix technologies
- G09G2300/0413—Details of dummy pixels or dummy lines in flat panels
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2300/00—Aspects of the constitution of display devices
- G09G2300/04—Structural and physical details of display devices
- G09G2300/0421—Structural details of the set of electrodes
- G09G2300/0426—Layout of electrodes and connections
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2300/00—Aspects of the constitution of display devices
- G09G2300/04—Structural and physical details of display devices
- G09G2300/0439—Pixel structures
- G09G2300/0452—Details of colour pixel setup, e.g. pixel composed of a red, a blue and two green components
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2300/00—Aspects of the constitution of display devices
- G09G2300/06—Passive matrix structure, i.e. with direct application of both column and row voltages to the light emitting or modulating elements, other than LCD or OLED
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
- G09G2330/08—Fault-tolerant or redundant circuits, or circuits in which repair of defects is prepared
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05599—Material
- H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05638—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/05644—Gold [Au] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/07—Structure, shape, material or disposition of the bonding areas after the connecting process
- H01L2224/08—Structure, shape, material or disposition of the bonding areas after the connecting process of an individual bonding area
- H01L2224/081—Disposition
- H01L2224/0812—Disposition the bonding area connecting directly to another bonding area, i.e. connectorless bonding, e.g. bumpless bonding
- H01L2224/08151—Disposition the bonding area connecting directly to another bonding area, i.e. connectorless bonding, e.g. bumpless bonding the bonding area connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/08221—Disposition the bonding area connecting directly to another bonding area, i.e. connectorless bonding, e.g. bumpless bonding the bonding area connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/08225—Disposition the bonding area connecting directly to another bonding area, i.e. connectorless bonding, e.g. bumpless bonding the bonding area connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L2224/20—Structure, shape, material or disposition of high density interconnect preforms
- H01L2224/21—Structure, shape, material or disposition of high density interconnect preforms of an individual HDI interconnect
- H01L2224/2105—Shape
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L2224/20—Structure, shape, material or disposition of high density interconnect preforms
- H01L2224/22—Structure, shape, material or disposition of high density interconnect preforms of a plurality of HDI interconnects
- H01L2224/221—Disposition
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L2224/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
- H01L2224/24—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
- H01L2224/241—Disposition
- H01L2224/24151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/24221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/24225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/24226—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the HDI interconnect connecting to the same level of the item at which the semiconductor or solid-state body is mounted, e.g. the item being planar
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/07—Structure, shape, material or disposition of the bonding areas after the connecting process
- H01L24/08—Structure, shape, material or disposition of the bonding areas after the connecting process of an individual bonding area
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L24/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L24/20—Structure, shape, material or disposition of high density interconnect preforms
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L24/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
- H01L24/24—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/075—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00
- H01L25/0753—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00 the devices being arranged next to each other
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Manufacturing & Machinery (AREA)
- Geometry (AREA)
- Theoretical Computer Science (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
- Led Device Packages (AREA)
Description
10 ビーム出射面
100 表示ユニット
15 側面
2 接続支持体
21 絶縁層
3 画素
3R,3G,3B 副画素
4 仮想の交点
5 ブリッジ素子
51 コンタクト
52 別のコンタクト
54 空きスペース
55 ブリッジパス
58 中間支持体
581 ビア
59 接合手段
591 接合層
592 接合ボール
595 充填材料
597 先端部
6 活性領域
65 半導体チップ
651 コンタクト面
66 接続線路
67 分離層
7 電子素子
70 回路
71 トランジスタ
72 コンデンサ
73 集積回路
8 端子
85 端子コネクタ
9 ドライバ
95 コネクタ
96 プラグインコネクタ
97 部分
98 部分
99 矢印
A1,A2,… 行ライン
A1_1 部分領域
A1_2 部分領域
B1,B2,… 列ライン
Z,Z1,Z2,… 線路
Claims (19)
- 接続支持体(2)と、行ライン(A1,A2,…)および列ライン(B1,B2,…)を介して駆動制御可能な複数の画素(3)とを有する表示デバイス(1)であって、
前記行ラインおよび前記列ラインは、前記接続支持体に構成されており、
少なくとも1つの行ラインは、前記接続支持体における列ラインとの仮想の交点(4)において中断されており、
前記接続支持体には、前記仮想の交点において前記行ラインを導電的にブリッジするブリッジ素子(5)が配置されており、
前記行ラインおよび前記列ラインは、前記画素を駆動制御するドライバ(9)との電気的なコンタクトのための端子(8)を有し、
行ラインはそれぞれ、線路(Z1,Z2,…)を介して複数の前記端子の1つに接続されており、
行ラインと所属の前記端子との間に設けられている行ラインは、ブリッジ素子によって乗り越えられている、表示デバイス(1)。 - 前記行ラインおよび前記列ラインは、前記接続支持体の上面図において、互いに重なり合うことなく構成されている、請求項1記載の表示デバイス。
- 前記ブリッジ素子は、前記表示デバイスの動作時に同じ電位にありかつ同じ行ラインに導電接続されている2つのコンタクト(51)を有する、請求項1または2記載の表示デバイス。
- 前記ブリッジ素子は、ビームを生成するために設けられている少なくとも1つの活性領域(6)を有し、前記ブリッジ素子には、2つの前記コンタクトの間のブリッジパス(55)が構成されており、前記ブリッジパスは、前記活性領域を通って延在していない、請求項1から3までのいずれか1項記載の表示デバイス。
- 前記ブリッジ素子は、それぞれ1つの前記画素または前記画素の副画素(6R,6G,6B)を形成する複数の活性領域(6)を有する、請求項1から4までのいずれか1項記載の表示デバイス。
- 前記ブリッジ素子は、少なくとも1つの電子素子(7)を有する、請求項1から5までのいずれか1項記載の表示デバイス。
- 前記ブリッジ素子は、少なくとも1つの画素が構成されている中間支持体(58)を有する、請求項1から6までのいずれか1項記載の表示デバイス。
- 前記中間支持体は、複数のビア(581)を有し、少なくとも1つの前記画素は、前記接続支持体とは反対側を向いた、前記中間支持体の面に構成されている、請求項7記載の表示デバイス。
- 前記表示デバイスの断面図において、前記ブリッジ素子および/または少なくとも1つの画素が、前記接続支持体と、複数の前記行ラインの1つとの間に配置されている、請求項1から8までのいずれか1項記載の表示デバイス。
- 前記表示デバイスの断面図において、前記ブリッジ素子および/または少なくとも1つの画素は、前記接続支持体とは反対側を向いた、複数の前記行ラインのうちの1つの行ラインの面に配置されている、請求項1から9までのいずれか1項記載の表示デバイス。
- 前記接続支持体は、動作時に前記画素によって放射される前記ビームに対して透過である、請求項4または請求項4を引用する請求項5から10までのいずれか1項記載の表示デバイス。
- 画素には行ラインよりも多くの列ラインが対応付けられているか、またはその逆である、請求項1から11までのいずれか1項記載の表示デバイス。
- 前記行ラインおよび前記列ラインの電気的なコンタクトのための前記端子(8)は、前記表示デバイスのちょうど1つの側面(15)に沿って配置されている、請求項1から12までのいずれか1項記載の表示デバイス。
- 複数の前記線路は、重なることなく前記行ラインへと延在している、請求項13記載の表示デバイス。
- 前記表示デバイスのビーム出射面(10)とは反対側を向いた面に、前記行ラインおよび前記列ラインを駆動制御する前記ドライバ(9)が配置されており、かつ前記ドライバ(9)が端子コネクタ(85)を介して前記端子(8)と電気的に接続され、前記表示デバイスのすべての側面(15)は、前記行ラインおよび前記列ライン用の端子を有しない、請求項1から12までのいずれか1項記載の表示デバイス。
- 前記端子コネクタ(85)は、接続ボールの形態で構成されている、請求項15記載の表示デバイス。
- 前記行ラインはそれぞれ、1つの線路(Z1,Z2,…)を介して前記ドライバに接続されており、複数の前記線路は、重なることなく、前記行ラインに延在している、請求項15または16記載の表示デバイス。
- 前記線路は、コネクタ(95)を介して前記ドライバに接続されており、前記コネクタは、前記行ラインに対して平行な方向に前記ドライバよりも大きな寸法を有し、前記コネクタは、前記表示デバイスの上面図において少なくとも、内側にあるすべての列ラインにわたって延在している、請求項17記載の表示デバイス。
- 請求項1から18までのいずれか1項記載の複数の表示デバイス(1)を有する表示ユニット(100)。
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE102019126859.1 | 2019-10-07 | ||
DE102019126859.1A DE102019126859A1 (de) | 2019-10-07 | 2019-10-07 | Anzeigevorrichtung und Anzeigeeinheit |
PCT/EP2020/077853 WO2021069378A1 (de) | 2019-10-07 | 2020-10-05 | Anzeigevorrichtung und anzeigeeinheit |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2022551619A JP2022551619A (ja) | 2022-12-12 |
JP7392129B2 true JP7392129B2 (ja) | 2023-12-05 |
Family
ID=72752443
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2022520996A Active JP7392129B2 (ja) | 2019-10-07 | 2020-10-05 | 表示デバイスおよび表示ユニット |
Country Status (4)
Country | Link |
---|---|
US (1) | US20220293577A1 (ja) |
JP (1) | JP7392129B2 (ja) |
DE (2) | DE102019126859A1 (ja) |
WO (1) | WO2021069378A1 (ja) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE102021119155A1 (de) | 2021-07-23 | 2023-01-26 | OSRAM Opto Semiconductors Gesellschaft mit beschränkter Haftung | Verfahren zum aufbringen eines elektrischen verbindungsmaterials oder flussmittels auf ein bauelement |
DE102021119707A1 (de) * | 2021-07-29 | 2023-02-02 | OSRAM Opto Semiconductors Gesellschaft mit beschränkter Haftung | Träger mit eingebetteter elektrischer verbindung, bauelement und verfahren zur herstellung eines trägers |
Citations (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2006295121A (ja) | 2005-03-15 | 2006-10-26 | Future Vision:Kk | 薄膜トランジスタを用いた液晶表示装置及びその製造方法 |
WO2011040081A1 (ja) | 2009-09-30 | 2011-04-07 | シャープ株式会社 | 基板モジュールおよびその製造方法 |
JP2011076808A (ja) | 2009-09-30 | 2011-04-14 | Sony Chemical & Information Device Corp | 異方性導電フィルム及びその製造方法 |
US20120126233A1 (en) | 2010-11-23 | 2012-05-24 | Chang Chong Sup | Thin film transistor array panel and method for manufacturing the same |
JP2012518199A (ja) | 2009-02-13 | 2012-08-09 | グローバル・オーエルイーディー・テクノロジー・リミテッド・ライアビリティ・カンパニー | ディスプレイデバイス内のチップレット間のピクセルの分割 |
JP2012531627A (ja) | 2009-06-26 | 2012-12-10 | グローバル・オーエルイーディー・テクノロジー・リミテッド・ライアビリティ・カンパニー | ディスプレイのパッシブマトリックスチップレットドライバ |
JP2013546012A (ja) | 2010-10-15 | 2013-12-26 | グローバル オーエルイーディー テクノロジー リミティド ライアビリティ カンパニー | マルチ・パッシブマトリクス・コントローラを有するチップレット・ディスプレイ |
JP2017175093A (ja) | 2016-03-25 | 2017-09-28 | デクセリアルズ株式会社 | 電子部品、接続体、電子部品の設計方法 |
US20180033853A1 (en) | 2016-07-26 | 2018-02-01 | X-Celeprint Limited | Devices with a single metal layer |
US20190027534A1 (en) | 2017-07-21 | 2019-01-24 | X-Celeprint Limited | Iled displays with substrate holes |
US20190267363A1 (en) | 2018-02-28 | 2019-08-29 | X-Celeprint Limited | Displays with Transparent Bezels |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN111261639A (zh) * | 2015-09-11 | 2020-06-09 | 夏普株式会社 | 图像显示装置以及图像显示元件的制造方法 |
US10153257B2 (en) | 2016-03-03 | 2018-12-11 | X-Celeprint Limited | Micro-printed display |
-
2019
- 2019-10-07 DE DE102019126859.1A patent/DE102019126859A1/de not_active Withdrawn
-
2020
- 2020-10-05 WO PCT/EP2020/077853 patent/WO2021069378A1/de active Application Filing
- 2020-10-05 US US17/638,681 patent/US20220293577A1/en active Pending
- 2020-10-05 DE DE112020004819.5T patent/DE112020004819B4/de active Active
- 2020-10-05 JP JP2022520996A patent/JP7392129B2/ja active Active
Patent Citations (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2006295121A (ja) | 2005-03-15 | 2006-10-26 | Future Vision:Kk | 薄膜トランジスタを用いた液晶表示装置及びその製造方法 |
JP2012518199A (ja) | 2009-02-13 | 2012-08-09 | グローバル・オーエルイーディー・テクノロジー・リミテッド・ライアビリティ・カンパニー | ディスプレイデバイス内のチップレット間のピクセルの分割 |
JP2012531627A (ja) | 2009-06-26 | 2012-12-10 | グローバル・オーエルイーディー・テクノロジー・リミテッド・ライアビリティ・カンパニー | ディスプレイのパッシブマトリックスチップレットドライバ |
WO2011040081A1 (ja) | 2009-09-30 | 2011-04-07 | シャープ株式会社 | 基板モジュールおよびその製造方法 |
JP2011076808A (ja) | 2009-09-30 | 2011-04-14 | Sony Chemical & Information Device Corp | 異方性導電フィルム及びその製造方法 |
JP2013546012A (ja) | 2010-10-15 | 2013-12-26 | グローバル オーエルイーディー テクノロジー リミティド ライアビリティ カンパニー | マルチ・パッシブマトリクス・コントローラを有するチップレット・ディスプレイ |
US20120126233A1 (en) | 2010-11-23 | 2012-05-24 | Chang Chong Sup | Thin film transistor array panel and method for manufacturing the same |
JP2017175093A (ja) | 2016-03-25 | 2017-09-28 | デクセリアルズ株式会社 | 電子部品、接続体、電子部品の設計方法 |
US20180033853A1 (en) | 2016-07-26 | 2018-02-01 | X-Celeprint Limited | Devices with a single metal layer |
US20190027534A1 (en) | 2017-07-21 | 2019-01-24 | X-Celeprint Limited | Iled displays with substrate holes |
US20190267363A1 (en) | 2018-02-28 | 2019-08-29 | X-Celeprint Limited | Displays with Transparent Bezels |
Also Published As
Publication number | Publication date |
---|---|
DE102019126859A1 (de) | 2021-04-08 |
WO2021069378A1 (de) | 2021-04-15 |
DE112020004819B4 (de) | 2024-05-16 |
DE112020004819A5 (de) | 2022-07-28 |
US20220293577A1 (en) | 2022-09-15 |
JP2022551619A (ja) | 2022-12-12 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP6754410B2 (ja) | Ledディスプレイ装置 | |
EP3648164B1 (en) | Display device using semiconductor light emitting element | |
CN110416394B (zh) | 发光模块 | |
JP6128046B2 (ja) | 実装基板および電子機器 | |
JP6653022B2 (ja) | ビデオウォールモジュールおよびビデオウォールモジュールの製造方法 | |
US10720413B2 (en) | LED package, LED module and method for manufacturing LED package | |
JP7392129B2 (ja) | 表示デバイスおよび表示ユニット | |
KR20200106039A (ko) | 반도체 발광소자를 이용한 디스플레이 장치 및 이의 제조방법 | |
KR20150095988A (ko) | 표시 장치 및 이의 제조 방법 | |
KR102206782B1 (ko) | 디스플레이 장치 | |
CN111682017B (zh) | 发光模块 | |
KR102205693B1 (ko) | 반도체 발광 소자를 이용한 디스플레이 장치 | |
KR101935329B1 (ko) | μLED 어레이 드라이빙 장치 | |
JP2019050298A (ja) | 発光パネル | |
CN116157920A (zh) | 显示模块 | |
CN114762027A (zh) | 显示装置 | |
TW201909407A (zh) | 包含具有彩色發光二極體之發射像素的透明主動矩陣顯示器 | |
US6914379B2 (en) | Thermal management in electronic displays | |
JP6527194B2 (ja) | 表示装置 | |
KR20180135335A (ko) | 반도체 발광 소자를 이용한 디스플레이 장치 | |
JP2018087928A (ja) | Ledディスプレイ装置 | |
US20240297284A1 (en) | Semiconductor light-emitting device package and display device | |
KR101092367B1 (ko) | 유기 발광 다이오드 표시 소자 및 그 제조 방법 | |
KR20220051782A (ko) | 디스플레이 모듈 | |
JP2024092521A (ja) | 発光装置 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20220406 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20230530 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20230829 |
|
TRDD | Decision of grant or rejection written | ||
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20231108 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20231122 |
|
R150 | Certificate of patent or registration of utility model |
Ref document number: 7392129 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R150 |