JP7224456B2 - 基板処理方法及び基板処理システム - Google Patents
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- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/304—Mechanical treatment, e.g. grinding, polishing, cutting
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- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
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- H01L21/67005—Apparatus not specifically provided for elsewhere
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- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67017—Apparatus for fluid treatment
- H01L21/67063—Apparatus for fluid treatment for etching
- H01L21/67075—Apparatus for fluid treatment for etching for wet etching
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- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67132—Apparatus for placing on an insulating substrate, e.g. tape
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/7806—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices involving the separation of the active layers from a substrate
- H01L21/7813—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices involving the separation of the active layers from a substrate leaving a reusable substrate, e.g. epitaxial lift off
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/68327—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
Description
10 接合装置
20 ウェハ処理装置
71 接合モジュール
132 分離モジュール
W デバイスウェハ
W1 第1の分離ウェハ
W2 第2の分離ウェハ
Claims (15)
- 表面にデバイスが形成された処理対象基板を処理する基板処理方法であって、
処理対象基板と支持基板が接合された重合基板から、処理対象基板を、デバイスがある側の第1の分離基板とデバイスがない側の第2の分離基板に分離する工程で分離された前記第2の分離基板を準備することと、
前記第2の分離基板を支持基板として処理対象基板と接合することと、を有する、基板処理方法。 - 前記処理対象基板から分離された前記第2の分離基板の分離面を研削することと、
前記研削された前記第2の分離基板の分離面をエッチングすることと、を有する、請求項1に記載の基板処理方法。 - 前記処理対象基板から分離された前記第1の分離基板の分離面をエッチングすることと、
前記エッチングされた前記第1の分離基板をダイシングすることと、
前記ダイシングされた前記第1の分離基板をダイシングフレームに固定することと、
前記ダイシングフレームに固定された前記第1の分離基板から前記第2の分離基板を剥離することと、を有する、請求項1又は2に記載の基板処理方法。 - 前記エッチングされた前記第1の分離基板の分離面にダイアタッチフィルムを貼り付けることと、
前記ダイアタッチフィルムをダイシングすることと、を有する、請求項3に記載の基板処理方法。 - 前記ダイシングされた第1の分離基板の分離面にダイアタッチフィルムを貼り付けることと、
前記ダイアタッチフィルムをダイシングすることと、を有する、請求項3に記載の基板処理方法。 - 前記第2の分離基板に接合する前の前記処理対象基板の表面に保護層を形成することと、
前記保護層が形成された前記処理対象基板をダイシングすることと、
前記ダイシングされた前記処理対象基板から前記保護層を除去することと、
前記保護層が除去された前記処理対象基板に対して、前記第2の分離基板を支持基板として接合することと、
前記処理対象基板を、表面側の第1の分離基板と裏面側の第2の分離基板に分離することと、
前記処理対象基板から分離された前記第1の分離基板の分離面をエッチングすることと、
前記エッチングされた前記第1の分離基板をダイシングフレームに固定することと、
前記ダイシングフレームに固定された前記第1の分離基板から前記第2の分離基板を剥離することと、を有する、請求項1に記載の基板処理方法。 - 前記エッチングされた第1の分離基板の分離面にダイアタッチフィルムを貼り付けることと、
前記ダイアタッチフィルムをダイシングすることと、を有する、請求項6に記載の基板処理方法。 - 前記第2の分離基板に接合された前記処理対象基板を研削することと、
前記研削された前記処理対象基板の研削面をエッチングすることと、
前記エッチングされた前記処理対象基板をダイシングすることと、
前記ダイシングされた前記処理対象基板をダイシングフレームに固定することと、
前記ダイシングフレームに固定された前記処理対象基板から前記第2の分離基板を剥離することと、を有する、請求項1に記載の基板処理方法。 - 前記処理対象基板を前記第1の分離基板と前記第2の分離基板に分離する工程で、当該処理対象基板の周縁部が一体となって分離された前記第2の分離基板を準備し、
前記処理対象基板から分離された前記第2の分離基板の分離面を研削し、当該分離面の外周部において突出した周縁部を除去する、請求項1に記載の基板処理方法。 - 表面にデバイスが形成された処理対象基板を処理する基板処理システムであって、
処理対象基板と支持基板が接合された重合基板から、処理対象基板を、デバイスがある側の第1の分離基板とデバイスがない側の第2の分離基板に分離する工程で分離された前記第2の分離基板を、支持基板として処理対象基板と接合する接合部を有する、基板処理システム。 - 前記処理対象基板を、表面側の第1の分離基板と裏面側の第2の分離基板に分離する分離部を有する、請求項10に記載の基板処理システム。
- 前記第2の分離基板の分離面を研削する研削部と、
前記第2の分離基板の分離面をエッチングするエッチング部と、を有する、請求項10又は11に記載の基板処理システム。 - 前記第1の分離基板をダイシングするダイシング部と、
前記第1の分離基板をダイシングフレームに固定する固定部と、
前記第1の分離基板から前記第2の分離基板を剥離する剥離部と、を有する、請求項10~12のいずれか一項に記載の基板処理システム。 - 前記第1の分離基板の分離面にダイアタッチフィルムを貼り付ける貼付部を有する、請求項10~13のいずれかに記載の基板処理システム。
- 前記第2の分離基板に接合される前の前記処理対象基板の表面に保護層を形成する保護層形成部と、
前記処理対象基板から前記保護層を除去する保護層除去部と、を有する、請求項10~14のいずれか一項に記載の基板処理システム。
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JP2019096791 | 2019-05-23 | ||
JP2019096791 | 2019-05-23 | ||
PCT/JP2020/018795 WO2020235373A1 (ja) | 2019-05-23 | 2020-05-11 | 基板処理方法及び基板処理システム |
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JPWO2020235373A1 JPWO2020235373A1 (ja) | 2020-11-26 |
JPWO2020235373A5 JPWO2020235373A5 (ja) | 2022-03-22 |
JP7224456B2 true JP7224456B2 (ja) | 2023-02-17 |
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US (1) | US20220223475A1 (ja) |
JP (1) | JP7224456B2 (ja) |
KR (1) | KR20220011141A (ja) |
CN (1) | CN113811983A (ja) |
TW (1) | TW202109638A (ja) |
WO (1) | WO2020235373A1 (ja) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
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JP2021040069A (ja) * | 2019-09-04 | 2021-03-11 | キオクシア株式会社 | 半導体ウェハ、半導体ウェハの製造方法、および半導体装置の製造方法 |
Citations (7)
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JP2006108532A (ja) | 2004-10-08 | 2006-04-20 | Disco Abrasive Syst Ltd | ウエーハの研削方法 |
JP2010263041A (ja) | 2009-05-01 | 2010-11-18 | Nitto Denko Corp | ダイアタッチフィルム付きダイシングテープおよび半導体装置の製造方法 |
JP2011171382A (ja) | 2010-02-16 | 2011-09-01 | Disco Corp | 分割方法 |
JP2016035965A (ja) | 2014-08-01 | 2016-03-17 | リンテック株式会社 | 板状部材の分割装置および板状部材の分割方法 |
JP2017024039A (ja) | 2015-07-21 | 2017-02-02 | 株式会社ディスコ | ウエーハの薄化方法 |
JP2017041481A (ja) | 2015-08-18 | 2017-02-23 | 株式会社ディスコ | ウエーハの加工方法 |
JP2017041482A (ja) | 2015-08-18 | 2017-02-23 | 株式会社ディスコ | ウエーハの加工方法 |
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TWI241674B (en) | 2001-11-30 | 2005-10-11 | Disco Corp | Manufacturing method of semiconductor chip |
JP5645678B2 (ja) | 2011-01-14 | 2014-12-24 | ルネサスエレクトロニクス株式会社 | 半導体装置の製造方法 |
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- 2020-05-11 WO PCT/JP2020/018795 patent/WO2020235373A1/ja active Application Filing
- 2020-05-11 KR KR1020217040979A patent/KR20220011141A/ko unknown
- 2020-05-11 TW TW109115509A patent/TW202109638A/zh unknown
- 2020-05-11 CN CN202080035527.1A patent/CN113811983A/zh active Pending
- 2020-05-11 US US17/595,658 patent/US20220223475A1/en active Pending
- 2020-05-11 JP JP2021520707A patent/JP7224456B2/ja active Active
Patent Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
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JP2006108532A (ja) | 2004-10-08 | 2006-04-20 | Disco Abrasive Syst Ltd | ウエーハの研削方法 |
JP2010263041A (ja) | 2009-05-01 | 2010-11-18 | Nitto Denko Corp | ダイアタッチフィルム付きダイシングテープおよび半導体装置の製造方法 |
JP2011171382A (ja) | 2010-02-16 | 2011-09-01 | Disco Corp | 分割方法 |
JP2016035965A (ja) | 2014-08-01 | 2016-03-17 | リンテック株式会社 | 板状部材の分割装置および板状部材の分割方法 |
JP2017024039A (ja) | 2015-07-21 | 2017-02-02 | 株式会社ディスコ | ウエーハの薄化方法 |
JP2017041481A (ja) | 2015-08-18 | 2017-02-23 | 株式会社ディスコ | ウエーハの加工方法 |
JP2017041482A (ja) | 2015-08-18 | 2017-02-23 | 株式会社ディスコ | ウエーハの加工方法 |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2021040069A (ja) * | 2019-09-04 | 2021-03-11 | キオクシア株式会社 | 半導体ウェハ、半導体ウェハの製造方法、および半導体装置の製造方法 |
JP7332398B2 (ja) | 2019-09-04 | 2023-08-23 | キオクシア株式会社 | 半導体ウェハ |
Also Published As
Publication number | Publication date |
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KR20220011141A (ko) | 2022-01-27 |
TW202109638A (zh) | 2021-03-01 |
WO2020235373A1 (ja) | 2020-11-26 |
CN113811983A (zh) | 2021-12-17 |
US20220223475A1 (en) | 2022-07-14 |
JPWO2020235373A1 (ja) | 2020-11-26 |
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