WO2012135243A1

WO2012135243A1 - Pre-grooving for wafer applied underfill film

Info

Publication number: WO2012135243A1
Application number: PCT/US2012/030783
Authority: WO
Inventors: Younsang Kim; Gina Hoang; Rose GUINO
Original assignee: Henkel Corporation
Priority date: 2011-03-28
Filing date: 2012-03-28
Publication date: 2012-10-04
Also published as: TW201246350A

Abstract

A method for preparing a silicon wafer into individual semiconductor dies, in which the silicon wafer has preapplied underfill disposed over its active circuitry, comprises (a) providing a silicon wafer with active circuitry on one face; (b) making grooves between the active circuitry in those locations on the wafer face surface where later dicing into individual semiconductor dies will occur; (c) applying an underfill encapsulant over the active circuitry and grooves on the silicon wafer face; and (d) cutting into and through the underfill encapsulant, the grooves in the active circuitry, and the silicon wafer, to separate the wafer into individual semiconductor dies.

Description

Attorney Docket No. : LDEI- 171

PRE-GROOVING FOR WAFER APPLIED UNDERFILL FILM

CROSS-REFERENCE TO RELATED APPLICATION

[0001] This application claims priority to United States Patent Application Serial No.

61/468,289 filed March 28, 201 1, the contents of which are incorporated herein by reference.

BACKGROUND OF THE INVENTION

[0002] This invention relates to a process for the fabrication of a semiconductor die.

[0003] Miniaturization and slimming of electrical and electronic equipment has led to a need for both thinner semiconductor devices and thinner semiconductor packaging. One way to produce smaller and more efficient semiconductor packages is to utilize a package having an array of metallic bumps attached to the active face of the package. The metallic bumps are disposed to match with bonding pads on a substrate. When the metal is reflowed to a melt, it connects with the bonding pads forming both electrical and mechanical connections. This metallic bump packaging is generally referred to as "flip chip" because the bumped semiconductors are flipped to be attached to their substrates.

[0004] A thermal mismatch exists between the semiconductor and the substrate, so that with repeated thermal cycling the metallic interconnections are stressed, potentially leading to failure. To counteract this, an encapsulating material, commonly called an underfill, is disposed in the gap surrounding the metallic bumps, between the semiconductor and the substrate.

[0005] Current trends in semiconductor packaging fabrication favor completing as many process steps as possible at the wafer level, allowing multiple integrated circuits to be processed at the same time, rather than individually, as occurs after die singulation. Applying underfill encapsulant over the array of metallic bumps and wafer circuitry before dicing the wafer into individual semiconductor dies is one of the operations performed at the wafer level. The purpose of the underfill encapsulant is to protect and support the metallic bumps during subsequent processing steps. The wafer is then contacted to a support tape, called a dicing tape, which supports the silicon wafer during the later dicing operation.

[0006] In one method currently used, the dicing is done by a mechanical dicing blade. The dicing blade, however, can damage the active circuitry on the wafer, requiring a reduction in cutting speed to minimize the mechanical stress. Consequently, manufacturing through-put is Attorney Docket No. : LDEI- 171 reduced. The wafer is further compromised when it has been thinned down in a grinding step, as handling becomes even more difficult due to the fragility of the thinned wafer.

[0007] In another method, stealth dicing is used to cut only through the silicon wafer without cutting through the active circuitry. Stealth dicing is a dicing method in which a laser beam is irradiated to the inside of a semiconductor wafer to selected areas, thereby weakening the silicon bonds in those areas, and making it easier to divide the silicon wafer within those areas. In this case, the underfill film needs to be brittle so that it will crack when expanded, and by the expansion separate with the wafer into individual semiconductor dies. The problem here is that an underfill tape brittle enough for expansion is very difficult to handle and limits the choices for underfill chemistry that will give good encapsulant properties.

[0008] Thus, there exists a need for a method of dicing a silicon wafer having a preapplied underfill material over its active circuitry into individual semiconductor dies without damaging the active circuitry on the face of the wafer and without the need for a brittle underfill film.

SUMMARY OF THE INVENTION

[0009] This invention is a method for preparing a silicon wafer into individual semiconductor dies, in which the silicon wafer has preapplied underfill disposed over its active circuitry. The method comprises (a) providing a silicon wafer with active circuitry on one face; (b) making grooves between the active circuitry in those locations on the wafer surface where later dicing into individual semiconductor dies will occur; (c) applying an underfill encapsulant over the active circuitry and grooves on the silicon wafer; and (d) cutting into and through the underfill encapsulant, the grooves in the active circuitry, and the silicon wafer, to separate the wafer into individual semiconductor dies. The grooves preferably are made by laser cutting. Since the grooves are much smaller than cuts through the silicon wafer, the use of laser cutting is less expensive than when full cuts are made by laser. The dicing operation can be accomplished with a mechanical blade after the application of the wafer level underfill encapsulant is applied because the stress on the active circuitry is minimized by the pre-grooving operation. The pre- grooving also permits a higher cutting speed to be used. Attorney Docket No.: LDEI-171

BRIEF DESCRIPTION OF THE DRAWINGS

[0010] Figure 1 depicts a current method for dicing a silicon semiconductor wafer 11, using a dicing blade 16. The silicon wafer has on one side active circuitry 12, an array of metallic bumps 13, and preapplied underfill encapsulant 14. Figure 2 depicts a current method for dicing a silicon semiconductor wafer 11 using a laser to weaken silicon to silicon bonds within the silicon wafer. The silicon wafer has on one side active circuitry 12, an array of metallic bumps 13, and preapplied underfill encapsulant 14. Figure 3 depicts the inventive method for dicing a silicon semiconductor wafer 11. The silicon wafer has active circuitry 12 and an array of metallic bumps 13. In the embodiment shown, the method comprises pre-grooving the active circuitry before applying the underfill encapsulant 14, followed by dicing using a dicing blade 16.

DETAILED DESCRIPTION OF THE INVENTION

[0011] The wafer is prepared from a semiconductor material, typically silicon, gallium arsenide, germanium, or similar compound semiconductor materials. The active circuitry and metallic bumps on the top side of the wafer are made according to semiconductor and metallic fabrication methods well documented in industry literature.

[0012] A dicing tape is typically used to support the wafer during dicing operations. Dicing tapes are commercially available from a number of sources and can be in the form of a heat sensitive, pressure sensitive, or UV sensitive adhesive on a carrier. The carrier is typically a flexible substrate of polyolefin or polyimide. When heat, pulling stress, or UV is applied respectively, the adhesiveness decreases. Commonly, a release liner covers the adhesive layer and can be easily removed just prior to use of the dicing tape.

[0013] In some fabrication methods, the back side of silicon wafer is thinned down to fit smaller semiconductor packaging requirements. This inevitably makes the fragile silicon wafer all the more fragile. In these processes a back grinding tape is used to protect and support the metallic bumps and top surface of the wafer during the wafer thinning process. Back grinding tapes are commercially available from a number of sources and in one form consist of a heat sensitive, pressure sensitive, or UV sensitive adhesive on a carrier. The carrier is typically a flexible substrate of polyolefin or polyimide. When heat, pulling stress, or UV is applied respectively, the adhesiveness decreases. Commonly, a release liner covers the adhesive layer and can be Attorney Docket No. : LDEI- 171 easily removed just prior to use of the back grinding tape. The back grinding operation may be performed by mechanical grinding, laser grinding, or etching. The back grinding operation is not depiced in any of the figures, but it should be understood that the invention described herein can also be performed on silicon wafers that have undergone a back grinding or thinning process.

[0014] Underfill encapsulant typically is applied in paste or film form. Film form is frequently preferred because it is less messy and easier to apply over the metallic bumps. Adhesives and encapsulants suitable as underfill chemistry that can be in the form of films are known, as are methods for making the underfill films. The thickness of the underfill material can be adjusted so that the metallic bumps can be either completely or only partially covered after lamination. In either case, the underfill material is supplied so that it fully fills the space between the

semiconductor and the intended substrate. In one embodiment, the underfill material is provided on a carrier and is protected with a release liner. Thus, the underfill material will be provided in a three layer form in which the first layer is a carrier, such as a flexible polyolefin or polyimide tape, the second layer is the underfill material, and the third layer is a release liner, in that order. Just before use, the release liner is removed and the underfill is typically applied when still attached to the carrier. After application of the underfill to the wafer, the carrier is removed.

[0015] The invention will be further described in reference to the figures. Figures 1 and 2 show prior art methods of dicing a silicon wafer 11 having active circuitry 12 and an array of metallic bumps 13 on one surface. The active circuitry and metallic bumps are covered with an underfill encapsulant 14. In both methods the silicon wafer is mounted on a dicing tape 15 to support the wafer during the dicing operation and to keep the dies in place after dicing occurs.

[0016] In the prior art method depicted in Figure 1, a silicon wafer 1 1 , having active circuitry 12 and an array of metallic bumps 13, is mounted on a dicing tape 15. An underfill film 14 is laminated over the active circuitry 12 and metallic bumps 13, after which the silicon wafer 11 is diced into individual semiconductor dies by means of a mechanical cutting blade 16. In Figure 1, element 17 represents the space between the individual semiconductors after dicing. Two problems associated with this method are that the active circuitry can be damaged by the mechanical stress of the cutting blade, and to compensate for this, cutting speed needs to be limited. Both problems reduce manufacturing through-put and increase cost. Attorney Docket No. : LDEI- 171

[0017] In the prior art method depicted in Figure 2, a silicon wafer 11, having active circuitry 12 and an array of metallic bumps 13, is mounted on a dicing tape 15. An underfill film 14 is laminated over the active circuitry 12 and metallic bumps 13. The silicon wafer only is then subjected to laser beam irradiation 18 at predetermined areas 19 within the silicon where dicing is intended. This type of laser irradiation is called stealth dicing because it is not visible externally. The laser irradiation weakens the silicon bonds in those areas 19, and makes it easy to divide the silicon wafer within those areas. In this process, individual semiconductor dies are separated from each other, after the stealth dicing, by expanding the dicing tape 15. In Figure 2, element 20 represents the space between the individual semiconductors after expansion. In this method, the underfill film 14 must be sufficiently brittle so that it cracks when expanded and crack cleanly enough so that sufficient underfill film remains with the individual semiconductor dies. An underfill film brittle enough for expansion is both very difficult to handle and limiting in the range of chemistry suitable for formulating the underfill film.

[0018] Although laser dicing completely through the underfill, circuitry and silicon wafer is a possibility, full laser dicing is expensive and the industry trend is toward methods that will reduce the use of laser beam cutting. In the inventive method shown in Figure 3, a silicon wafer 11, having active circuitry 12 and an array of metallic bumps 13, is mounted on a dicing tape 15. Laser irradiation or a mechanical blade is used to cut grooves 21 into the active circuitry 12 only in those predetermined areas where dicing is later to occur. The underfill film 14 is then laminated over the active circuitry 12, metallic bumps 13, and grooves 21. Dicing of the assembly of underfill 14, active circuitry 12, and silicon wafer 11 occurs through the grooves 21 in the active circuitry, thereby restricting or eliminating damage to the active circuitry. Dicing can be done by the less expensive blade mechanical means 16, although laser dicing is not precluded.

Claims

Attorney Docket No. : LDEI- 171 WHAT IS CLAIMED:

1. A method for preparing a silicon wafer into individual semiconductor dies comprising:

(a) providing a silicon wafer with active circuitry on one face;

(b) making grooves between the active circuitry in those locations on the wafer face where later dicing into individual semiconductor dies will occur;

(c) applying an underfill encapsulant over the active circuitry and grooves on the silicon wafer face; and

(d) cutting into and through the underfill encapsulant, the grooves in the active circuitry, and the silicon wafer, to separate the wafer into individual semiconductor dies.