JP7139697B2 - 送信装置、送信プログラム、受信装置、および受信プログラム - Google Patents

送信装置、送信プログラム、受信装置、および受信プログラム Download PDF

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Publication number
JP7139697B2
JP7139697B2 JP2018108003A JP2018108003A JP7139697B2 JP 7139697 B2 JP7139697 B2 JP 7139697B2 JP 2018108003 A JP2018108003 A JP 2018108003A JP 2018108003 A JP2018108003 A JP 2018108003A JP 7139697 B2 JP7139697 B2 JP 7139697B2
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Japan
Prior art keywords
pulse
data
message
error
predetermined
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JP2018108003A
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English (en)
Japanese (ja)
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JP2019213063A5 (https=
JP2019213063A (ja
Inventor
啓一 伊藤
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Fuji Electric Co Ltd
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Fuji Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Application filed by Fuji Electric Co Ltd filed Critical Fuji Electric Co Ltd
Priority to JP2018108003A priority Critical patent/JP7139697B2/ja
Priority to US16/383,693 priority patent/US10951327B2/en
Publication of JP2019213063A publication Critical patent/JP2019213063A/ja
Publication of JP2019213063A5 publication Critical patent/JP2019213063A5/ja
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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K7/00—Modulating pulses with a continuously-variable modulating signal
    • H03K7/08—Duration or width modulation ; Duty cycle modulation
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1004—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's to protect a block of data words, e.g. CRC or checksum
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/20—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
    • G06F11/2053—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where persistent mass storage functionality or persistent mass storage control functionality is redundant
    • G06F11/2056—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where persistent mass storage functionality or persistent mass storage control functionality is redundant by mirroring
    • G06F11/2071—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where persistent mass storage functionality or persistent mass storage control functionality is redundant by mirroring using a plurality of controllers
    • G06F11/2076—Synchronous techniques
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B14/00—Transmission systems not characterised by the medium used for transmission
    • H04B14/02—Transmission systems not characterised by the medium used for transmission characterised by the use of pulse modulation
    • H04B14/026—Transmission systems not characterised by the medium used for transmission characterised by the use of pulse modulation using pulse time characteristics modulation, e.g. width, position, interval
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L5/00—Arrangements affording multiple use of the transmission path
    • H04L5/02—Channels characterised by the type of signal
    • H04L5/04—Channels characterised by the type of signal the signals being represented by different amplitudes or polarities, e.g. quadriplex
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/0054—Detection of the synchronisation error by features other than the received signal transition
    • H04L7/0066—Detection of the synchronisation error by features other than the received signal transition detection of error based on transmission code rule
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/04—Speed or phase control by synchronisation signals
    • H04L7/041—Speed or phase control by synchronisation signals using special codes as synchronising signal
    • H04L7/044—Speed or phase control by synchronisation signals using special codes as synchronising signal using a single bit, e.g. start stop bit
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/04—Speed or phase control by synchronisation signals
    • H04L7/06—Speed or phase control by synchronisation signals the synchronisation signals differing from the information signals in amplitude, polarity or frequency or length

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  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • General Engineering & Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Security & Cryptography (AREA)
  • Detection And Prevention Of Errors In Transmission (AREA)
  • Dc Digital Transmission (AREA)
JP2018108003A 2018-06-05 2018-06-05 送信装置、送信プログラム、受信装置、および受信プログラム Active JP7139697B2 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2018108003A JP7139697B2 (ja) 2018-06-05 2018-06-05 送信装置、送信プログラム、受信装置、および受信プログラム
US16/383,693 US10951327B2 (en) 2018-06-05 2019-04-15 Transmission apparatus and receiving apparatus

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2018108003A JP7139697B2 (ja) 2018-06-05 2018-06-05 送信装置、送信プログラム、受信装置、および受信プログラム

Publications (3)

Publication Number Publication Date
JP2019213063A JP2019213063A (ja) 2019-12-12
JP2019213063A5 JP2019213063A5 (https=) 2020-11-19
JP7139697B2 true JP7139697B2 (ja) 2022-09-21

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
JP2018108003A Active JP7139697B2 (ja) 2018-06-05 2018-06-05 送信装置、送信プログラム、受信装置、および受信プログラム

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Country Link
US (1) US10951327B2 (https=)
JP (1) JP7139697B2 (https=)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP7205103B2 (ja) * 2018-08-08 2023-01-17 富士電機株式会社 受信装置、受信方法、および受信プログラム
DE102023204523A1 (de) * 2023-05-15 2024-11-21 Robert Bosch Gesellschaft mit beschränkter Haftung Verfahren und Vorrichtung zur Überwachung von Botschaften

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20140254731A1 (en) 2013-03-08 2014-09-11 Microchip Technology Incorporated Dithering Circuit for Serial Data Transmission

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3063376B2 (ja) * 1992-04-16 2000-07-12 株式会社デンソー Ｐｗｍ信号通信装置
JP4955485B2 (ja) * 2007-08-28 2012-06-20 ルネサスエレクトロニクス株式会社 水平同期検出装置
US8290094B2 (en) * 2010-01-18 2012-10-16 Infineon Technologies Ag Methods and systems for measuring data pulses
US8447004B2 (en) * 2011-01-27 2013-05-21 Freescale Semiconductor, Inc. Estimation and compensation of clock variation in received signal
US8645020B2 (en) * 2012-06-21 2014-02-04 Freescale Semiconductor, Inc. Channel diagnostic system for sent receiver
JP5974997B2 (ja) 2013-08-28 2016-08-23 株式会社デンソー 電子制御システム
US9172565B2 (en) * 2014-02-18 2015-10-27 Allegro Microsystems, Llc Signaling between master and slave components using a shared communication node of the master component
US9634715B2 (en) * 2014-02-18 2017-04-25 Allegro Microsystems, Llc Signaling between master and slave components using a shared communication node of the master component
KR102253167B1 (ko) * 2015-01-29 2021-05-18 현대모비스 주식회사 자동차 및 센서 데이터의 동기화 방법
DE102016125044B4 (de) * 2016-12-20 2018-11-15 Infineon Technologies Ag Sensorsteuerung, Sensorsignalempfänger und Sensorsystem

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20140254731A1 (en) 2013-03-08 2014-09-11 Microchip Technology Incorporated Dithering Circuit for Serial Data Transmission

Also Published As

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US10951327B2 (en) 2021-03-16
US20190372680A1 (en) 2019-12-05
JP2019213063A (ja) 2019-12-12

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