JP7111681B2 - SiCベースの超接合半導体装置 - Google Patents
SiCベースの超接合半導体装置 Download PDFInfo
- Publication number
- JP7111681B2 JP7111681B2 JP2019190772A JP2019190772A JP7111681B2 JP 7111681 B2 JP7111681 B2 JP 7111681B2 JP 2019190772 A JP2019190772 A JP 2019190772A JP 2019190772 A JP2019190772 A JP 2019190772A JP 7111681 B2 JP7111681 B2 JP 7111681B2
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor
- region
- energy
- doped
- semiconductor body
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 239000004065 semiconductor Substances 0.000 title claims description 341
- 239000007943 implant Substances 0.000 claims description 51
- 150000002500 ions Chemical class 0.000 claims description 46
- 239000002019 doping agent Substances 0.000 claims description 35
- 239000000463 material Substances 0.000 claims description 31
- 238000004519 manufacturing process Methods 0.000 claims description 27
- 238000000034 method Methods 0.000 claims description 27
- 238000009792 diffusion process Methods 0.000 claims description 25
- 239000000758 substrate Substances 0.000 claims description 19
- 229910052710 silicon Inorganic materials 0.000 claims description 18
- 239000010703 silicon Substances 0.000 claims description 18
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 15
- 238000002513 implantation Methods 0.000 claims description 15
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 claims description 15
- 229910010271 silicon carbide Inorganic materials 0.000 claims description 15
- 230000001747 exhibiting effect Effects 0.000 claims description 14
- 230000000295 complement effect Effects 0.000 claims description 9
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 claims description 8
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 8
- 229910002601 GaN Inorganic materials 0.000 claims description 6
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 claims description 6
- PMHQVHHXPFUNSP-UHFFFAOYSA-M copper(1+);methylsulfanylmethane;bromide Chemical compound Br[Cu].CSC PMHQVHHXPFUNSP-UHFFFAOYSA-M 0.000 claims description 6
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 4
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 claims description 4
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 claims description 4
- 229910052782 aluminium Inorganic materials 0.000 claims description 4
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 4
- 229910052799 carbon Inorganic materials 0.000 claims description 4
- 229910052802 copper Inorganic materials 0.000 claims description 4
- 239000010949 copper Substances 0.000 claims description 4
- 229910002804 graphite Inorganic materials 0.000 claims description 4
- 239000010439 graphite Substances 0.000 claims description 4
- 239000011133 lead Substances 0.000 claims description 4
- 229910052750 molybdenum Inorganic materials 0.000 claims description 4
- 239000011733 molybdenum Substances 0.000 claims description 4
- 235000012239 silicon dioxide Nutrition 0.000 claims description 4
- 239000000377 silicon dioxide Substances 0.000 claims description 4
- 229910052719 titanium Inorganic materials 0.000 claims description 4
- 239000010936 titanium Substances 0.000 claims description 4
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 claims description 4
- 229910052721 tungsten Inorganic materials 0.000 claims description 4
- 239000010937 tungsten Substances 0.000 claims description 4
- 238000002347 injection Methods 0.000 claims description 3
- 239000007924 injection Substances 0.000 claims description 3
- 230000000873 masking effect Effects 0.000 claims 3
- 239000000370 acceptor Substances 0.000 description 7
- 230000007704 transition Effects 0.000 description 7
- 230000008859 change Effects 0.000 description 6
- 238000000407 epitaxy Methods 0.000 description 5
- 238000013459 approach Methods 0.000 description 4
- 230000008569 process Effects 0.000 description 4
- 230000007423 decrease Effects 0.000 description 2
- 230000000903 blocking effect Effects 0.000 description 1
- JJWKPURADFRFRB-UHFFFAOYSA-N carbonyl sulfide Chemical compound O=C=S JJWKPURADFRFRB-UHFFFAOYSA-N 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 239000002800 charge carrier Substances 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 239000000945 filler Substances 0.000 description 1
- 230000006870 function Effects 0.000 description 1
- 238000005468 ion implantation Methods 0.000 description 1
- 238000010884 ion-beam technique Methods 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 238000001465 metallisation Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000005498 polishing Methods 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
- H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
- H01L29/063—Reduced surface field [RESURF] pn-junction structures
- H01L29/0634—Multiple reduced surface field (multi-RESURF) structures, e.g. double RESURF, charge compensation, cool, superjunction (SJ), 3D-RESURF, composite buffer (CB) structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/0445—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising crystalline silicon carbide
- H01L21/0455—Making n or p doped regions or layers, e.g. using diffusion
- H01L21/046—Making n or p doped regions or layers, e.g. using diffusion using ion implantation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/0445—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising crystalline silicon carbide
- H01L21/0455—Making n or p doped regions or layers, e.g. using diffusion
- H01L21/046—Making n or p doped regions or layers, e.g. using diffusion using ion implantation
- H01L21/0465—Making n or p doped regions or layers, e.g. using diffusion using ion implantation using masks
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
- H01L21/2654—Bombardment with radiation with high-energy radiation producing ion implantation in AIIIBV compounds
- H01L21/26546—Bombardment with radiation with high-energy radiation producing ion implantation in AIIIBV compounds of electrically active species
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
- H01L21/266—Bombardment with radiation with high-energy radiation producing ion implantation using masks
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
- H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/16—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System
- H01L29/1608—Silicon carbide
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/20—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
- H01L29/2003—Nitride compounds
Description
11 半導体ボディ
11-1 表面
11-2 ノンドープまたは弱ドープ領域
11-3 基材領域
11-4 ドリフト容積
11-5 ドープ層
31 第1の注入
32 第2の注入
33 エネルギー拡散器アセンブリ
33-1 入口の第1の点
33-2 入口の第2の点
35-1 第1のマスク
35-2 第2のマスク
35-11 第1のマスク要素
35-12 第1の開口
35-21 第2のマスク要素
35-22 第2の開口
36-1 第1のイオン
36-2 第2のイオン
37-2 第2の経路
71 半導体装置
72 第2の気泡
73 第1の気泡
74 注入工程
75 半導体領域
76 半導体領域
81 半導体装置
82 トレンチ
83 マスク
84 トレンチ充填材
111-1 第1の半導体領域
111-2 第1の半導体領域
111-11 近位端
111-12 遠位端
111-13 接合領域
111-21 近位端
111-22 遠位端
111-23 接合領域
112 第2の半導体領域
331 支持層
331-1 レセプタ側
332 拡散器構造
332-1 拡散器素子
332-2 拡散器素子
332-3 拡散器素子
332-4 拡散器素子
711 半導体基材領域
712 ドープ半導体領域
713 ノンドープまたは弱ドープエピタキシャル層
714 マスク
811 半導体基材領域
812 ドープ半導体領域
A 距離
b1 延伸深さ
b2 延伸深さ
c1 濃度プロファイル
d1 近位幅
d2 遠位幅
B 延伸方向
D 幅
E1 第1のエネルギー
E1’ 第1の低下エネルギー
E2 第2のエネルギー
E2’ 第2の低下エネルギー
α 傾斜角
β 延伸角
Claims (11)
- 半導体装置(1)の製造方法であって、
シリコンのドーパント拡散係数より小さいドーパント拡散係数を示す半導体ボディ材料を含む半導体ボディ(11)を設ける工程と、
第1の導電型のドーパントでドープされた少なくとも1つの第1の半導体領域(111-1、111-2)を前記半導体ボディ(11)内に生成する工程であって、第1の注入イオンの第1の注入(31)を適用する工程を含む、工程と、
前記少なくとも1つの第1の半導体領域(111-1、111-2)に隣接するとともに前記第1の導電型と相補的な第2の導電型のドーパントでドープされた少なくとも1つの第2の半導体領域(112)を前記半導体ボディ(11)内に生成する工程であって、第2の注入イオンの第2の注入(32)を適用する工程を含み、前記少なくとも1つの第1の半導体領域及び前記少なくとも1つの第2の半導体領域が、超接合構造を有するドリフト領域を形成する、工程と、
前記少なくとも1つの第2の半導体領域より高ドープである半導体領域を含む基材領域を形成する工程と、を含み、
前記ドリフト領域は、前記基材領域に接触し、
前記少なくとも1つの第1の半導体領域は、前記ドリフト領域内で終端しており、前記少なくとも1つの第1の半導体領域がない前記ドリフト領域の区域によって前記基材領域から離間されている方法であって、前記方法は、
注入装置と前記半導体ボディ(11)との間にエネルギー拡散器アセンブリ(33)を配置する工程であって、前記エネルギー拡散器アセンブリ(33)は、注入イオンを受け取るように構成され、かつ出力注入イオンが、前記エネルギー拡散器アセンブリ(33)に入る際のそのエネルギーと比較して低下されたエネルギーを示すように、受け取った注入イオンを出力するように構成され、前記エネルギーの低下量は前記エネルギー拡散器アセンブリ(33)に入る点および/または角度に依存する、工程と、
前記第1の注入イオンと前記第2の注入イオンとの少なくとも1つが前記半導体ボディ(11)に入る前に前記エネルギー拡散器アセンブリ(33)を横断するように前記第1の注入(31)および前記第2の注入(32)を適用する工程と、
第1のマスク(35-1)により前記半導体ボディ(11)の表面(11-1)をマスクする工程であって、前記第1の注入(31)は前記表面(11-1)が前記第1のマスク(35-1)でマスクされている状態で適用される工程と、
第2のマスク(35-2)により前記半導体ボディ(11)の前記表面(11-1)をマスクする工程であって、前記第2の注入(32)は前記表面(11-1)が前記第2のマスク(35-2)でマスクされた状態で適用され、前記第2のマスク(35-2)は前記第1のマスク(35-1)の構造と相補的な構造を示し、かつ、前記第1のマスク(35-1)によってマスクされていない領域が、前記第2のマスク(35-2)によってマスクされている領域よりも狭い、マスクする工程と、
をさらに含む、方法。 - 前記第2の注入(32)を適用する前に前記第1のマスク(35-1)を除去する工程をさらに含む、請求項1に記載の方法。
- 前記エネルギー拡散器アセンブリ(33)を生成するために前記第2のマスク(35-2)上にエネルギー拡散器材料を配置する工程であって、前記エネルギー拡散器材料は、シリコン、二酸化ケイ素、アルミニウム、炭化ケイ素、グラファイト、炭素、タングステン、モリブデン、チタン、鉛、銅のうちの少なくとも1つを含む、工程をさらに含む、請求項1に記載の方法。
- 前記エネルギー拡散器アセンブリ(33)を生成するために前記第1のマスク(35-1)上にエネルギー拡散器材料を配置する工程であって、前記エネルギー拡散器材料は、シリコン、二酸化ケイ素、アルミニウム、炭化ケイ素、グラファイト、炭素、タングステン、モリブデン、チタン、鉛、銅のうちの少なくとも1つを含む、工程をさらに含む、請求項1に記載の方法。
- 前記エネルギー拡散器アセンブリ(33)を生成するために前記半導体ボディ(11)上にエネルギー拡散器材料を配置する工程であって、前記エネルギー拡散器材料は、シリコン、二酸化ケイ素、アルミニウム、炭化ケイ素、グラファイト、炭素、タングステン、モリブデン、チタン、鉛、銅のうちの少なくとも1つを含む、工程をさらに含む請求項1に記載の方法。
- 前記半導体ボディ(11)の前記半導体ボディ材料は、炭化ケイ素、窒化ガリウム、窒化アルミニウム、シリコンのドーパント拡散係数より少なくとも2桁低いドーパント拡散係数を示す半導体材料のうちの少なくとも1つを含む、請求項1に記載の方法。
- 前記半導体ボディ(11)は当初ノンドープまたは弱ドープである領域(11-2)を含み、前記少なくとも1つの第1の半導体領域(111-1、111-2)と前記少なくとも1つの第2の半導体領域(112)とは前記当初ノンドープまたは弱ドープである領域(11-2)内に生成される、請求項1に記載の方法。
- 前記当初ノンドープまたは弱ドープである領域(11-2)は、炭化ケイ素層、窒化ガリウム層、窒化アルミニウム層、シリコンのドーパント拡散係数より少なくとも2桁低いドーパント拡散係数を示す半導体材料の層のうちの1つである、請求項7に記載の方法。
- 前記第1の注入(31)および前記第2の注入(32)は、前記少なくとも1つの第1の半導体領域(111-1、111-2)と前記少なくとも1つの第2の半導体領域(112)とにより前記半導体ボディ(11)内に超接合構造を確立するために適用される、請求項1に記載の方法。
- 前記少なくとも1つの第1の半導体領域のドーピング濃度が、前記少なくとも1つの第2の半導体領域のドーピング濃度に同等である、請求項1に記載の方法。
- 前記基材領域と前記ドリフト領域との間に更にドープされた層を形成する工程、をさらに含み、
前記更にドープされた層は、前記第2の導電型のドーパントでドープされている、請求項1に記載の方法。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE102015202121.1A DE102015202121B4 (de) | 2015-02-06 | 2015-02-06 | SiC-basierte Supersperrschicht-Halbleitervorrichtungen und Verfahren zur Herstellung dieser |
DE102015202121.1 | 2015-02-06 |
Related Parent Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2016020504A Division JP6647897B2 (ja) | 2015-02-06 | 2016-02-05 | SiCベースの超接合半導体装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2020038975A JP2020038975A (ja) | 2020-03-12 |
JP7111681B2 true JP7111681B2 (ja) | 2022-08-02 |
Family
ID=56498564
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2016020504A Active JP6647897B2 (ja) | 2015-02-06 | 2016-02-05 | SiCベースの超接合半導体装置 |
JP2019190772A Active JP7111681B2 (ja) | 2015-02-06 | 2019-10-18 | SiCベースの超接合半導体装置 |
Family Applications Before (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2016020504A Active JP6647897B2 (ja) | 2015-02-06 | 2016-02-05 | SiCベースの超接合半導体装置 |
Country Status (4)
Country | Link |
---|---|
US (2) | US9859361B2 (ja) |
JP (2) | JP6647897B2 (ja) |
CN (1) | CN105870162A (ja) |
DE (1) | DE102015202121B4 (ja) |
Families Citing this family (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US11075264B2 (en) * | 2016-05-31 | 2021-07-27 | Cree, Inc. | Super junction power semiconductor devices formed via ion implantation channeling techniques and related methods |
DE102016110429A1 (de) * | 2016-06-06 | 2017-12-07 | Infineon Technologies Ag | Energiefilter zum Verarbeiten einer Leistungshalbleitervorrichtung |
DE102016110523B4 (de) * | 2016-06-08 | 2023-04-06 | Infineon Technologies Ag | Verarbeiten einer Leistungshalbleitervorrichtung |
DE102016122791B3 (de) * | 2016-11-25 | 2018-05-30 | mi2-factory GmbH | Ionenimplantationsanlage, Filterkammer und Implantationsverfahren unter Einsatz eines Energiefilterelements |
DE102018123596A1 (de) * | 2017-10-27 | 2019-05-02 | Infineon Technologies Ag | Halbleitervorrichtung mit Abschlussstruktur, die Feldzonen enthält, und Herstellungsverfahren |
US11380803B2 (en) | 2017-10-30 | 2022-07-05 | Taiwan Semiconductor Manufacturing Co., Ltd. | Semiconductor device structure and method for forming the same |
JP6977509B2 (ja) * | 2017-11-29 | 2021-12-08 | 株式会社デンソー | 半導体基板の製造方法 |
JP7095342B2 (ja) * | 2018-03-20 | 2022-07-05 | 株式会社デンソー | 炭化珪素半導体装置およびその製造方法 |
US10957759B2 (en) * | 2018-12-21 | 2021-03-23 | General Electric Company | Systems and methods for termination in silicon carbide charge balance power devices |
US11171248B2 (en) | 2019-02-12 | 2021-11-09 | Semiconductor Components Industries, Llc | Schottky rectifier with surge-current ruggedness |
DE102019112773B4 (de) * | 2019-05-15 | 2023-11-30 | mi2-factory GmbH | Vorrichtung und Verfahren zur Implantation von Teilchen in ein Substrat |
DE102019112985A1 (de) * | 2019-05-16 | 2020-11-19 | mi2-factory GmbH | Verfahren zur Herstellung von Halbleiterbauelementen |
DE102019114312A1 (de) | 2019-05-28 | 2020-12-03 | Infineon Technologies Ag | Siliziumcarbid-vorrichtung mit kompensationsgebiet und herstellungsverfahren |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2003273355A (ja) | 2002-03-18 | 2003-09-26 | Toshiba Corp | 半導体素子およびその製造方法 |
JP2004119611A (ja) | 2002-09-25 | 2004-04-15 | Toshiba Corp | 電力用半導体素子 |
JP2004363515A (ja) | 2003-06-09 | 2004-12-24 | Mitsubishi Electric Corp | 炭化珪素半導体装置の製造方法 |
JP5727027B2 (ja) | 2010-11-04 | 2015-06-03 | マカフィー, インコーポレイテッド | データの特定の組合せを保護するシステム及び方法 |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB2078441A (en) * | 1980-06-17 | 1982-01-06 | Westinghouse Electric Corp | Forming impurity regions in semiconductor bodies by high energy ion irradiation |
WO1999023703A1 (de) * | 1997-11-03 | 1999-05-14 | Infineon Technologies Ag | Hochspannungsfeste randstruktur für halbleiterbauelemente |
JP3851744B2 (ja) * | 1999-06-28 | 2006-11-29 | 株式会社東芝 | 半導体装置の製造方法 |
JP3994703B2 (ja) * | 2001-08-29 | 2007-10-24 | 株式会社デンソー | 炭化珪素半導体装置およびその製造方法 |
FR2858694B1 (fr) * | 2003-08-07 | 2006-08-18 | Commissariat Energie Atomique | Procede de realisation de motifs a flancs inclines par photolithographie |
WO2005078758A1 (en) * | 2004-02-18 | 2005-08-25 | Waseda University | Ion implantation method and ion implantation apparatus |
JP5188037B2 (ja) * | 2006-06-20 | 2013-04-24 | 株式会社東芝 | 半導体装置 |
JP2007311669A (ja) | 2006-05-22 | 2007-11-29 | Toshiba Corp | 半導体装置及びその製造方法 |
US20120273916A1 (en) * | 2011-04-27 | 2012-11-01 | Yedinak Joseph A | Superjunction Structures for Power Devices and Methods of Manufacture |
-
2015
- 2015-02-06 DE DE102015202121.1A patent/DE102015202121B4/de active Active
-
2016
- 2016-02-04 CN CN201610078275.6A patent/CN105870162A/zh active Pending
- 2016-02-05 US US15/016,680 patent/US9859361B2/en active Active
- 2016-02-05 JP JP2016020504A patent/JP6647897B2/ja active Active
-
2017
- 2017-12-26 US US15/854,341 patent/US10541301B2/en active Active
-
2019
- 2019-10-18 JP JP2019190772A patent/JP7111681B2/ja active Active
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2003273355A (ja) | 2002-03-18 | 2003-09-26 | Toshiba Corp | 半導体素子およびその製造方法 |
JP2004119611A (ja) | 2002-09-25 | 2004-04-15 | Toshiba Corp | 電力用半導体素子 |
JP2004363515A (ja) | 2003-06-09 | 2004-12-24 | Mitsubishi Electric Corp | 炭化珪素半導体装置の製造方法 |
JP5727027B2 (ja) | 2010-11-04 | 2015-06-03 | マカフィー, インコーポレイテッド | データの特定の組合せを保護するシステム及び方法 |
Also Published As
Publication number | Publication date |
---|---|
JP2020038975A (ja) | 2020-03-12 |
US20160233295A1 (en) | 2016-08-11 |
JP2016192541A (ja) | 2016-11-10 |
DE102015202121B4 (de) | 2017-09-14 |
US20180138266A1 (en) | 2018-05-17 |
DE102015202121A1 (de) | 2016-08-11 |
US10541301B2 (en) | 2020-01-21 |
CN105870162A (zh) | 2016-08-17 |
JP6647897B2 (ja) | 2020-02-14 |
US9859361B2 (en) | 2018-01-02 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP7111681B2 (ja) | SiCベースの超接合半導体装置 | |
KR102204272B1 (ko) | 게이트 트렌치들 및 매립된 종단 구조체들을 갖는 전력 반도체 디바이스들 및 관련 방법들 | |
JP6109930B2 (ja) | 適応的電荷平衡エッジ終端 | |
US11552172B2 (en) | Silicon carbide device with compensation layer and method of manufacturing | |
DE102014110681B4 (de) | Rückwärts leitender igbt und herstellungsverfahren dafür | |
CN110034173B (zh) | 宽带隙半导体器件和形成宽带隙半导体器件的方法 | |
JP5867606B2 (ja) | 半導体装置および半導体装置の製造方法 | |
WO2017209825A1 (en) | Superjunction power silicon carbide semiconductor devices formed via ion implantation channeling techniques and related methods | |
US20120299094A1 (en) | Semiconductor device having a super junction structure and method of manufacturing the same | |
US20090140327A1 (en) | Semiconductor device and manufacturing method of the same | |
US9293528B2 (en) | Field-effect semiconductor device and manufacturing therefor | |
JP6782529B2 (ja) | 半導体装置 | |
US8710585B1 (en) | High voltage fast recovery trench diode | |
US20200381253A1 (en) | Silicon carbide device with compensation region and method of manufacturing | |
US9825165B2 (en) | Charge-compensation device | |
JP2018182279A (ja) | 半導体装置 | |
US20180061979A1 (en) | Method of Manufacturing a Superjunction Semiconductor Device and Superjunction Semiconductor Device | |
US11349019B2 (en) | Semiconductor device with an expanded doping concentration distribution in an accumulation region | |
WO2019186785A1 (ja) | 炭化珪素半導体装置およびその製造方法 | |
US10090408B2 (en) | Semiconductor device and method of manufacturing semiconductor device | |
KR101121574B1 (ko) | 전하 균형 전력 디바이스 및 그 제조 방법 | |
JP6777198B2 (ja) | 半導体装置 | |
JP6491267B2 (ja) | パワー半導体素子における超接合構造 | |
US11024502B2 (en) | Semiconductor devices and methods for forming semiconductor devices | |
CN112599597A (zh) | 具有结构化的阻挡区的二极管 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20191113 |
|
A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20191113 |
|
A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20201030 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20201117 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20210215 |
|
A02 | Decision of refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A02 Effective date: 20210330 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20210712 |
|
C60 | Trial request (containing other claim documents, opposition documents) |
Free format text: JAPANESE INTERMEDIATE CODE: C60 Effective date: 20210712 |
|
A911 | Transfer to examiner for re-examination before appeal (zenchi) |
Free format text: JAPANESE INTERMEDIATE CODE: A911 Effective date: 20210721 |
|
C21 | Notice of transfer of a case for reconsideration by examiners before appeal proceedings |
Free format text: JAPANESE INTERMEDIATE CODE: C21 Effective date: 20210727 |
|
A912 | Re-examination (zenchi) completed and case transferred to appeal board |
Free format text: JAPANESE INTERMEDIATE CODE: A912 Effective date: 20210924 |
|
C211 | Notice of termination of reconsideration by examiners before appeal proceedings |
Free format text: JAPANESE INTERMEDIATE CODE: C211 Effective date: 20210928 |
|
C22 | Notice of designation (change) of administrative judge |
Free format text: JAPANESE INTERMEDIATE CODE: C22 Effective date: 20211109 |
|
C302 | Record of communication |
Free format text: JAPANESE INTERMEDIATE CODE: C302 Effective date: 20220328 |
|
C13 | Notice of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: C13 Effective date: 20220329 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20220413 |
|
C22 | Notice of designation (change) of administrative judge |
Free format text: JAPANESE INTERMEDIATE CODE: C22 Effective date: 20220419 |
|
C23 | Notice of termination of proceedings |
Free format text: JAPANESE INTERMEDIATE CODE: C23 Effective date: 20220524 |
|
C03 | Trial/appeal decision taken |
Free format text: JAPANESE INTERMEDIATE CODE: C03 Effective date: 20220621 |
|
C30A | Notification sent |
Free format text: JAPANESE INTERMEDIATE CODE: C3012 Effective date: 20220621 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20220721 |
|
R150 | Certificate of patent or registration of utility model |
Ref document number: 7111681 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R150 |