JP7080867B2 - Ｓｎ－Ｂｉ－Ｉｎ系低融点接合部材、微小部材および半導体電子回路、バンプの製造方法ならびに半導体電子回路の実装方法 - Google Patents

Ｓｎ－Ｂｉ－Ｉｎ系低融点接合部材、微小部材および半導体電子回路、バンプの製造方法ならびに半導体電子回路の実装方法 Download PDF

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JP7080867B2
JP7080867B2 JP2019165701A JP2019165701A JP7080867B2 JP 7080867 B2 JP7080867 B2 JP 7080867B2 JP 2019165701 A JP2019165701 A JP 2019165701A JP 2019165701 A JP2019165701 A JP 2019165701A JP 7080867 B2 JP7080867 B2 JP 7080867B2
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Japan
Prior art keywords
plating
melting point
low melting
plated
mass
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JP2019165701A
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Japanese (ja)
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JP2021041430A (ja
JP2021041430A5 (enrdf_load_stackoverflow
Inventor
弘敏 西
毅 沢井
謙一郎 城川
聡一朗 尾前
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Shinryo Corp
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Shinryo Corp
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Priority to JP2019165701A priority Critical patent/JP7080867B2/ja
Application filed by Shinryo Corp filed Critical Shinryo Corp
Priority to KR1020227011610A priority patent/KR20220055494A/ko
Priority to PCT/JP2020/033647 priority patent/WO2021049437A1/ja
Priority to US17/641,568 priority patent/US20220395935A1/en
Priority to EP20863183.8A priority patent/EP4029639A4/en
Priority to TW109131104A priority patent/TWI879799B/zh
Publication of JP2021041430A publication Critical patent/JP2021041430A/ja
Publication of JP2021041430A5 publication Critical patent/JP2021041430A5/ja
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/11—Manufacturing methods
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/8119—Arrangement of the bump connectors prior to mounting
    • H01L2224/81191—Arrangement of the bump connectors prior to mounting wherein the bump connectors are disposed only on the semiconductor or solid-state body

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  • Electric Connection Of Electric Components To Printed Circuits (AREA)
JP2019165701A 2019-09-11 2019-09-11 Ｓｎ－Ｂｉ－Ｉｎ系低融点接合部材、微小部材および半導体電子回路、バンプの製造方法ならびに半導体電子回路の実装方法 Active JP7080867B2 (ja)

Priority Applications (6)

Application Number Priority Date Filing Date Title
JP2019165701A JP7080867B2 (ja) 2019-09-11 2019-09-11 Ｓｎ－Ｂｉ－Ｉｎ系低融点接合部材、微小部材および半導体電子回路、バンプの製造方法ならびに半導体電子回路の実装方法
PCT/JP2020/033647 WO2021049437A1 (ja) 2019-09-11 2020-09-04 Ｓｎ－Ｂｉ－Ｉｎ系低融点接合部材およびその製造方法、ならびに半導体電子回路およびその実装方法
US17/641,568 US20220395935A1 (en) 2019-09-11 2020-09-04 Sn-bi-in-based low melting-point joining member, production method therefor, semiconductor electronic circuit, and mounting method therefor
EP20863183.8A EP4029639A4 (en) 2019-09-11 2020-09-04 SN-BI BASED LOW MELTING POINT CONNECTOR, METHOD OF MANUFACTURE THEREOF, SEMICONDUCTOR ELECTRONIC CIRCUIT AND ASSEMBLY METHOD THEREOF
KR1020227011610A KR20220055494A (ko) 2019-09-11 2020-09-04 Sn-Bi-In계 저융점 접합 부재 및 그 제조 방법, 및 반도체 전자 회로 및 그 실장 방법
TW109131104A TWI879799B (zh) 2019-09-11 2020-09-10 Ｓｎ－Ｂｉ－Ｉｎ系低熔點接合構件及其製造方法，以及半導體電子回路及其構裝方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2019165701A JP7080867B2 (ja) 2019-09-11 2019-09-11 Ｓｎ－Ｂｉ－Ｉｎ系低融点接合部材、微小部材および半導体電子回路、バンプの製造方法ならびに半導体電子回路の実装方法

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JP2021041430A JP2021041430A (ja) 2021-03-18
JP2021041430A5 JP2021041430A5 (enrdf_load_stackoverflow) 2022-01-20
JP7080867B2 true JP7080867B2 (ja) 2022-06-06

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Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP7080939B2 (ja) * 2020-09-04 2022-06-06 株式会社新菱 低融点接合部材およびその製造方法ならびに半導体電子回路およびその実装方法
JP7590236B2 (ja) * 2021-03-17 2024-11-26 株式会社三共 遊技機

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000511466A (ja) 1996-05-10 2000-09-05 フォード、モーター、カンパニー ロウ組成
JP2001219267A (ja) 2000-02-09 2001-08-14 Nippon Macdermid Kk 錫−インジウム−ビスマスはんだ合金めっき層の形成方法
WO2008016140A1 (en) 2006-08-04 2008-02-07 Panasonic Corporation Bonding material, bonded portion and circuit board
JP5534122B1 (ja) 2014-02-04 2014-06-25 千住金属工業株式会社 核ボール、はんだペースト、フォームはんだ、フラックスコート核ボールおよびはんだ継手
WO2016056656A1 (ja) 2014-10-10 2016-04-14 石原ケミカル株式会社 合金バンプの製造方法
JP2018079480A (ja) 2016-11-14 2018-05-24 住友金属鉱山株式会社 低温用のＢｉ−Ｉｎ−Ｓｎ系はんだ合金、それを用いた電子部品実装基板及びその実装基板を搭載した装置

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5344607A (en) * 1993-06-16 1994-09-06 International Business Machines Corporation Lead-free, high tin, ternary solder alloy of tin, bismuth, and indium

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000511466A (ja) 1996-05-10 2000-09-05 フォード、モーター、カンパニー ロウ組成
JP2001219267A (ja) 2000-02-09 2001-08-14 Nippon Macdermid Kk 錫−インジウム−ビスマスはんだ合金めっき層の形成方法
WO2008016140A1 (en) 2006-08-04 2008-02-07 Panasonic Corporation Bonding material, bonded portion and circuit board
JP5534122B1 (ja) 2014-02-04 2014-06-25 千住金属工業株式会社 核ボール、はんだペースト、フォームはんだ、フラックスコート核ボールおよびはんだ継手
WO2016056656A1 (ja) 2014-10-10 2016-04-14 石原ケミカル株式会社 合金バンプの製造方法
JP2018079480A (ja) 2016-11-14 2018-05-24 住友金属鉱山株式会社 低温用のＢｉ−Ｉｎ−Ｓｎ系はんだ合金、それを用いた電子部品実装基板及びその実装基板を搭載した装置

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