JP7080867B2 - Sn-Bi-In system low melting point bonding member, micro member and semiconductor electronic circuit, bump manufacturing method and semiconductor electronic circuit mounting method - Google Patents

Description

The present invention relates to a lead-free solder material for semiconductor mounting, and particularly to a Sn-Bi-In-based joining member that can be used in a low temperature region.

In recent years, regulations on harmful substances to the environment have become more and more strict due to RoHS regulations, etc., and solder alloys used for the purpose of joining electronic components including semiconductor chips to printed wiring boards (PWB) are also subject to regulation. .. Since lead (Pd) has been used as a main component of these solder components for a long time, lead-free solder alloys (hereinafter, also referred to as "Pd-free solder alloys") are being actively developed.

Conductive bonding materials such as solder alloys used when bonding electronic components to printed wiring boards are for high temperatures (about 260 ° C to 400 ° C) and for medium and low temperatures (about 140 ° C to 230 ° C) depending on the usage limit temperature. Among them, the low temperature solder alloy generally refers to a solder alloy having a melting point lower than the melting point of the eutectic alloy of Pb-63Sn of 183 ° C. However, recently, some electronic components have very low heat resistance such as flexible resin substrates and piezoelectric ceramics PZT (lead titanate zirconate) substrates, and their functions deteriorate when exposed to high temperatures. Some of them are broken, and the bonding temperature at the time of mounting such electronic components is 135 ° C. or lower, preferably 120 ° C. or lower, more preferably 110 ° C. or lower, and therefore it is necessary to solder at a low temperature of 110 ° C. or lower. There is a demand for solder alloys for low temperatures.

In addition, the cost per function of integrated circuits has been reduced by miniaturizing CMOS technology, and recently in the mounting process, miniaturized chips have been integrated at the package level to increase the number of chips per unit area, multi-layering, and compounding. Integration is progressing. The joining method in mounting has also progressed from lead wires to solder balls and solder bumps, and it is desired that solder joining be simple and cost-reduced at the time of mounting.

Conventionally, as Pb-free solder, Sn-3.5Ag (melting point = 221 ° C.), Sn-0.7Cu (melting point = 227 ° C.), Sn-Ag-Cu (melting point = 217 ° C.) and the like have been used. However, these solder alloys have a high melting point of 200 ° C. or higher, and it is difficult to use them at a soldering temperature of 135 ° C. or lower when mounting a semiconductor.

As the Pb-free low-temperature solder alloy, Patent Document 1 describes a low-temperature bonding solder alloy having Sn 37 to 47% by mass, Ag 0.1% by mass or more and less than 1.0% by mass, and Bi remaining.

Patent Document 2 describes a solder alloy composed of Sn40% by mass, Bi55% by mass and In5% by mass, and a solder alloy composed of Sn34% by mass, Bi46% by mass and In20% by mass. Further, a solder powder obtained by forming a sphere of the solder alloy, a solder paste, a soldering method using these, and the like are described.

In Patent Document 3, the tin / indium layer of the first layer is first plated, then the glossy tin / bismuth layer of the second layer is plated on the tin / indium layer, and then the first and second platings are performed. A method for forming a Sn—In—Bi solder alloy plated layer that reflows the layer is described.

Japanese Patent No. 3347512 Japanese Patent No. 3224185 Japanese Unexamined Patent Publication No. 2001-219267

The Sn—Bi—Ag-based solder alloy described in Patent Document 1 has a melting point of 137 to 139 ° C. Since the bonding temperature at the time of mounting is often required to be about + 20 ° C., the bonding temperature at the time of mounting must be 157 ° C. or higher and cannot be bonded at 135 ° C. or lower.

The Sn—Bi—In based solder alloy described in Patent Document 2 also has a melting point of 117 to 139 ° C., so that the bonding temperature at the time of mounting is required to be 137 ° C. or higher and cannot be bonded at 135 ° C. or lower. In addition, the solder alloy is made by blending three types of metals, Sn-Bi-In, and heating and melting in an electric furnace (400 ° C.). Productivity is poor because the next step is "crushing → solder paste" to make it a solder material. It is only described that the solder alloy is plated on the surface of the object to be plated, but the details of the plating treatment are not shown.

Since the Sn-In-Bi-based plating method described in Patent Document 3 uses two types of two-component plating baths, it is necessary to replenish the two components consumed in plating, which complicates the operation management of the plating bath. It is difficult to stabilize the composition of the plating. Furthermore, since the composition of the components in the plating bath is limited, it is expected that the range of composition of the plated laminate will be limited. Further, since the melting point is 180 to 220 ° C. in the composition range of the solder alloy described in the document, the reflow temperature described is as high as about 260 ° C., and the soldering is performed when the bonding temperature at the time of mounting is 135 ° C. or lower. I can't.

In addition, electronic products that use solder alloys as the conductive joining material when mounting semiconductor electronic components are used under normal usage environments such as seasonal fluctuations, indoors and outdoors, and self-heating due to the operation of electronic products, and therefore have a melting point of 60. At about ~ 62 ° C., there is a concern that the bonding strength may decrease, and the durability may be poor.

As mentioned above, in recent years, regulations on harmful substances such as RoHS regulations have become stricter, and Pb-containing solder alloys that have been used as conductive bonding materials in the manufacturing process of semiconductor products are also subject to regulation. Conversion to Pb-free solder alloys is required.

Further, with the progress of miniaturization of integrated circuits, there is a demand for cost reduction such as improvement of miniaturization accuracy of the joining method at the time of mounting and improvement of the process convenience thereof.

In addition, in order to meet the demand for higher functionality of smartphones and sensors, resin substrates used for flexible substrates and stretchable substrates, piezoelectric elements CdTe semiconductor elements, CCD elements, phorogram elements, and other low heat resistant wiring boards and electronic elements. Demand is expected to increase, and along with this, there is a demand for the development of conductive bonding materials and their bonding methods that can be bonded at low temperatures (135 ° C or lower) in the mounting process.

The present invention has been made in view of such problems, and an object of the present invention is that the bonding reliability is high, low temperature bonding at 90 to 135 ° C. is possible, and the normal usage environment of electronic products is used. It is an object of the present invention to provide a Pb-free low melting point conductive bonding member capable of maintaining the bonding durability underneath.

The conventional Pb-free conductive bonding materials, Sn-Ag, Sn-Cu, and Sn-Ag-Cu, have a melting point of 200 ° C. or higher, and the Sn-Bi and Sn-Bi-In have a melting point of about 120. The temperature is at least 140 ° C. or higher, and the reflow temperature (joining temperature) at the time of mounting needs to be higher than this by about 20 ° C. or higher, so that the reflow temperature is at least 140 ° C. or higher. As a result of diligent studies, the present inventors obtained by laminating and plating Sn-Bi-In independently on the surface of the object to be plated in a specific composition range, and heating and reflowing this at 90 to 135 ° C. The Sn-Bi-In-based low melting point solder alloy to be obtained has a melting point of 69 to 110 ° C., and can be mounted at a low temperature of about 90 to 135 ° C. even when used as a bonding member, and has excellent bonding strength. It came to. That is, the present invention relates to the following invention.

<1> In the Sn-Bi-In ternary phase diagram, where (x, y, z) is a point where Sn is x mass%, Bi is y mass%, and In is z mass%.
Within the range of the square whose vertices are the four points of point 1 (1, 69, 30), point 2 (26, 52, 22), point 3 (35, 25, 40), and point 4 (1, 59, 40). A Sn—Bi—In-based low melting point bonding member containing a Sn—Bi—In alloy having a melting point of 69 to 110 ° C.
<2> The Sn—Bi-In alloy contains one or more mixed components selected from the group consisting of Ag, Cu, Ni, Zn, and Sb, and the sum of the mixed components in the Sn—Bi-In alloy. The Sn-Bi-In-based low melting point bonding member according to <1>, wherein the mass is 0.001 to 3.0% by mass.
<3> One or more undermetals selected from the group consisting of Ti, Ni, Cu, Au, Sn, Ag, Cr, Pd, Pt, W, Co, TiW, NiP, NiB, NiCo, and NiV as the undermetal. The Sn—Bi—In-based low melting point bonding member according to <1> or <2>, wherein the Sn—Bi—In alloy is arranged on the film formed of the above.
<4> The Sn-Bi- In-based low melting point bonding member.
<5> The Sn-Bi-In-based low melting point joining member according to <4>, which has bumps formed by heating and reflowing the laminated plating layer.
<6> Selected from the group consisting of micrometal balls having a size of 1 mm or less, microresin balls having a conductive metal coating layer, microresin balls having a solder alloy coating layer, and micropin members. The Sn—Bi—In-based low melting point bonding member according to any one of <1> to <5>, which has a micromember having the Sn—Bi—In alloy on the surface layer of any core material.
<7> The Sn-Bi-In-based low melting point bonding member according to <6>, wherein the minute member is mounted on a pad of a conductive bonding portion and heat reflowed to arrange the minute member.
<8> A semiconductor electronic circuit comprising the Sn—Bi—In-based low melting point bonding member according to any one of <1> to <7>.

The Sn-Bi-In-based low melting point bonding member of the present invention has high bonding reliability, can be bonded at 90 to 135 ° C., and is excellent in low temperature mountability.

It is a Sn-Bi-In system ternary phase diagram of an Example and a comparative example. It is a manufacturing process conceptual diagram until the solder alloy bump which concerns on this invention is formed. It is a conceptual diagram of the mounting process by the solder alloy bump which concerns on this invention. It is a DSC measurement profile of Example 2. 4 is a DSC measurement profile of Example 4. FIG. 5 is a DSC measurement profile of Example 5. 8 is a DSC measurement profile of Example 8. 10 is a DSC measurement profile of Example 10. 12 is a DSC measurement profile of Example 12. It is a DSC measurement profile of Comparative Example 2. It is a DSC measurement profile of Comparative Example 4. 6 is a DSC measurement profile of Comparative Example 6. It is a DSC measurement profile of Comparative Example 8. It is a DSC measurement profile of Comparative Example 9. 6 is an external SEM photograph of the plated laminate of Example 16. 16 is a cross section SEM-EDX of the plated laminate of Example 16. It is a bump appearance SEM photograph of Example 16. It is a bump appearance SEM photograph of Example 16. 16 is the bump cross section SEM-EDX of Example 16. It is a conceptual diagram of a share strength tester. It is a relationship diagram of In concentration and bump share strength. It is an appearance photograph of the plating laminate on the minute metal ball of Example 17. It is an appearance photograph of the plating laminate on the microresin ball of Example 18. It is an appearance photograph of the plating laminate on the Cu pin of Example 19.

The present invention will be described in detail below, but the present invention is not limited to the following embodiments, and can be variously modified and carried out within the scope of the gist thereof. In addition, when the expression "-" is used in this specification, it shall be used as an expression including numerical values or physical property values before and after the expression.

[Sn-Bi-In-based low melting point bonding member of the present invention]
The Sn-Bi-In-based low melting point bonding member of the present invention has a Sn-Bi-In ternary state diagram in which Sn is x mass%, Bi is y mass%, and In is z mass% (x, When y, z), four points of point 1 (1, 69, 30), point 2 (26, 52, 22), point 3 (35, 25, 40), and point 4 (1, 59, 40). Includes a Sn—Bi-In alloy having a melting point of 69 to 110 ° C. within the range of the quadrangle having the apex. Hereinafter, the "Sn-Bi-In-based low melting point joining member" of the present invention may be simply referred to as "the joining member of the present invention".

The joining member of the present invention is, for example, a method of blending each raw material metal of a Sn-Bi-In alloy and melting it to produce a Sn-Bi-In-based low melting point solder alloy, or a method of producing Sn on the surface of an object to be plated. A method of forming a low melting point plated laminate by laminating and plating each of the three components so that the -Bi-In concentration is within a predetermined composition range, or heating and reflowing this plated laminate to create a Sn-Bi-In low melting point. It can be obtained by a method of manufacturing a solder alloy bump or the like. Among these, the method utilizing the formation of the low melting point plated laminate (plating laminate method) is easy to adjust the composition, and since the alloying of Sn-Bi-In and its bump formation can be performed at once, the convenience and joining reliability are achieved. Excellent and industrially useful.

FIG. 1 is a diagram for explaining a Sn-Bi-In ternary phase diagram regarding the joining member of the present invention. The joining member according to the present invention is a Sn-Bi-In ternary state diagram, where (x, y, z) is a point where Sn is x mass%, Bi is y mass%, and In is z mass%. , Point 1 (1, 69, 30), Point 2 (26, 52, 22), Point 3 (35, 25, 40), Point 4 (1, 59, 40). Use what is controlled inside.

By using a material having such a composition as a joining member, it can greatly contribute to the realization of low temperature mounting of an integrated circuit. In addition, since this joining member can be processed at a low temperature, the energy consumed during mounting can be reduced, and it is suitable for alloying manufactured by plating, and the energy consumed for heat treatment during manufacturing can also be reduced. can.

The quadrangle of FIG. 1 regarding the composition of the joining member of the present invention includes a line connecting points 1 and 4, a line connecting points 1 and 2, a line connecting points 2 and 3, and points 3 and 4. The range is specified by the lines on the four sides of the connecting line. By laminating and plating the Sn, Bi, and In components within this range, a Sn-Bi-In low melting point plated laminate having a melting point of 69 to 110 ° C. is obtained, which is easily melted by heating at 90 to 135 ° C. It can also be used as a Sn-Bi-In low melting point alloy having a melting point equivalent to that of the Sn-Bi-In low melting point plating laminate.

If it is outside the line connecting the point 1 (1, 69, 30) and the point 4 (1, 59, 40) (lower side in FIG. 1), it does not contain Sn and is with the object to be plated or the joining member. Wetability is reduced and sufficient bonding strength or bonding durability is reduced. Further, since a small amount of Sn is contained, it becomes easy to obtain a melting point having a melting point of 110 ° C. or lower, and it becomes easy to prepare a low melting point joining member.

In the case of the outside of the line connecting the point 1 (1, 69, 30) and the point 2 (26, 52, 22) (on the right side in FIG. 1), for example, Comparative Example 1 and comparison as shown in Examples described later. In Example 2, an endothermic peak of 271 ° C. occurs, and the melting point becomes higher due to the residual Bi.

In the case of the outside (upper side in FIG. 1) of the line connecting the point 2 (26, 52, 22) and the point 3 (35, 25, 40), for example, in Comparative Example 3, as shown in Examples described later. Heat absorption peaks occur at 136 ° C. near the melting point of Sn-58Bi and 271 ° C. near the melting point of Bi, and the melting point is increased by the residual Sn-Bi alloy and the residual Bi. Further, for example, in Comparative Example 4 and Comparative Example 5, an endothermic peak occurs at 232 ° C. or 220 ° C. near the melting point of Sn, and the melting point becomes higher due to the residual Sn.

In the case of the outside (left side in FIG. 1) from the line connecting the point 3 (35, 25, 40) and the point 4 (1, 59, 40), for example, as shown in Examples described later, for example, Comparative Examples 6 to 6 to In No. 9, since the In concentration exceeds 40% by mass, an endothermic peak of 61 to 64 ° C. occurs, and the heat resistance due to the low melting point component is lowered. Further, as shown in Comparative Examples 12 and 13 of Examples described later, the bump share strength is lowered. In addition, the ratio of relatively expensive In is high, the cost is high, and the versatility is lowered.

As the joining member according to the present invention, a Sn (tin) -Bi (bismuth) -In (indium) based alloy (Sn-Bi-In alloy) is used. In the joining member according to the present invention, the mass concentration in the above-mentioned ternary phase diagram is calculated by converting the total of Sn, Bi, and In as 100% by mass in the total amount of the parts having the structure of the solder alloy or the laminated plating layer. The concentration of each component.

By setting the Sn-Bi-In composition within the composition range of the joining member of the present invention described above, the melting point of the solder alloy can be stably set to 69 to 110 ° C, and at 90 to 135 ° C in the low temperature region. It is characterized by being suitable for low temperature mounting because it can be joined by heating reflow. Further, it is a joining member having high joining reliability.
The melting point of the joining member of the present invention is the melting point of the Sn—Bi—In alloy portion. Further, in the measuring method, as described in Examples described later, the top temperature of the endothermic peak measured by DSC is treated as the melting point of the component. When there are a plurality of peaks, the endothermic peak at the lowest temperature is treated as the lowest melting point, and the endothermic peak at the highest temperature is treated as the highest melting point.

The joining member of the present invention has an upper limit of In concentration of 40% by mass. Even if the In concentration exceeds this, the melting point of the Sn-Bi-In solder alloy may be 110 ° C or lower, but if the In concentration exceeds 50% by mass, the adhesive strength between the solder alloy and the object to be plated is Pb-free. Since it is lower than 3.3 mg / μm ² of solder (Sn2.5Ag, Sn3.2Ag, Sn58Bi alloy, etc.), it may not be used as a conductive bonding material for mounting.

Further, when the In concentration exceeds 40% by mass, the melting point of the plated laminate and the solder alloy becomes less than 69 ° C., and there is a concern that the bonding durability of the electronic product under the normal operating temperature environment is lowered. Further, since In is expensive, it is not preferable from the viewpoint of versatility because using it in large quantities increases the cost.

(Plating)
The formation of the Sn-Bi-In low melting point bonding member and the like of the present invention mainly consists of a plating lamination method which is a method of utilizing a low melting point plating laminate obtained by performing Sn plating, Bi plating, and In plating, respectively. Explain to. The plating method can be either electrolytic plating or electroless plating, but electrolytic plating is preferable in consideration of the required plating time and productivity.

Taking the case of electrolytic plating as an example of a plating device that can be used, a plating tank made of a material that is corrosion resistant to each plating solution to be used has a stirring function such as stirring blades, rocking, and squeegee stirring, and current. A plating device capable of setting an object to be plated on the cathode can be used by using a rectifier capable of controlling the value within a predetermined range, using a soluble anode or an insoluble anode as the anode.

To explain the case where the plating lamination process is laminated in the order of Sn → Bi → In, “Surface cleaning / drying of the object to be plated → Sn plating → water washing / drying → Bi plating → water washing / drying → In plating → water washing”・ Drying → resist removal → washing / drying → solder alloy bumping (heating reflow) ”is performed in this order.

Hereinafter, the formation of the Sn-Bi-In-based low melting point solder alloy of the present invention and the solder alloy bumps thereof will be described for each step.

(Target member to place the joining member)
The Sn-Bi-In-based low melting point solder alloy according to the present invention and the member to be formed to form the solder alloy bump thereof are semiconductor electronic components such as LSI or a package or module in which a plurality thereof are mounted to form a circuit. It is a wiring board such as a printed wiring board for the purpose. As these members, those having the required conductive joints (pads) patterned on the surface thereof by photolithography or the like are used, if necessary.

Further, any of the groups selected from the group consisting of micrometal balls having a size of 1 mm or less, microresin balls having a conductive metal coating layer, microresin balls having a solder alloy coating layer, and micropin members. The core material can also be used. The surface layer of these core materials can be coated with a Sn—Bi—In alloy to obtain the joining member of the present invention. The coating of these core materials may be performed by plating, or may be coated with a solder alloyed Sn-Bi-In alloy or the like.

As the core material, microballs used as core balls of a microball-mounted conductive joining material such as a ball grit array (hereinafter referred to as BGA) can also be used. As the minute balls, a minute metal ball or a minute resin ball having a diameter of 1 mm or less can be used. In particular, microresin balls are used as core ball materials that are effective for reducing the weight of electronic circuit parts and relaxing thermal stress (which can be elastically deformed).

As the minute metal ball, for example, any conductive metal ball such as Cu, Ni—Co—Fe alloy or Ni—Fe alloy having a diameter of 0.05 to 1.0 mm can be used. Further, if necessary, it is also possible to use a minute metal ball having a surface thereof coated with a conductive coating such as Ni, Cu, or solder having a thickness of 0.1 to 30 μm. Further, a columnar micrometal pin can be used instead of the micrometal ball.

As the fine resin ball, for example, a general resin such as an acrylic resin having a diameter of 0.05 to 1.0 mm, a polypropylene resin, a vinyl chloride resin, polyphenylene sulfide, and a divinylbenzene crosslinked polymer can be used to form a fine ball. Any of them can be used. Since these minute resin balls are non-conductive, those whose surface is coated with a conductive metal or alloy such as Ni, Cu, or solder of about 0.5 to 5.0 μm by electroless plating or the like is used. do.

Further, the core material is not limited to a ball shape, and micropins such as a columnar shape, a prismatic shape, a weight shape, and a shape in which these corners are chamfered can also be used. As the minute pin, a minute metal pin or a minute resin pin having the same material and size as the above-mentioned minute metal ball or minute resin ball can be used. In the case of a minute pin, the smallest side corresponds to the diameter of the minute metal ball or the minute resin ball.

(Surface cleaning and drying of the object to be plated)
The purpose of surface cleaning of the object to be plated is to remove and clean the deposits on the surface of the object to be plated, and a solvent capable of removing the deposits is selected and used. For example, examples of the organic solvent include lower alcohols such as methanol, ethanol and isopropyl alcohol, and ketones such as acetone, methyl ethyl ketone (MEK) and isobutyl ketone (MIBK). Examples of the aqueous solvent include a combined use of ammonia, an organic amine compound and the like and a hydrogen peroxide solution, and an aqueous solution to which an anionic, cationic or nonionic surfactant is added. Of these solvents, they are selected and used in a timely manner in consideration of not attacking the material of the object to be plated.

The surface of the object to be plated is washed by a method such as immersion in these solvents or shower washing with a solvent within the range of room temperature to 100 ° C. After washing with the solvent, the solvent component adhering to the surface may be washed with water to clean the surface. Next, regarding the drying of the object to be plated, heating drying or ventilation drying may be performed in the range of room temperature to 100 ° C. It is also possible to omit the drying step and proceed to the next plating step.

(Formation of under metal)
Ti (tungsten), Ni (nickel), Cu (copper), Au (gold, Sn (tin), Ag (silver), Cr (Chrome), Pd (palladium), Pt (platinum), W (tungsten), Co (cobalt), TiW (tungsten-tungsten), NiP (nickel-phosphorus), NiB (nickel-boron), NiCo (nickel-cobalt) ), And one or more undermetals formed from the group consisting of NiV (nickel-vanadium) can also be used. These undermetals may be used alone or in combination of two or more. As the film forming method, an applicable method may be appropriately selected from vapor deposition, PVD, plating method and the like. The film forming film thickness may be set in the range of 0.01 to 10 μm in a timely manner. good.

(Formation of conductive post)
In addition, a columnar conductive post provided for the purpose of preventing short circuits during mounting (during heating reflow) by arranging solder alloys of conductive joining materials at narrow intervals (narrow pitch) with the miniaturization of integrated circuits. It is also possible to use the one formed on the under metal. The columnar post material may be appropriately selected from conductive metals such as Cu, Ag, and Ni. The columnar post may be formed by appropriately selecting and using an applicable method from PVD, plating method and the like. The height of the columnar post is usually in the range of 1 to 200 μm, and may be set in a timely manner as necessary.

(Method for forming Sn-Bi-In low melting point plated laminate)
A method for forming a plated laminate to be applied to the Sn-Bi-In-based low melting point bonding member of the present invention on these objects to be plated on which the above-mentioned conductive bonding portions are patterned will be described below. First, the method of plating each of Sn, Bi, and In is illustrated below.

(Sn plating)
Sn plating is a plating process performed using a plating solution or the like containing Sn as a main component for plating an object to be plated. As the Sn plating solution, a commercially available one may be used, and examples thereof include Sn plating solution manufactured by Ishihara Chemical Co., Ltd. The plating conditions are, for example, under stirring using a stirring blade, rocking, squeegee stirring, etc., a temperature of 5 to 50 ° C., a Sn ion concentration in the plating solution of 1 to 70 g / L, and a current density of 0.1 to 20.0 A. It may be set arbitrarily within the range of / dm ² . The Sn plating amount can be controlled by the plating treatment time (plating solution immersion time) under the set conditions.

(Bi plating)
Bi plating is a plating process performed using a plating solution or the like containing Bi as a main component for plating an object to be plated. As the Bi plating solution, a commercially available one may be used, and examples thereof include Bi plating solution manufactured by Ishihara Chemical Co., Ltd. The plating conditions are, for example, under stirring using a stirring blade, rocking, squeegee stirring, etc., a temperature of 5 to 50 ° C., a Bi ion concentration in the plating solution of 1 to 70 g / L, and a current density of 0.1 to 20.0 A. It may be set arbitrarily within the range of / dm ² . The Bi plating amount can be controlled by the plating treatment time (plating solution immersion time) under the set conditions.

(In plating)
In plating is a plating process performed using a plating solution or the like containing In as a main component for plating an object to be plated. As the In plating solution, a commercially available one may be used, and examples thereof include In plating solutions manufactured by Ishihara Chemical Co., Ltd. and EEJA Co., Ltd. The plating conditions are, for example, under stirring using a stirring blade, rocking, squeegee stirring, etc., a temperature of 5 to 50 ° C., an In ion concentration of 1 to 70 g / L in the plating solution, and a current density of 0.1 to 20.0 A. It may be set arbitrarily within the range of / dm ² . The amount of In plating can be controlled by the plating treatment time (plating solution immersion time) under the set conditions.

As these Sn plating, Bi plating, and In plating, those containing other plating components such as an optional mixed component may be used. In a plating composition such as a plating solution, the total amount of other plating components (“total amount of other plating components (g / L)” / “main component (g / L)”) with respect to the main component is 50 mass. % Or less is preferable, 30% by mass or less is preferable, and 20% by mass or less is preferable. For example, a Sn / Cu mixed plating solution in which Cu, which is an arbitrary mixed component, or a Sn / Ag plating solution in which Ag is mixed may be used for Sn plating because it contains Sn as a main component. .. The same applies to Bi plating and In plating.

(Plating stacking order)
The plating stacking order may be Sn plating, Bi plating, or In plating, and the order may be arbitrary. Specifically, in order from the surface of the object to be plated, Sn → Bi → In, Sn → In → Bi, Bi → Sn → In, Bi → In → Sn, In → Sn → Bi, In → Bi → Sn. Any order is possible. In order to stably laminate Sn-Bi-In with a predetermined composition by electrolytic plating, it is preferable to plate from the one having the highest standard electrode potential and the lowest ionization tendency, "Bi → Sn → In" or "Sn → Bi →". It is more preferable to perform laminated plating in the order of "In". When the standard hydrogen electrode is used as a reference at ²⁵ ° C. and 105 pascal (Pa), the standard electrode potentials are Bi = 0.317V, Sn = −0.138V, and In = −0.338V, and the three components are If the In plating with the lowest potential is the first or second plating, In is easily ionized and eluted in the electrolytic plating bath during the plating operation of the next component, so that the concentration in the plated laminate is high. It tends to be lower than the set condition. Therefore, it is preferable that the In plating is the final plating performed after the Sn plating and the Bi plating.

(Plated laminate)
The plated laminate is obtained by sequentially plating the Sn, Bi, and In components independently and laminating them. The plated laminate of the present invention has a plurality of layers having different concentrations of Sn, Bi, and In. This layer may have, for example, a SnIn layer in which In is diffused in a layer by Sn plating, or a BiIn layer in which In is diffused in a layer by Bi plating. By forming these alloy layers after plating, a low melting point plated laminate having a melting point of 69 to 110 ° C., which is significantly lower than the melting points of Sn, Bi, and In alone, can be obtained.

The concentration of each element in the plated laminate can be determined by peeling the plated laminate from the object to be plated, dissolving the acid, and then quantitatively analyzing it with a high-frequency inductively coupled plasma-emission analyzer. Each layer contains Sn, Bi, and In, which are the main metals of the layer, the SnIn layer contains Sn and In, and the BiIn layer contains Bi and In.

Each layer is preferably composed of a metal element substantially constituting the layer, but may contain impurities inevitably contained in a raw material or a manufacturing process in addition to the metal element of the layer. Examples of such impurities include Fe (iron) and C (carbon).

Further, it may contain an optional additive element contained as a mixed element as described later. In addition, it is preferable to reduce the mixing amount of Pb for use as Pb-free, and the concentration of Pb in the Sn—Bi—In alloy is preferably 0.1% by mass or less, 0.05% by mass or less, 0.01. More preferably, it is by mass or less. It is more preferable that Pb is not less than the lower limit of detection.

In the joining member, the concentration in the ternary state diagram of Sn-Bi-In is 100, which is the total of the plating component elements of Sn, Bi, and In in the portion of the Sn-Bi-In alloy such as the plated laminate and the solder alloy. It is defined by the ratio (mass fraction) occupied by each element when it is defined as% by mass. Further, the ratio of the total amount of Sn, Bi, and In in the portion of the Sn—Bi—In alloy such as the plated laminate or the solder alloy (mass of Sn + Bi + In / total mass of Sn—Bi—In alloy) is 70 mass. % Or more is preferable, 80% by mass or more is more preferable, 90% by mass or more is further preferable, and 95% by mass or more is particularly preferable.

(Sn layer)
The Sn layer obtained by Sn plating is a layer containing Sn (tin). The Sn layer contains Sn as a main component excluding In, and the Sn concentration in the elements excluding In in this layer is preferably 70% by mass or more, more preferably 80% by mass or more, and 90% by mass or more. It is more preferable to have. This Sn layer can be obtained by Sn plating.

Further, the Sn layer may be a SnIn layer including In. This SnIn layer contains Sn and In as the main components of the layer, and the total of Sn and In is 70% by mass or more, 80% by mass or more, 90% by mass or more, and 95% by mass or more in the layer. be able to. The SnIn layer contains both, and the mass ratio of Sn: In is 1:99 to 99: 1, 5:95 to 95: 5, 10:90 to 90:10, 20:80 to 80:20. And so on.

(Bi layer)
The Bi layer obtained by Bi plating is a layer containing Bi (bismuth). The Bi layer contains Bi as a main component excluding In, and the Bi concentration in the element excluding In in this layer is preferably 70% by mass or more, more preferably 80% by mass or more, and 90% by mass or more. It is more preferable to have. This Bi layer can be obtained by Bi plating.

Further, the Bi layer may be a BiIn layer including In. This BiIn layer contains Bi and In as the main components of the layer, and the total of Bi and In is 70% by mass or more, 80% by mass or more, 90% by mass or more, and 95% by mass or more in the layer. be able to. The BiIn layer contains both, and the mass ratio of Bi: In is 1:99 to 99: 1, 5:95 to 95: 5, 10:90 to 90:10, 20:80 to 80:20. And so on.

(In layer)
Since In contained in the laminated plating layer by In plating easily diffuses into the Sn layer and the Bi layer during the plating process, it is difficult to form a single layer containing In alone as a main component, and it is difficult to form a single layer containing In alone. May be formed in morphology.

(Number of plated layers)
The number of plated layers of the laminated plating layer is not particularly limited, and may be any one having two or more layers having different concentrations of Sn, Bi, and In. For the purpose of alloying both components and preventing diffusion due to the interaction between the object to be plated and the plating components, layers having different concentrations of the above three components are formed to form three layers, four layers, five layers, or the like. Laminating is also possible.

(Washing and drying after each plating process)
The purpose of washing with water after each plating step is to remove the plating solution adhering to the surface of the object to be plated when it is pulled up from the plating bath, and it is cleaned by immersing it in water or washing it with water by a water shower. Subsequent drying may be performed at a temperature lower than the melting point of the plated laminate. In consideration of the melting point of the plated laminate, usually, it may be set appropriately in the range of room temperature to 100 ° C. and then heated and dried or ventilated. If there is no problem even if there is residual water in the next step, it is possible to skip the drying step and proceed to the next step.

(Removal of resist for pattern)
The resist pattern is removed by using a known wet method such as immersion in a chemical solution capable of removing the resist without damaging the Sn-Bi-In low melting point plating laminate or shower washing, or a method such as ashing treatment with oxygen plasma. It is possible.

Examples of the chemical solution used in the wet method include an organic solvent whose main component is dimethyl sulfoxide and the like, an aqueous solvent such as potassium hydroxide, and the like, and timely considering the removability of the resist material and the resistance of the plating precipitate. Just choose. After removing the resist with a chemical solution, the object to be plated is immersed in water or washed with water in a water shower to clean it, and then heated and dried or ventilated and dried in the range of room temperature to 100 ° C.

(Addition of trace metal)
The Sn-Bi-In low melting point bonding member of the present invention is appropriately made into a Sn-Bi-In alloy within a range where the melting point does not exceed 110 ° C. for the purpose of improving physical properties such as film smoothness and adhesion. , Ag, Cu, Ni, Zn, and Sb containing one or more mixed components selected from the group, and the ratio of the total mass of the mixed components in the Sn—Bi—In alloy (total mass of mixed components / Sn). -The mass of the Bi-In alloy) can be mixed in the range of 0.001 to 3.0% by mass. The method of mixing these specific mixed components can be alloyed with a predetermined amount of metal to be mixed when the alloy components are prepared. For example, when a Sn-Bi-In low melting point plating laminate is used, it may be added to any of Sn, Bi, and In plating solutions and introduced into the coating film so that the content becomes a predetermined amount. ..

From the viewpoint of adjusting the precipitation potential with a complexing agent or the like to obtain alloy plating with the added metal, it is preferable to add it in the Sn plating solution or the Bi plating solution. The amount of these added metals added to the Sn or Bi plating solution is in the range of 1/1000 to 1/10 of the mass concentration of Sn or Bi so that the concentration becomes a predetermined concentration in the obtained plating laminate. It may be selected and used in a timely manner.

Since the Sn-Bi-In-based low melting point bonding member obtained as described above has a low melting point of 69 to 110 ° C., it can be used by heating and reflowing in a low temperature region of 90 to 135 ° C. This joining member may be used in the mounting process as it is in the state of the plated laminate, or may be formed into a low melting point solder alloy bump, which will be described later, and used in the mounting process.

In addition, the method for manufacturing a solder alloy used as a conductive bonding material is the highest among the compounding components, in which each alloy component is crushed or crushed, surface-cleaned and dried to obtain a predetermined composition. The alloyed material that is heated and melted above the melting point of the component is taken out as a lump, which is further crushed into alloy fine particles, which is mixed with a flux component to form a solder alloy paste, etc., and applied to the object to be plated. Some are mounted by heating reflow. The solder alloy of the present invention may also be manufactured by this manufacturing method. This method has many steps and the productivity is lowered, and it may be difficult to adapt to the dimensional reliability due to the narrowing of the pitch of the wiring connection due to the miniaturization of the integrated circuit.

The method of heating and reflowing the Sn-Bi-In low melting point plating laminate to form a solder alloy significantly reduces these steps and forms a conductive bonding material directly on the fine pattern forming surface by the plating method. Therefore, since the dimensional reliability is high and the obtained Sn—Bi-In solder alloy has a low melting point of 69 to 110 ° C., it is possible to join by heating reflow in a low temperature region of 90 to 135 ° C., and the temperature is low. Suitable for mounting. From such a viewpoint, it is preferable to use a solder alloy having a laminated plating layer that can be subjected to Sn plating, Bi plating, and In plating provided on the surface of the object to be plated.

(Formation of solder alloy bumps)
The joining member of the present invention may also be in the form of a solder alloy. In manufacturing this solder alloy bump, a plated laminate related to a Sn—Bi—In low melting point bonding member may be heated and reflowed in a low temperature region of 90 to 135 ° C. to form a bump. Generally, in the formation of solder alloy bumps by heating reflow, it is required that the alloy composition is uniform, there is no surface unevenness, and uniform spherical or hemispherical shape physical properties are required. Further, as the mounting physical characteristics, it is necessary that the bonding strength of the bonding member such as the object to be plated with the object to be bonded is 3.3 mg / μm ² or more, and the heat cycle durability is required. Factors that adversely affect these required physical properties include the basic physical properties of the solder alloy itself, the natural oxide film of the alloy component before heating reflow, and the adhesion and mixing of impurities.

In the solder alloy bump formation of the Sn-Bi-In low melting point plating laminate, the "silicic acid gas reduction method" is used for the purpose of removing the natural oxide film at a low temperature during heating reflow. As a method for removing the natural oxide film, there are generally the "geic acid gas reduction method" and the "hydrogen gas reduction method" shown below. The latter causes a reduction reaction at 230 ° C or higher, and the former causes a reduction reaction at around 150 ° C. Therefore, it is preferable to apply the "hydrogen gas reduction method", which is superior in terms of low temperature treatment, safety, reliability, and cost.
・ Formic acid gas reduction method MeO + HCOOH → Me + CO ₂ + H ₂ O
・ Hydrogen gas reduction method MeO + H ₂ → Me + H ₂ O

The heating reflow of the Sn-Bi-In low melting point plated laminate uses the "silic acid gas reduction method", reducing agent: formic acid, pressure: 20 to 400 mbar, temperature rising rate: 10 to 150 ° C./min, The top temperature may be selected in the range of 70 to 110 ° C. and the top temperature holding time: 20 to 300 seconds in a timely manner according to the composition of the Sn-Bi-In low melting point plated laminate. The Sn-Bi-In-based low-melting point bonding member of the present invention thus obtained is characterized in that it is suitable for low-temperature mounting because it can be bonded in a low temperature region where the heating reflow temperature at the time of mounting is 90 to 135 ° C.

(Plating and laminating on core material)
Next, the surface layer of the core material such as a minute metal ball, a minute resin ball, and a minute pin used as a core ball of a conductive bonding material mounted on a minute ball such as BGA as an object to be plated is a Sn-Bi-In system. A method for forming a joining member coated with a low melting point plating laminate will be described.

(Plating and laminating on minute metal balls, etc.)
As a method for plating core materials such as minute metal balls, a columnar plating tank that rotates in the circumferential direction has an anode in the center of the plating tank and a cathode in the circumference of the tank, and the axis of rotation is the horizontal axis. The plating process is performed at a rotation speed of about 5 to 200 rpm by rotating in the vertical direction or tilting by the tilting axis. Specifically, a plating solution and a ball of an object to be plated are put in a tank, the current density and the energization time are set so as to have a predetermined plating thickness, and the plating process is performed. A rotary plating device (barrel plating method) in which a more plated ball or the like and a plating solution are discharged can be used. Further, the rotary plating apparatus described in JP-A-10-18096, JP-A-10-270863, which has been improved for plating fine metal balls, and further, JP-A-11-92294. Rotary plating equipment can be used.

When forming a Sn-Bi-In-based low melting point plating laminate on the surface of a minute metal ball or the like, a known device such as the barrel plating method (rotary plating device) described above can be used. Each of the Sn, Bi, and In plating methods may be plated under the same conditions as the above-mentioned method for forming the Sn-Bi-In low melting point plating laminate, and the order of the plating laminates is not particularly limited, but the first (bottom layer). ) Is preferably Sn-plated or Bi-plated, and the last (top layer) is preferably In-plated. Further, the same trace metal as described above (addition of a specific trace metal) can be added for the purpose of improving the smoothness and adhesion of the plating film, or improving the physical properties such as preventing the balls from aggregating with each other during the plating process.
When a fine metal pin or the like is used as the core material, it is possible to form the Sn-Bi-In-based low melting point plating laminate of the present invention in the same manner as when the fine metal ball is used.

(Plating and laminating on minute resin balls, etc.)
As a method of coating the surface of a fine metal ball or the like with a Sn-Bi-In low melting point plating laminate, a known device such as the barrel plating method (rotary plating device) described above can be used. Each of the Sn, Bi, and In plating methods may be plated under the same conditions as the above-mentioned method for forming the Sn-Bi-In low melting point plating laminate, and the order of the plating laminates is not particularly limited, but the first (bottom layer). ) Is Sn or Bi plated, and the last (top layer) is In plated. Further, the same trace metal as described above (addition of a specific trace metal) can be added for the purpose of improving the smoothness and adhesion of the plating film, or improving the physical properties such as preventing the balls from aggregating with each other during the plating process.

The above is a method for forming a joining member in which the surface of a minute metal ball, a minute resin ball, a minute pin member, or the like is covered with the Sn-Bi-In-based low melting point plating laminate according to the present invention, and the minute amount thus obtained. The joining member of the member has a melting point of 69 to 110 ° C. in the low temperature region of the laminated plating layer of the surface layer, and may be used as it is in the mounting step. Further, this may be used in the mounting process as a low melting point solder alloy bump mounted on a minute member such as a minute ball described later.

(Formation of bumps for mounting micro members)
The formation of bumps such as micrometal balls and microresin balls in which the surface of the core material is coated with a Sn-Bi-In low melting point plating laminate will be exemplified. Flux is applied on the pad of the conductive joint such as the printed wiring board for BGA, and the fine metal balls and fine resin balls coated with the above-mentioned Sn-Bi-In low melting point plating laminate are mounted on it. After that, the bumps can be formed on the pad of the conductive joint portion by heating and reflowing in the same manner as the formation of the Sn—Bi—In type low melting point solder alloy bump described above.

(Implementation of electronic circuit)
A bonding member such as a plated laminate according to the present invention or a Sn-Bi-In-based low melting point solder alloy bump formed by heating and reflowing the plated laminate according to the present invention is provided on a wiring board and a semiconductor chip surface. It is possible to mount a semiconductor electronic circuit that joins the wiring board and the semiconductor chip by arranging between the two and heating and reflowing within the range of 90 to 135 ° C.

In this mounting, for example, a semiconductor chip in which a solder alloy to be a bonding portion is formed as a bump or a plated laminate is prepared, laminated on an electrode portion for connecting a wiring board, and 90 to 135 ° C. in a reducing atmosphere such as formic acid. Heat reflow within the range of and join the two. The bumps and the plated laminate may be formed on the wiring board side, and in that case, they are joined to the electrode portion for connection on the semiconductor chip side. Further, the bumps and the plated laminates may be formed on both the semiconductor chip side and the wiring board side. In that case, the bumps and the plated laminates are overlapped and joined. This bonding can also be applied to soldering other than electronic circuit boards such as semiconductor chips and wiring boards.

The Sn-Bi-In alloys such as the solder alloy bumps and the plated laminates according to the present invention have predetermined Sn, Bi and In concentrations and have a low melting point, so that they are melted by heating at about 135 ° C. or lower and 20 to 20 to It is solid at around room temperature of about 30 ° C. Since these solder alloy bumps and plated laminates function as joints, those having these joints and joining to the object to be joined are referred to as joint members in the present application. For example, the solder alloy bump itself, the plated laminate itself, and the micromembers and semiconductor chips on which these are arranged on the surface and the like are also included in the joining member in the present application.

FIG. 2 shows a conceptual diagram of the manufacturing process of the plated laminate and its solder alloy bumps on the Sn-Bi-In-based low melting point bonding member of the present invention, and FIG. 3 shows a conceptual diagram of the mounting thereof for reference.

FIG. 2 is an example of a conceptual diagram of a manufacturing process up to the formation of solder alloy bumps on the joining member of the present invention.
First, 1) as shown in the unprocessed wafer, a pad 3 (Au, Au-Cu, etc.) is arranged on a substrate 1 (silicon, compound semiconductor, piezoelectric element, resin substrate, etc.), and a protective film 2 (SiN, It has polyimide etc.).
Next, as shown in 2) Forming the feeding film, the feeding film 4 (Ti / Cu or the like) is formed on the protective film 2 and the pad 3.
Next, as shown in 3) Applying the resist film, the resist film 5 is applied on the feeding film 4.
Next, as shown in 4) Exposure / development, the resist film 5 is exposed / developed in a predetermined pattern, and a part of the resist film 5 is removed. At this time, usually, the exposure is performed at the position corresponding to the pad 3.
Next, as shown in 5) Undermetal formation, the resist film 5 is exposed and developed to form an undermetal 6 (Ni, Cu, etc.) in the portion where the pores are formed.
Next, as shown in 6) Plating Lamination, the laminated plating layer 7 (Sn, Bi, In) is formed by the manufacturing method for the joining member of the present invention.
Next, as shown in 7) resist peeling, the remaining resist film 5 is also removed. As a result, the laminated plating layer 7 is formed on the pad 3.
Next, as shown in 8) Feeding film etching, the feeding film 4 is removed by etching.
Then, as shown in 9) Bump formation, the solder alloy bump 8 (Sn / Bi / In) is formed from the laminated plating layer 7 by heating and reflowing, and can be used as a joining member. 8) The plating layer 7 after etching the feeding film can be used as it is as a joining member.

FIG. 3 is a conceptual diagram showing an example of implementation. The solder alloy bump 9 is arranged so as to be in contact with the metal film 10 (Au) for joining at the corresponding position (see the upper part of FIG. 3), and is heated and reflowed within the range of 90 to 135 ° C. to the wiring board. It can be bonded to the semiconductor chip (lower part of FIG. 3).

Hereinafter, the present invention will be described in more detail with reference to Examples, but the present invention is not limited to the following Examples unless the gist thereof is changed.

(Measurement of composition of plated laminate and solder alloy bump)
The Sn-Bi-In plated laminates obtained in Examples 1 to 15 and Comparative Examples 1 to 9 were peeled off from the SUS substrate, and after acid dissolution, ICP-OES (high frequency inductively coupled plasma-emission spectroscopic analyzer). Quantitative analysis was performed at. Further, in Example 16, Comparative Examples 10 to 13, and Reference Examples 1 and 2, the solder alloy bumps obtained by heating and reflowing the plated laminate were measured in the same manner as described above. The equipment used and the measurement conditions are as follows.
-Measuring machine Thermo Fisher Scientific ICP emission spectroscopic analyzer Format: iCAP6300Duo
・ Measurement conditions Quantitative analysis by calibration curve method
Measurement wavelength: Sn188.9nm, Bi306.7nm, In325.6nm

(Measurement of melting point of plated laminate)
The Sn-Bi-In plated laminates obtained in Examples 1 to 15 and Comparative Examples 1 to 9 were peeled from the SUS substrate and crushed, and the sample was endothermic in the temperature raising process using a DSC (Differential Scanning Calorimeter). The profile was measured. In the DSC measurement in the heating process, the heat of fusion of each component appears as an endothermic peak, and it becomes one or more endothermic peaks depending on the composition of the measurement sample. In the present invention, for convenience, the top temperature of each endothermic peak is treated as the melting point of the component. When there are a plurality of peaks, the endothermic peak at the lowest temperature is defined as the lowest melting point, and the endothermic peak at the highest temperature is defined as the highest melting point. The equipment used and the measurement conditions are as follows.
・ Measuring equipment Seiko Instruments Inc. DSC equipment Type: DSC6220 type ・ Measurement conditions Sample amount: 10 to 36 mg
Measuring pan: Aluminum
Atmosphere: Nitrogen gas
Measurement temperature range: room temperature to 300 ° C, temperature rise rate: 10 ° C / min

(Measurement of bump diameter)
The bump diameters of the solder alloy bumps obtained in Example 16, Comparative Examples 10 to 13, and Reference Examples 1 and 2 were measured by image measurement. The equipment used and the measurement conditions are as follows.
・ Measuring equipment Keyence laser microscope Format: VK-X150
・ Measurement conditions Image measurement: Length measurement from 200x image

(Measurement of bump share strength)
The share strength of the solder alloy bumps obtained in Example 16, Comparative Examples 10 to 13, and Reference Examples 1 and 2 was measured by a share strength tester. The equipment used and the measurement conditions are as follows.
・ Measuring equipment DAGE Bond Tester Format: 4000
・ Measurement conditions Share speed: 150 μm / s, Share position: Solder part

[Example 1]
Teflon (registered trademark) tape is attached to the entire back surface of the degreased and cleaned SUS304 plate (100 mm x 40 mm x thickness 0.3 mm), and Teflon (registered trademark) tape is attached to one surface, and the SUS plate opening is 40 mm x 40 mm. As an object to be plated. A glass 1L beaker was used as the plating bath, about 500 ml of each plating solution was put therein, and platinum was used for the anode.
The following plating solutions were used for each Sn-Bi-In plating solution.
・ Sn plating solution manufactured by Ishihara Chemical Co., Ltd. (Sn concentration 5 g / L)
・ Bi plating solution manufactured by Ishihara Chemical Co., Ltd. (Bi concentration 40 g / L)
-In plating solution manufactured by EJJA (In concentration 25 g / L)
The first layer was Bi-plated. The conditions are that the object to be plated is immersed in a Bi plating solution and shaken while being plated at a temperature of 20 ° C. and a current density of 2 A / dm ² for 8 minutes, then pulled up and immediately immersed in a water tank. I pulled it up and washed it with a water shower. This was dried at 50 ° C. for 5 minutes using a ventilation dryer to obtain a Bi-plated product.

Subsequently, the second layer of In plating was performed. The Bi-plated object is immersed in the In plating solution and shaken while being plated at a temperature of 20 ° C. and a current density of 3 A / dm ² for 5 minutes, then pulled up and immediately immersed in a water tank. I pulled it up and washed it with a water shower. This was dried at 50 ° C. for 5 minutes using a ventilation dryer to obtain a Bi / In plated product.
Subsequently, Sn plating of the third layer was performed. The Bi-In plated object is immersed in the Sn plating solution and shaken while being plated at a temperature of 20 ° C. and a current density of 1 A / dm ² for 30 seconds, then pulled up and immediately immersed in a water tank. Then, I pulled it up and washed it with a water shower. This was dried at 50 ° C. for 5 minutes using a ventilation dryer to obtain a Bi-In—Sn-based plated laminate.
The composition of the sample obtained by stripping the obtained Bi-In-Sn plated laminate from a SUS plate and pulverizing it was measured using an ICP emission spectrophotometer of Thermo Fisher Scientific Inc. and a melting point of a DSC apparatus of Seiko Instruments Inc.

[Examples 2 to 12, Comparative Examples 1 to 9]
By the same method as in Example 1, the order of plating and lamination and the plating time of each plating component were changed to prepare plated laminate samples with various Sn-Bi-In compositions.
Table 1 shows the composition analysis results and melting point measurement results of the Sn-Bi-In-based plated laminates obtained in Examples 1 to 12 and Comparative Examples 1 to 9. Further, as typical examples of the DSC measurement profile at the time of melting point measurement, Examples 2, 4, 5, 8, 10, 12 and Comparative Examples 2, 4, 6, 8 and 9 are shown in FIGS. 4 to 14. In the melting point determination in Table 1, when the melting point was 69 ° C. or higher and 110 ° C. or lower, it was evaluated as “◯”, and when the melting point was less than 69 ° C. or higher than 110 ° C., it was evaluated as “x”.

INDUSTRIAL APPLICABILITY The present invention forms a Sn-Bi-In-based solder alloy bump by heating and reflowing a plated laminate in which Sn-Bi-In is individually plated and laminated on the surface of the object to be plated as described later (Example 16). The complicated alloy manufacturing process can be omitted, and the Sn-Bi-In composition can be arbitrarily controlled by simply changing the plating processing time (plating liquid immersion time), which greatly simplifies the conventional solder alloy manufacturing process. By controlling the Sn—Bi-In composition within a specific range as shown in Examples 1 to 12, the plated laminate having a melting point of 69 to 110 ° C. can be obtained, and in the low melting point region. It turned out that the solder alloying is possible. On the other hand, in Comparative Examples 1 to 9 which are outside the Sn-Bi-In system composition range of the present invention, the melting point (endothermic peak) of the plated laminate is less than 69 ° C or higher than 110 ° C from the DSC measurement results. It turns out. For reference, FIG. 1 shows a ternary phase diagram of the Sn-Bi-In composition of Examples 1 to 12, Comparative Examples 1 to 9, and Examples 16 and 10 to 13 described later.

From these results, when (x, y, z) is a point where Sn is x mass%, Bi is y mass%, and In is z mass% in the Sn-Bi-In ternary state diagram, point 1 Control within the range of a quadrangle whose vertices are four points (1, 69, 30), point 2 (26, 52, 22), point 3 (35, 25, 40), and point 4 (1, 59, 40). Since the joining member of the present invention has a melting point of 110 ° C. or lower, it is judged that it can greatly contribute to the realization of low-temperature mounting of an integrated circuit. Further, since the melting point is 69 ° C. or higher, it has durability even when exposed to a usage environment of about 60 ° C.

On the other hand, when it deviates from these ranges, an endothermic peak of 271 ° C. occurs in Comparative Example 1 and Comparative Example 2, and the melting point becomes high due to the residual Bi. In Comparative Example 3, heat absorption peaks occur at 136 ° C. near the melting point of Sn-58Bi and 271 ° C. near the melting point of Bi, and the melting point becomes higher due to the residual Sn—Bi alloy and the residual Bi. In Comparative Example 4 and Comparative Example 5, an endothermic peak occurs at 232 ° C. or 220 ° C. near the melting point of Sn, and the melting point becomes higher due to the residual Sn. In Comparative Examples 6 to 9, since the In concentration exceeds 40% by mass, an endothermic peak of 61 to 64 ° C. occurs, and the heat resistance due to the low melting point component is lowered. Further, as shown in Comparative Examples 12 and 13 in Table 3, when the In concentration exceeds 50% by mass, the bump share strength decreases (Table 3).

In addition, each composition according to Table 1 (composition analysis and melting point measurement result of the plated laminate) may be used as a point for defining the range of the ternary phase diagram, and any point may be replaced with a point 1 to a point 4 as a vertex. You can also do it. Alternatively, the points according to Table 1 can be used to define the range as the vertices of other polygons such as triangles, pentagons, hexagons, heptagons, and octagons.

[Example 13]
The same operation as in Example 1 was performed except that the plating solution of Sn = 60 g / L and Cu = 1 g / L, in which Cu was added to the Sn plating solution, was plated and laminated in the order of SnCu → Bi → In. A trace amount of Cu-added plated laminate was obtained. The composition of the sample obtained by stripping and pulverizing this plated laminate from a SUS plate was measured using an ICP emission spectrophotometer of Thermo Fisher Scientific Inc., and the melting point was measured using a DSC device of Seiko Instruments Inc. The results are shown in Table 2 (results of composition analysis and melting point measurement of Cu and Ag trace amount addition plating laminates).

[Examples 14 to 15]
The same operation as in Example 1 was performed except that the plating solution of Sn = 40 g / L and Ag = 2.5 g / L, in which Ag was added to the Sn plating solution, was plated and laminated in the order of SnAg → Bi → In. This was performed to obtain a trace amount of Ag-added plated laminate. The composition of the sample obtained by stripping this plated laminate from a SUS plate and pulverizing it was measured using an ICP emission spectrophotometer of Thermo Fisher Scientific Inc. and a melting point of a DSC apparatus of Seiko Instruments Inc. The results are shown in Table 2 (results of composition analysis and melting point measurement of Cu and Ag trace amount addition plating laminates).

From the results of Examples 13 to 15, since the melting point of the Sn—Bi-In-based plated laminate to which a trace amount of Cu or Ag was added is as low as 69 to 107 ° C., a trace amount of Cu or Ag was added. It was confirmed that the Sn-Bi-In-based plated laminate and its solder alloy can be used as a conductive bonding material for low-temperature mounting.

[Example 16]
A Ti film with a thickness of 0.1 μm and a Cu film with a thickness of 0.3 μm are formed on the surface of a silicon wafer with a natural oxide film by sputtering, and openings for wiring connection (60 μm φ x height 40 μm: 1000000 pieces) are formed by photolysis. , Pitch spacing: 150 μm) was formed into a silicon wafer on which a resist pattern was formed, and then the posts were electrolytically plated to form Cu with a thickness of 10 μm, and then electrolytically plated to form Ni with a thickness of 3 μm. A film was formed to prepare a pattern-forming object to be plated.

Using the above-mentioned pattern-forming object to be plated, plating and laminating were performed in the order of "Bi-> Sn-> In" by changing the plating time of each plating component in the same manner as in Example 1, and the Sn-Bi-In system was low. A melting point plated laminate was prepared. FIG. 15 shows an external photograph of the Sn-Bi-In-based low melting point plating laminate after immersing this in a resist stripping solution and removing the resist. Further, the result of SEM-EDX observation of the cross section is shown in FIG. From these figures, it can be seen that a columnar plated laminate corresponding to the shape of the resist pattern is formed. Further, from the cross section SEM-EDX, it was observed that In was laminated and plated on the Cu / Ni undermetal in the order of Bi layer → Sn layer, and In was diffused almost uniformly to these Bi layer and Sn layer. In is diffused into the lower Sn layer and Bi layer at the stage of plating lamination to form an alloy of SnIn and BiIn, so that the melting point of the final plated laminate is higher than the melting point of Sn, Bi and In alone. It is considered that the melting point of the entire plated laminate is lowered even at the heating reflow stage, which is significantly lower.

Subsequently, the Sn-Bi-In low melting point plated laminate after removing the resist is reflowed under the following conditions using a VSU-200 reflow device manufactured by Synapex, and the Sn-Bi-In low melting point solder alloy bump. Was produced. The bump appearance SEM photographs are shown in FIGS. 17 and 18. Further, FIG. 19 shows the result of SEM-EDX observation of the bump cross section. From the bump appearance SEM photograph, it can be seen that hemispherical solder alloy bumps are formed on the Cu / Ni undermetal. Further, from the SEM-EDX photograph of the bump cross section, it was confirmed that the solder alloy bump in which Sn-Bi-In was dispersed almost uniformly was formed.
・ Reducing agent: Formic acid ・ Pressure: 200 mbar
・ Temperature rise rate: 20 ° C / min
・ Top temperature: 110 ° C (keeping time 180 sec)

[Comparative Examples 10 to 13]
Comparative Examples 10 to 13 were operated according to Example 16 except that the plating treatment time (immersion time) in each plating solution at the time of plating lamination was changed so that the bump composition became a predetermined composition. A Sn-Bi-In type low melting point solder alloy bump outside the Sn-Bi-In type composition range of the present invention was produced.

[Reference Examples 1 and 2]
As a reference for measuring the share strength of the solder alloy bump, a silicon wafer on which the same resist pattern as in Example 16 was formed was used, and the undermetal shown in Table 3 was formed by the same operation (however, Reference Example 1 is The formation of a 10 μm Cu post was omitted), and bumps of an existing Pb-free solder alloy were prepared. Reference Example 1 is a Sn3.2Ag (Sn: 96.8% by mass, Ag: 3.2% by mass) solder alloy bump. Reference Example 2 is a Sn58Bi (Sn: 42% by mass, Bi: 58% by mass) solder alloy bump. In each case, the SnAg-plated products were dried using a known SnAg plating solution, the same resist removing operation as in Example 16 was performed, and then the same reflow apparatus was used except for the reflow temperatures shown in Table 3. Solder alloy bumps were manufactured under the same operating conditions.

Table 3 (bump composition and share strength) shows "plated laminate-alloy bump composition-bump share strength measurement result" of Example 16, Comparative Examples 10 to 13, and Reference Examples 1 and 2. The plating layer thickness in the table is a target value for achieving a predetermined composition. For reference, FIG. 20 shows a conceptual diagram of the share strength tester.
Further, FIG. 21 shows the “relationship between the In concentration and the bump share strength” obtained from the results of Example 16 and Comparative Examples 10 to 13.

The bump share strength of the SnAg-based and Sn58Bi-based of Reference Examples 1 and 2, which are usually used as existing Pb-free solder alloys, was 3.3 mg / μm ² .

It was found that the share strength of the Sn—Bi—In based low melting point solder alloy bump of Example 16 was 5.6 mg / μm ² and had a sufficient bonding strength. On the other hand, in Comparative Examples 12 to 13, as shown in FIG. 21, it was confirmed that the bump share strength was lower than the reference 3.3 mg / μm ² when the In concentration exceeded 50% by mass. On the other hand, in Comparative Examples 6 to 9 outside the Sn-Bi-In system composition range of the present invention (see FIG. 1), when the In concentration exceeds approximately 40% by mass, the melting point is less than 69 ° C., so that the electronic product is normally used. There is a concern that the physical properties of the conductive bonding material may deteriorate in a temperature environment (max 60 to 65 ° C.). Further, even if the In concentration is less than 40% by mass, in Comparative Examples 1 to 5, if it is outside the composition range of the present invention, the melting point exceeds 110 ° C. and it cannot be applied as a low temperature bonding material. It is considered that Comparative Examples 10 to 11 also have a high melting point.

[Example 17]
A Sn-Bi-In-based low melting point plating laminate was formed on the surface of the micrometal balls. First, electrolytic Ni plating was formed as a barrier layer on the surface of the minute metal balls. A product having a thickness of about 2 μm formed by electrolytic Ni plating was produced on the surface of a degreased and washed φ450 μm Cu ball using a rotary plating device. Subsequently, SnAg-Bi-In was plated and laminated using a rotary plating apparatus. The following plating solutions were used for each SnAg-Bi-In plating solution.
-SnAg plating solution manufactured by Ishihara Chemical Co., Ltd. (Sn concentration 5 g / L, Ag concentration 0.5 g / L)
・ Bi plating solution manufactured by Ishihara Chemical Co., Ltd. (Bi concentration 40 g / L)
-In plating solution manufactured by EJJA (In concentration 25 g / L)

The first layer was Bi-plated. The conditions are that the object to be plated is placed in a device containing a Bi plating solution, the temperature is 20 ° C., the rotation speed is 178 rpm, the current density is 0.2 A / dm ² , and the plating process is performed for 2 hours. did. This was dried at 50 ° C. for 1 hour using a ventilation dryer to obtain a Bi-plated product.

Subsequently, SnAg plating of the second layer was performed. The Bi-plated object is placed in a device containing SnAg plating solution, plated at a temperature of 20 ° C., rotation speed of 178 rpm, and current density of 0.1 A / dm ² for 2 hours, then pulled up and immediately filtered and washed. did. This was dried at 50 ° C. for 1 hour using a ventilation dryer to obtain a Bi-SnAg plated product.

Subsequently, In plating of the third layer was performed. The Bi-SnAg-plated object is placed in a device containing an In plating solution, plated at a temperature of 20 ° C., a rotation speed of 178 rpm, and a current density of 0.1 A / dm ² for 6 hours, then pulled up and immediately. It was filtered and washed. This was dried at 50 ° C. for 1 hour using a ventilation dryer to obtain micrometal balls coated with a Bi-SnAg-In-based low melting point plating laminate. The composition of the sample obtained by dissolving the Bi-SnAg-In low melting point plated laminate on the surface of the obtained fine metal balls was measured by a Thermo Fisher Scientific ICP emission spectrophotometer and found to be Sn16.9 mass%, Bi49.2. It was mass%, In33.4 mass%, and Ag 0.5 mass%. Further, FIG. 22 shows an external photograph of the obtained micrometal balls coated with the Bi-SnAg-In-based low melting point plating laminate.

[Example 18]
A Sn-Bi-In-based low melting point plating laminate was formed on the surface of the fine resin balls. First, a conductive metal was formed on the surface of the minute resin ball. Degreased and washed φ210 μm resin balls as a conductive layer, first electrolyzed Ni plating with a thickness of about 1 μm under stirring, then electrolytic Cu plating with a thickness of about 10 μm using a rotary plating tank, and electrolytic Ni plating as a barrier layer. A product having a thickness of about 1 μm was produced. The same plating solution as in Example 17 was used for each Sn-Bi-In plating solution.

The first layer was Bi-plated. The conditions are that the object to be plated is placed in a device containing a Bi plating solution, the temperature is 20 ° C., the rotation speed is 178 rpm, the current density is 0.2 A / dm ² , and the plating process is performed for 2 hours. did. This was dried at 50 ° C. for 1 hour using a ventilation dryer to obtain a Bi-plated product.

Subsequently, SnAg plating of the second layer was performed. The Bi-plated object is placed in a device containing SnAg plating solution, plated at a temperature of 20 ° C., rotation speed of 178 rpm, and current density of 0.1 A / dm ² for 6 hours, then pulled up and immediately filtered and washed. did. This was dried at 50 ° C. for 1 hour using a ventilation dryer to obtain a Bi-SnAg plated product.

Subsequently, In plating of the third layer was performed. The Bi-SnAg-plated object is placed in a device containing an In plating solution, plated at a temperature of 20 ° C., a rotation speed of 178 rpm, and a current density of 0.1 A / dm ² for 12 hours, then pulled up and immediately. It was filtered and washed. This was dried at 50 ° C. for 1 hour using a ventilation dryer to obtain microresin balls coated with a Bi-SnAg-In-based low melting point plating laminate. The composition of the sample obtained by dissolving the Bi-SnAg-In low melting point plating laminate on the surface of the obtained fine resin balls was measured by a Thermo Fisher Scientific ICP emission spectrophotometer and found to be Sn30.0% by mass and Bi32.4. It was mass%, In37.4 mass%, and Ag 0.2 mass%. Further, FIG. 23 shows an external photograph of the obtained microresin balls coated with the Bi-SnAg-In-based low melting point plating laminate.

[Example 19]
A Sn-Bi-In-based low melting point plating laminate was formed on the surface of a fine metal cylinder. First, a product having a thickness of about 2 μm formed by electrolytic Ni plating was produced on the surface of a Cu cylinder having a diameter of 300 μm and L500 μm that had been degreased and washed using a rotary plating device as a barrier layer. Subsequently, SnAg-Bi-In was plated and laminated using a rotary plating apparatus. The following plating solutions were used for each SnAg-Bi-In plating solution.
-SnAg plating solution manufactured by Ishihara Chemical Co., Ltd. (Sn concentration 5 g / L, Ag concentration 0.5 g / L)
・ Bi plating solution manufactured by Ishihara Chemical Co., Ltd. (Bi concentration 40 g / L)
-In plating solution manufactured by EJJA (In concentration 25 g / L)

The first layer was Bi-plated. The conditions are that the object to be plated is placed in a device containing a Bi plating solution, the temperature is 20 ° C., the rotation speed is 178 rpm, the current density is 0.2 A / dm ² , and the plating process is performed for 2 hours. did. This was dried at 50 ° C. for 1 hour using a ventilation dryer to obtain a Bi-plated product.

Subsequently, SnAg plating of the second layer was performed. The Bi-plated object is placed in a device containing SnAg plating solution, plated at a temperature of 20 ° C., rotation speed of 178 rpm, and current density of 0.1 A / dm ² for 2 hours, then pulled up and immediately filtered and washed. did. This was dried at 50 ° C. for 1 hour using a ventilation dryer to obtain a Bi-SnAg plated product.

Subsequently, In plating of the third layer was performed. The Bi-SnAg-plated object is placed in a device containing an In plating solution, plated at a temperature of 20 ° C., a rotation speed of 178 rpm, and a current density of 0.1 A / dm ² for 6 hours, then pulled up and immediately. It was filtered and washed. This was dried at 50 ° C. for 1 hour using a ventilation dryer to obtain a Bi-SnAg-In plated laminate. The obtained Bi-SnAg-In plated laminate was dissolved and the composition of the sample was measured by Thermo Fisher Scientific ICP emission spectrophotometer. Sn9.7% by mass, Bi51.8% by mass, In37.9% by mass, Ag was 0.6% by mass. FIG. 24 shows an external photograph of the obtained plated laminate.

The Sn-Bi-In-based low melting point bonding member of the present invention is capable of low-temperature bonding of semiconductor electronic components and wiring boards, and can be suitably used for soldering mounting applications. Further, since low temperature bonding is possible, it is suitably used as a conductive bonding material for low temperature mounting of electronic components having low heat resistance such as flexible substrates (resin substrates), piezoelectric elements CdTe semiconductor elements, CCD elements, and phorogram elements. be able to.

1 Substrate 2 Protective film 3 Pad 4 Feeding film 5 Resist film 6 Undermetal 7 Laminated plating layer 8 Solder alloy bump 9 Solder alloy bump 10 Metal film for joining

Claims (8)

It is a Sn—Bi-In-based low melting point bonding member composed of a laminated plating layer in which a plurality of layers having different concentrations of Sn, Bi, and In are laminated.
The laminated plating layer has all the endothermic peaks observed when the temperature is raised from room temperature to 300 ° C. at a heating rate of 10 ° C./min under a nitrogen atmosphere using a differential scanning calorimeter (DSC). The peak top temperature is 69-110 ° C,
The laminated plating layer has at least a SnIn layer containing Sn and In and a BiIn layer containing Bi and In.
The ratio of the total amount of Sn, Bi, and In in the laminated plating layer is 95% by mass or more.
In the total amount of the laminated plating layer, when the total of Sn, Bi and In is converted into 100% by mass, the respective concentrations are in the Sn-Bi-In ternary state diagram, where Sn is x% by mass and Bi is y. When (x, y, z) is a point where mass% and In are z mass%, point 1 (1, 69, 30), point 2 (26, 52, 22), point 3 (35, 25, 40), a Sn-Bi-In-based low melting point joining member within the range of a quadrangle having four points (1, 59, 40) as vertices. Contains one or more mixed components selected from the group consisting of Ag, Cu, Ni, Zn, and Sb.
The Sn-Bi-In low melting point joining member according to claim 1, wherein the total mass of the mixed components in the Sn-Bi-In low melting point joining member is 0.001 to 3.0% by mass. As the undermetal, one or more undermetals selected from the group consisting of Ti, Ni, Cu, Au, Sn, Ag, Cr, Pd, Pt, W, Co, TiW, NiP, NiB, NiCo, and NiV are formed. The Sn-Bi-In-based low melting point bonding member according to claim 1 or 2, which is arranged on the above-mentioned material. Any one selected from the group consisting of micrometal balls having a size of 1 mm or less, microresin balls having a conductive metal coating layer, microresin balls having a solder alloy coating layer, and micropin members. A micro member having the Sn-Bi-In-based low melting point bonding member according to any one of claims 1 to 3 on the surface layer of the core material. Any one selected from the group consisting of the Sn-Bi-In-based low melting point bonding member according to claim 1 to 3 and the micro member according to claim 4 arranged on the pad of the conductive bonding portion. A method for manufacturing a bump that forms a bump by heating and reflowing in the range of 90 to 135 ° C. Whichever is selected from the group consisting of the Sn—Bi-In-based low melting point bonding member according to claim 1 to 3 and the micromember according to claim 4, which are arranged on the pad of the conductive bonding portion of the semiconductor chip. After forming a bump by heating and reflowing in the range of 90 to 135 ° C., the bump and the electrode portion of the wiring board are overlapped and heated and reflowed in the range of 90 to 135 ° C. to form the wiring board and the above. A method for mounting a semiconductor electronic circuit that joins a semiconductor chip. Whichever is selected from the group consisting of the Sn-Bi-In-based low melting point bonding member according to claim 1 to 3 and the micro member according to claim 4, which are arranged on the pad of the conductive joint portion of the wiring board. After forming a bump by heating and reflowing in the range of 90 to 135 ° C., the bump and the electrode portion of the semiconductor chip are overlapped and heated and reflowing in the range of 90 to 135 ° C. to the wiring board and the above. A method for mounting a semiconductor electronic circuit that joins a semiconductor chip. Selected from the group consisting of the Sn—Bi-In-based low melting point bonding member according to any one of claims 1 to 3 and the micromembers according to claim 4, which are arranged between the wiring board and the surface of the semiconductor chip. A method for mounting a semiconductor electronic circuit in which one of the above is heated and reflowed in the range of 90 to 135 ° C. to join the wiring board and the semiconductor chip.

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