JP7023284B2 - 局所酸化物を有するゲートオールアラウンドデバイスアーキテクチャ - Google Patents
局所酸化物を有するゲートオールアラウンドデバイスアーキテクチャ Download PDFInfo
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- JP7023284B2 JP7023284B2 JP2019537029A JP2019537029A JP7023284B2 JP 7023284 B2 JP7023284 B2 JP 7023284B2 JP 2019537029 A JP2019537029 A JP 2019537029A JP 2019537029 A JP2019537029 A JP 2019537029A JP 7023284 B2 JP7023284 B2 JP 7023284B2
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- 239000004065 semiconductor Substances 0.000 claims description 141
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 120
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 99
- 229910052710 silicon Inorganic materials 0.000 claims description 99
- 239000010703 silicon Substances 0.000 claims description 99
- 235000012239 silicon dioxide Nutrition 0.000 claims description 60
- 239000000377 silicon dioxide Substances 0.000 claims description 60
- 239000000758 substrate Substances 0.000 claims description 60
- 229910001404 rare earth metal oxide Inorganic materials 0.000 claims description 45
- 238000000034 method Methods 0.000 claims description 42
- 239000002070 nanowire Substances 0.000 claims description 38
- 238000004519 manufacturing process Methods 0.000 claims description 36
- 230000008569 process Effects 0.000 claims description 27
- 229910000577 Silicon-germanium Inorganic materials 0.000 claims description 21
- LEVVHYCKPQWKOP-UHFFFAOYSA-N [Si].[Ge] Chemical compound [Si].[Ge] LEVVHYCKPQWKOP-UHFFFAOYSA-N 0.000 claims description 21
- 238000005530 etching Methods 0.000 claims description 16
- 229910052751 metal Inorganic materials 0.000 claims description 14
- 239000002184 metal Substances 0.000 claims description 14
- 238000003860 storage Methods 0.000 claims description 13
- 238000000151 deposition Methods 0.000 claims description 8
- 150000004767 nitrides Chemical class 0.000 claims description 8
- 238000005304 joining Methods 0.000 claims description 2
- ZLMJMSJWJFRBEC-UHFFFAOYSA-N Potassium Chemical compound [K] ZLMJMSJWJFRBEC-UHFFFAOYSA-N 0.000 claims 2
- 229910052700 potassium Inorganic materials 0.000 claims 2
- 239000011591 potassium Substances 0.000 claims 2
- 229910052581 Si3N4 Inorganic materials 0.000 description 24
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 23
- 238000010586 diagram Methods 0.000 description 17
- 230000000694 effects Effects 0.000 description 13
- 239000012212 insulator Substances 0.000 description 10
- 238000001020 plasma etching Methods 0.000 description 8
- 239000000126 substance Substances 0.000 description 7
- 230000015572 biosynthetic process Effects 0.000 description 6
- 238000005229 chemical vapour deposition Methods 0.000 description 6
- 239000007789 gas Substances 0.000 description 6
- 230000008021 deposition Effects 0.000 description 5
- 239000000463 material Substances 0.000 description 5
- 238000012986 modification Methods 0.000 description 5
- 230000004048 modification Effects 0.000 description 5
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 4
- 238000010168 coupling process Methods 0.000 description 4
- 238000000708 deep reactive-ion etching Methods 0.000 description 4
- 238000005516 engineering process Methods 0.000 description 4
- 238000010438 heat treatment Methods 0.000 description 4
- 150000002500 ions Chemical class 0.000 description 4
- MRELNEQAGSRDBK-UHFFFAOYSA-N lanthanum(3+);oxygen(2-) Chemical compound [O-2].[O-2].[O-2].[La+3].[La+3] MRELNEQAGSRDBK-UHFFFAOYSA-N 0.000 description 4
- 239000001301 oxygen Substances 0.000 description 4
- 229910052760 oxygen Inorganic materials 0.000 description 4
- 238000000992 sputter etching Methods 0.000 description 4
- VZGDMQKNWNREIO-UHFFFAOYSA-N tetrachloromethane Chemical compound ClC(Cl)(Cl)Cl VZGDMQKNWNREIO-UHFFFAOYSA-N 0.000 description 4
- XPDWGBQVDMORPB-UHFFFAOYSA-N Fluoroform Chemical compound FC(F)F XPDWGBQVDMORPB-UHFFFAOYSA-N 0.000 description 3
- 229910004205 SiNX Inorganic materials 0.000 description 3
- 238000000231 atomic layer deposition Methods 0.000 description 3
- 229910000420 cerium oxide Inorganic materials 0.000 description 3
- 238000006243 chemical reaction Methods 0.000 description 3
- 230000008878 coupling Effects 0.000 description 3
- 238000005859 coupling reaction Methods 0.000 description 3
- 238000013461 design Methods 0.000 description 3
- 230000005669 field effect Effects 0.000 description 3
- CMIHHWBVHJVIGI-UHFFFAOYSA-N gadolinium(iii) oxide Chemical compound [O-2].[O-2].[O-2].[Gd+3].[Gd+3] CMIHHWBVHJVIGI-UHFFFAOYSA-N 0.000 description 3
- BMMGVYCKOGBVEV-UHFFFAOYSA-N oxo(oxoceriooxy)cerium Chemical compound [Ce]=O.O=[Ce]=O BMMGVYCKOGBVEV-UHFFFAOYSA-N 0.000 description 3
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 3
- 229910021332 silicide Inorganic materials 0.000 description 3
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 description 3
- 125000006850 spacer group Chemical group 0.000 description 3
- QGZKDVFQNNGYKY-UHFFFAOYSA-N Ammonia Chemical compound N QGZKDVFQNNGYKY-UHFFFAOYSA-N 0.000 description 2
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 2
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 description 2
- YCKRFDGAMUMZLT-UHFFFAOYSA-N Fluorine atom Chemical compound [F] YCKRFDGAMUMZLT-UHFFFAOYSA-N 0.000 description 2
- GQPLMRYTRLFLPF-UHFFFAOYSA-N Nitrous Oxide Chemical compound [O-][N+]#N GQPLMRYTRLFLPF-UHFFFAOYSA-N 0.000 description 2
- 229910004298 SiO 2 Inorganic materials 0.000 description 2
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 description 2
- 230000004888 barrier function Effects 0.000 description 2
- 239000007795 chemical reaction product Substances 0.000 description 2
- 230000007423 decrease Effects 0.000 description 2
- 238000000407 epitaxy Methods 0.000 description 2
- 239000011737 fluorine Substances 0.000 description 2
- 229910052731 fluorine Inorganic materials 0.000 description 2
- 230000006870 function Effects 0.000 description 2
- 229910052732 germanium Inorganic materials 0.000 description 2
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 2
- 230000001939 inductive effect Effects 0.000 description 2
- 238000005468 ion implantation Methods 0.000 description 2
- 238000004943 liquid phase epitaxy Methods 0.000 description 2
- 230000000873 masking effect Effects 0.000 description 2
- 238000001451 molecular beam epitaxy Methods 0.000 description 2
- 230000003647 oxidation Effects 0.000 description 2
- 238000007254 oxidation reaction Methods 0.000 description 2
- 230000003071 parasitic effect Effects 0.000 description 2
- 238000000059 patterning Methods 0.000 description 2
- 229920002120 photoresistant polymer Polymers 0.000 description 2
- 238000005268 plasma chemical vapour deposition Methods 0.000 description 2
- 239000012495 reaction gas Substances 0.000 description 2
- 238000001338 self-assembly Methods 0.000 description 2
- 229910000077 silane Inorganic materials 0.000 description 2
- 238000003786 synthesis reaction Methods 0.000 description 2
- 238000012546 transfer Methods 0.000 description 2
- 238000001947 vapour-phase growth Methods 0.000 description 2
- ZAMOUSCENKQFHK-UHFFFAOYSA-N Chlorine atom Chemical compound [Cl] ZAMOUSCENKQFHK-UHFFFAOYSA-N 0.000 description 1
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 1
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 1
- NRTOMJZYCJJWKI-UHFFFAOYSA-N Titanium nitride Chemical compound [Ti]#N NRTOMJZYCJJWKI-UHFFFAOYSA-N 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 229910021529 ammonia Inorganic materials 0.000 description 1
- 229910021417 amorphous silicon Inorganic materials 0.000 description 1
- 238000000137 annealing Methods 0.000 description 1
- 229910052786 argon Inorganic materials 0.000 description 1
- 239000000460 chlorine Substances 0.000 description 1
- 229910052801 chlorine Inorganic materials 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 230000000295 complement effect Effects 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- MROCJMGDEKINLD-UHFFFAOYSA-N dichlorosilane Chemical compound Cl[SiH2]Cl MROCJMGDEKINLD-UHFFFAOYSA-N 0.000 description 1
- 238000001312 dry etching Methods 0.000 description 1
- 230000005672 electromagnetic field Effects 0.000 description 1
- 238000005538 encapsulation Methods 0.000 description 1
- 230000001747 exhibiting effect Effects 0.000 description 1
- 238000001900 extreme ultraviolet lithography Methods 0.000 description 1
- 239000010408 film Substances 0.000 description 1
- 229910001938 gadolinium oxide Inorganic materials 0.000 description 1
- 229940075613 gadolinium oxide Drugs 0.000 description 1
- CJNBYAVZURUTKZ-UHFFFAOYSA-N hafnium(iv) oxide Chemical compound O=[Hf]=O CJNBYAVZURUTKZ-UHFFFAOYSA-N 0.000 description 1
- 239000001257 hydrogen Substances 0.000 description 1
- 229910052739 hydrogen Inorganic materials 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 238000004518 low pressure chemical vapour deposition Methods 0.000 description 1
- 230000007246 mechanism Effects 0.000 description 1
- 230000008018 melting Effects 0.000 description 1
- 238000002844 melting Methods 0.000 description 1
- 239000007769 metal material Substances 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 238000010295 mobile communication Methods 0.000 description 1
- 239000001272 nitrous oxide Substances 0.000 description 1
- 229910052756 noble gas Inorganic materials 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 239000011148 porous material Substances 0.000 description 1
- 239000002243 precursor Substances 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 150000002909 rare earth metal compounds Chemical class 0.000 description 1
- 239000002994 raw material Substances 0.000 description 1
- 230000009257 reactivity Effects 0.000 description 1
- 230000008521 reorganization Effects 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- 238000005118 spray pyrolysis Methods 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- 230000003068 static effect Effects 0.000 description 1
- 230000001360 synchronised effect Effects 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
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- B82Y10/00—Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
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- H—ELECTRICITY
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- H01L29/0642—Isolation within the component, i.e. internal isolation
- H01L29/0649—Dielectric regions, e.g. SiO2 regions, air gaps
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- H01L29/107—Substrate region of field-effect devices
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- H01L29/1079—Substrate region of field-effect devices of field-effect transistors with insulated gate
- H01L29/1083—Substrate region of field-effect devices of field-effect transistors with insulated gate with an inactive supplementary region, e.g. for preventing punch-through, improving capacity effect or leakage current
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- H01L29/16—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System
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- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
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- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/42384—Gate electrodes for field effect devices for field-effect transistors with insulated gate for thin film field effect transistors, e.g. characterised by the thickness or the shape of the insulator or the dimensions, the shape or the lay-out of the conductor
- H01L29/42392—Gate electrodes for field effect devices for field-effect transistors with insulated gate for thin film field effect transistors, e.g. characterised by the thickness or the shape of the insulator or the dimensions, the shape or the lay-out of the conductor fully surrounding the channel, e.g. gate-all-around
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- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
- H01L29/4966—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET the conductor material next to the insulator being a composite material, e.g. organic material, TiN, MoSi2
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- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
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- H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
- H01L29/51—Insulating materials associated therewith
- H01L29/517—Insulating materials associated therewith the insulating material comprising a metallic compound, e.g. metal oxide, metal silicate
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
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- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66439—Unipolar field-effect transistors with a one- or zero-dimensional channel, e.g. quantum wire FET, in-plane gate transistor [IPG], single electron transistor [SET], striped channel transistor, Coulomb blockade transistor
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- H—ELECTRICITY
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- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
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- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
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- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66545—Unipolar field-effect transistors with an insulated gate, i.e. MISFET using a dummy, i.e. replacement gate in a process wherein at least a part of the final gate is self aligned to the dummy gate
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
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- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
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- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66553—Unipolar field-effect transistors with an insulated gate, i.e. MISFET using inside spacers, permanent or not
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
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- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
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- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66787—Unipolar field-effect transistors with an insulated gate, i.e. MISFET with a gate at the side of the channel
- H01L29/66795—Unipolar field-effect transistors with an insulated gate, i.e. MISFET with a gate at the side of the channel with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
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- H01L29/775—Field effect transistors with one dimensional charge carrier gas channel, e.g. quantum wire FET
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- H01L29/785—Field effect transistors with field effect produced by an insulated gate having a channel with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
- H01L29/7856—Field effect transistors with field effect produced by an insulated gate having a channel with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET with an non-uniform gate, e.g. varying doping structure, shape or composition on different sides of the fin, or different gate insulator thickness or composition on opposing fin sides
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- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/785—Field effect transistors with field effect produced by an insulated gate having a channel with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
- H01L2029/7858—Field effect transistors with field effect produced by an insulated gate having a channel with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET having contacts specially adapted to the FinFET geometry, e.g. wrap-around contacts
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Description
Claims (20)
- 半導体デバイス製造方法であって、
シリコン基板内に第1トレンチをエッチングすることであって、前記第1トレンチの長さは、少なくとも前記半導体デバイスのチャネル長であり、ソース領域のサイト及びドレイン領域のサイトによって制限されている、ことと、
前記第1トレンチの上部に少なくとも酸化物層を形成することと、
前記酸化物層及びシリコン基板の両方の上部に半導体層の積層体を配置することであって、前記積層体は、少なくとも2つのタイプの半導体層の間で交互に配置された複数の半導体層を含み、前記積層体の下部は、前記第1トレンチの両側で前記シリコン基板と接触する、ことと、
前記積層体からフィンパターンを形成することと、
前記積層体から第1タイプ以外のタイプの半導体層の一部を除去することであって、前記一部の長さは前記チャネル長と少なくとも等しく、前記第1タイプの半導体層は、前記デバイスのゲート領域にナノワイヤを形成する、ことと、
前記ゲート領域の前記ナノワイヤ上に二酸化ケイ素層を形成し、前記二酸化ケイ素層上に高k膜を形成することと、を含む、
半導体デバイス製造方法。 - 前記第1トレンチの両側で前記シリコン基板と接触する前記半導体層の積層体の領域は、前記ソース領域のサイトと前記ドレイン領域のサイトとを含む、
請求項1の半導体デバイス製造方法。 - 前記ナノワイヤ上に形成された前記二酸化ケイ素層の厚さより少なくとも一桁大きい厚さを有する酸化物層を、前記第1トレンチ内に形成することを含む、
請求項1の半導体デバイス製造方法。 - 前記酸化物層を形成する前に、
前記第1トレンチの前記シリコン基板上に二酸化ケイ素層を形成することと、
前記第1トレンチの前記二酸化ケイ素層上に窒化物層を形成することであって、前記窒化物層は、前記第1トレンチの前記酸化物層と前記二酸化ケイ素層との間に存在する、ことと、を含む、
請求項1の半導体デバイス製造方法。 - 前記酸化物層は、希土類金属酸化物を含む、
請求項1の半導体デバイス製造方法。 - 前記半導体層の積層体を配置することは、前記酸化物層及び前記シリコン基板の両方の上部で前記複数の半導体層を成長させることを含む、
請求項5の半導体デバイス製造方法。 - 前記半導体層の積層体を配置することは、
前記複数の半導体層を成長させて、完成した積層体を形成することと、
前記完成した積層体を、前記酸化物層及び前記シリコン基板の両方の上部に接合することと、を含む、
請求項1の半導体デバイス製造方法。 - 前記酸化物層は、二酸化ケイ素である、
請求項7の半導体デバイス製造方法。 - 1つ以上のナノワイヤが前記酸化物層の上部に存在する場合に、
前記酸化物層内に第2トレンチをエッチングすることと、
前記1つ以上のナノワイヤのために、ゲート金属を前記第2トレンチに堆積することと、を含む、
請求項1の半導体デバイス製造方法。 - 前記第1タイプの半導体層は、シリコン及びシリコンゲルマニウムのうち一方を含む、
請求項1の半導体デバイス製造方法。 - 半導体デバイスであって、
第1トレンチを含むシリコン基板であって、前記第1トレンチの長さは、少なくとも前記デバイスのチャネル長であり、ソース領域のサイト及びドレイン領域のサイトによって制限されている、シリコン基板と、
前記第1トレンチの上部に存在する酸化物層と、
前記酸化物層及びシリコン基板の両方の上部において半導体層の積層体から形成されたフィンパターンであって、前記積層体は、少なくとも2つのタイプの半導体層の間で交互に配置された複数の半導体層を含み、前記積層体の下部は、前記第1トレンチの両側で前記シリコン基板と接触し、第1タイプ以外のタイプの半導体層の一部が前記積層体から除去されて、前記半導体デバイスのゲート領域にナノワイヤを形成する、フィンパターンと、
前記ゲート領域の前記ナノワイヤ上の二酸化ケイ素層、及び、前記二酸化ケイ素層上の高k膜と、を備える、
半導体デバイス。 - 前記第1トレンチの両側で前記シリコン基板と接触する前記半導体層の積層体の下部の領域は、前記ソース領域のサイトと前記ドレイン領域のサイトとを含む、
請求項11の半導体デバイス。 - 前記第1トレンチの前記酸化物層の厚さは、前記ナノワイヤ上に形成された二酸化ケイ素層の厚さより少なくとも一桁大きい、
請求項12の半導体デバイス。 - 前記第1トレンチの前記シリコン基板上の二酸化ケイ素層と、
前記第1トレンチの前記二酸化ケイ素層上の窒化物層であって、前記第1トレンチの前記酸化物層と前記二酸化ケイ素層との間に存在する、窒化物層と、を備える、
請求項12の半導体デバイス。 - 前記酸化物層は、希土類金属酸化物を含む、
請求項12の半導体デバイス。 - 前記酸化物層は二酸化ケイ素を含み、前記積層体は、前記第1トレンチの両側で前記酸化物層及びシリコンの両方の上部に接合されている、
請求項12の半導体デバイス。 - ゲート金属が充填された前記チャネル長内の前記酸化物層内の第2トレンチを備える、
請求項12の半導体デバイス。 - 前記第1タイプの半導体層は、シリコン及びシリコンゲルマニウムのうち一方を含む、
請求項12の半導体デバイス。 - プログラム命令を記憶するコンピュータ可読記憶媒体であって、前記プログラム命令は、プロセッサによって実行されると、
シリコン基板内に第1トレンチをエッチングすることであって、前記第1トレンチの長さは、少なくとも半導体デバイスのチャネル長であり、ソース領域のサイト及びドレイン領域のサイトによって制限されている、ことと、
前記第1トレンチの上部に少なくとも酸化物層を形成することと、
前記酸化物層及びシリコン基板の両方の上部に半導体層の積層体を配置することであって、前記積層体は、少なくとも2つのタイプの半導体層の間で交互に配置された複数の半導体層を含み、前記積層体の下部は、前記第1トレンチの両側で前記シリコン基板と接触する、ことと、
前記積層体からフィンパターンを形成することと、
前記積層体から第1タイプ以外のタイプの半導体層の一部を除去することであって、前記一部の長さは前記チャネル長と少なくとも等しく、前記第1タイプの半導体層は、前記デバイスのゲート領域にナノワイヤを形成する、ことと、
前記ゲート領域の前記ナノワイヤ上に二酸化ケイ素層を形成し、前記二酸化ケイ素層上に高k膜を形成することと、を含む半導体製造方法を前記プロセッサに実行させる、
コンピュータ可読記憶媒体。 - 前記プログラム命令は、プロセッサによって実行されると、
前記ナノワイヤ上に形成された前記二酸化ケイ素層の厚さより少なくとも一桁大きい厚さを有する酸化物層を、前記第1トレンチ内に形成することを含む半導体プロセスを前記プロセッサに実行させる、
請求項19のコンピュータ可読記憶媒体。
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