JP6977449B2 - 電界効果トランジスタの製造方法及び電界効果トランジスタ - Google Patents
電界効果トランジスタの製造方法及び電界効果トランジスタ Download PDFInfo
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- JP6977449B2 JP6977449B2 JP2017186637A JP2017186637A JP6977449B2 JP 6977449 B2 JP6977449 B2 JP 6977449B2 JP 2017186637 A JP2017186637 A JP 2017186637A JP 2017186637 A JP2017186637 A JP 2017186637A JP 6977449 B2 JP6977449 B2 JP 6977449B2
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Description
本発明の実施形態に係る電界効果トランジスタの製造方法及び電界効果トランジスタの具体例を、以下に図面を参照しつつ説明する。なお、本発明はこれらの例示に限定されるものではなく、特許請求の範囲によって示され、特許請求の範囲と均等の意味及び範囲内でのすべての変更が含まれることが意図される。以下の説明では、図面の説明において同一の要素には同一の符号を付し、重複する説明を省略する。
まず、半絶縁性のSiC基板上に、MOCVD法においてTMA及びNH3を原料とし、成長温度1080℃、圧力13.3kPaにて、バッファ層13としてのAlN層を成長させた。成長後のAlN層の厚さは、30nmであった。次に、TMG及びNH3を原料とし、成長温度1080℃、圧力13.3kPaにて、バッファ層13の上にチャネル層14としてのGaN層を成長させた。
Rc:ソース電極31及びドレイン電極32と半導体とのコンタクト(接触)抵抗
Rn+:ソース電極31及びドレイン電極32の直下からチャネル領域14aとの境界までのn型半導体領域16a,16bのアクセス抵抗
Rsh:n型半導体領域16a,16bとの境界からゲート電極33直下までのチャネル領域14aのアクセス抵抗
Ron:ソース電極31からドレイン電極32までのオン抵抗
Claims (7)
- 窒化物半導体を主構成材料とする半導体動作層を基板の主面上に形成する工程と、
前記主面に沿った方向において前記半導体動作層を挟む一対のZnO系化合物半導体領域を形成する工程と、
前記一対のZnO系化合物半導体領域上にそれぞれ設けられ、AlO若しくはZrOを含む一対の保護領域を形成する工程と、
各保護領域の一部をエッチングして各ZnO系化合物半導体領域を露出させる開口を形成する工程と、
各ZnO系化合物半導体領域を露出させる工程の前若しくは後に、前記一対のZnO系化合物半導体領域上に開口を有するマスクを形成する工程と、
前記ZnO系化合物半導体領域の露出面を洗浄する工程と、
一方の前記ZnO系化合物半導体領域の前記露出面上にソース電極を、他方の前記ZnO系化合物半導体領域の前記露出面上にドレイン電極を、それぞれ前記マスクを用いたリフトオフ法により形成する工程と、
前記半導体動作層上にゲート電極を形成する工程と、
を含む、電界効果トランジスタの製造方法。 - 前記ZnO系化合物半導体領域及び前記保護領域をパルスレーザ堆積法及びリフトオフ法により形成する、請求項1に記載の電界効果トランジスタの製造方法。
- 前記ZnO系化合物半導体領域及び前記保護領域の形成後に熱処理を行う、請求項2に記載の電界効果トランジスタの製造方法。
- 基板の主面上に設けられた窒化物半導体を主構成材料とする半導体動作層と、
前記主面に沿った方向において前記半導体動作層を挟む一対のZnO系化合物半導体領域と、
前記一対のZnO系化合物半導体領域上にそれぞれ設けられ、AlO若しくはZrOを含み、各ZnO系化合物半導体領域を露出させる開口を有する一対の保護領域と、
一方の前記ZnO系化合物半導体領域の露出面上に設けられたソース電極と、
他方の前記ZnO系化合物半導体領域の露出面上に設けられたドレイン電極と、
前記半導体動作層上に設けられたゲート電極と、
を備え、
一方の前記保護領域は、前記ソース電極と前記ゲート電極との間に設けられ、前記ソース電極と離間しており、
他方の前記保護領域は、前記ドレイン電極と前記ゲート電極との間に設けられ、前記ドレイン電極と離間している、電界効果トランジスタ。 - 一方の前記保護領域が有する前記開口の側壁は、一方の前記ZnO系化合物半導体領域に近づくに従い前記ソース電極から後退し、
他方の前記保護領域が有する前記開口の側壁は、他方の前記ZnO系化合物半導体領域に近づくに従い前記ドレイン電極から後退している、請求項4に記載の電界効果トランジスタ。 - 前記一対のZnO系化合物半導体領域の厚さが少なくとも120nmである、請求項4又は請求項5に記載の電界効果トランジスタ。
- 前記一対の保護領域の厚さが少なくとも100nmである、請求項4から請求項6のいずれか一項に記載の電界効果トランジスタ。
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