JP6734785B2 - Method for manufacturing printed wiring board - Google Patents

Description

The present invention relates to a method for manufacturing a printed wiring board.

In recent years, in order to increase the mounting density of printed wiring boards and reduce the size thereof, multilayering of printed wiring boards has been widely performed. Such a multilayer printed wiring board is used in many portable electronic devices for the purpose of weight reduction and size reduction. Further, the multilayer printed wiring board is required to further reduce the thickness of the interlayer insulating layer and further reduce the weight of the wiring board.

As a technique to satisfy such requirements, a method of manufacturing a printed wiring board in which a wiring layer is directly formed on an ultrathin metal layer and then multilayered is proposed, and one of them is a manufacturing method using a coreless build-up method. Has been adopted. An example of a method for manufacturing a printed wiring board by a coreless build-up method using a copper foil with a carrier is shown in FIGS. In the example shown in FIGS. 1 and 2, first, a copper foil with a carrier 10 including a carrier layer 12, a release layer 14 and a copper foil 16 in this order is laminated on a coreless support 18 such as a prepreg. Next, a photoresist pattern 20 is formed on the copper foil 16, and a wiring pattern 24 is formed through pattern plating (electro copper plating) 22 and peeling of the photoresist pattern 20. Then, the pattern plating is subjected to a pre-lamination treatment such as a roughening treatment to form the first wiring layer 26. Then, as shown in FIG. 2, an insulating layer 28 and a copper foil 30 with a carrier (including a carrier layer 32, a peeling layer 34 and a copper foil 36) are laminated to form a build-up layer 42, and the carrier layer 32 is formed. The copper foil 36 and the insulating layer 28 immediately below the copper foil 36 are laser-processed with a carbon dioxide laser or the like. Then, patterning is performed by photoresist processing, electroless copper plating, electrolytic copper plating, photoresist stripping, flash etching, etc. to form the second wiring layer 38, and this patterning is repeated as necessary to repeat the nth wiring layer. Up to 40 (n is an integer of 2 or more). Then, the coreless support 18 is peeled off together with the carrier layer 12, and the copper foils 16 and 36 exposed between the wiring patterns are removed by flash etching to obtain a predetermined wiring pattern.

An appearance image inspection for confirming the accuracy of the position and shape of the wiring pattern is generally performed on the printed wiring board on which the wiring pattern is formed. In this appearance image inspection, a predetermined light is emitted from a light source using an optical automatic appearance inspection (AOI) device to obtain a binary image of a wiring pattern, and a pattern of the binary image and the design data image is obtained. It is performed by attempting matching and evaluating the match/mismatch between the two. Generally, in the appearance image inspection, in the case of the example shown in FIG. 2, after the copper foils 16 and 36 exposed between the wiring patterns on the surface of the insulating layer 28 are removed by flash etching, the insulating layer 28 is removed between the wiring patterns. This is done on the exposed surface. For example, Patent Document 1 (Japanese Patent Laid-Open No. 2014-116533) discloses a method for manufacturing a coreless wiring board using a peelable metal foil, but a predetermined inspection such as an appearance inspection is performed on a wiring laminated portion. This is performed after peeling off the reinforcing substrate and removing the copper foil adhering to the wiring laminated portion to expose the dielectric layer (insulating resin layer) (final step).

JP, 2014-116533, A

However, as described above, the method of visually inspecting the wiring pattern portion of the first wiring layer 26 formed on the surface of the insulating layer 28 after the manufacturing of the printed wiring board (or the post-process step of the manufacturing process) is not performed before. Even if there is a chip having a defective portion in the wiring pattern of the first wiring layer 26 immediately after the first wiring layer 26 is formed on the surface of the copper foil 16 of the coreless support, which is a step, the defective product is determined at this stage. Will not be possible. Therefore, even if the chip non-defective rate of the first wiring layer 26 is extremely low and it is economically disadvantageous to proceed to the subsequent step, the build-up laminating step proceeds without understanding the phenomenon. In that case, since the inspection is performed after reaching the final process, there is a risk that a large number of chips containing a large number of defective products stay in the intermediate process. Further, in the above method, it is necessary to perform the appearance inspection step of the buildup layer over all the chips regardless of the presence or absence of a defective portion in the wiring pattern of the first wiring layer 26, which unnecessarily delays the takt time of the inspection step. Had. Therefore, if the appearance image inspection of the wiring pattern can be performed at a stage immediately after the wiring pattern of the first wiring layer 26 is formed on the surface of the copper foil 16 of the coreless support to identify the chip in which the wiring pattern defect occurs, This is convenient because the inspection process after the subsequent build-up stacking process can be skipped and the inspection process can be simplified. However, the appearance image inspection after manufacturing the printed wiring board is performed by using the conventional color tone contrast between the insulating layer (resin layer) and the wiring layer (copper layer), that is, the color tone contrast caused by different materials. Therefore, there is an advantage that the inspection accuracy is high. On the other hand, when visual inspection is performed at an early stage immediately after the formation of the first wiring layer, the wiring pattern must be detected between the same type of material such as the copper foil and the wiring layer (copper layer). There is a problem that the inspection accuracy is greatly reduced due to the lack of color tone contrast.

The present inventors have recently used a copper foil having a treated surface having an 8° diffuse reflectance SCI of 41% or less with respect to incident light in the manufacture of a printed wiring board, which enables the build-up after photoresist peeling and build-up. In the early stage before the formation of the wiring layer, it was found that the appearance image inspection of the wiring pattern formed on the copper foil can be performed with high precision while obtaining a high-definition binary image with high contrast. .. In addition, it was also found that it is possible to significantly improve the productivity of the printed wiring board by eliminating rejected products in the appearance image inspection at an early stage as described above.

Therefore, an object of the present invention is to enhance the appearance image inspection for a wiring pattern formed on a copper foil at an early stage after the photoresist is peeled off and before the build-up wiring layer is formed in the production of a printed wiring board. It is an object of the present invention to provide a method for manufacturing a printed wiring board, which can be performed with high accuracy while obtaining a high-definition binarized image based on color tone contrast, thereby significantly improving the productivity of the printed wiring board.

According to one aspect of the present invention, there is provided a method for manufacturing a printed wiring board,
A step of preparing a copper foil having a treated surface having an 8° diffuse reflectance SCI of 41% or less for incident light;
Forming a photoresist pattern on the treated surface of the copper foil;
A step of performing electrolytic copper plating on the copper foil on which the photoresist pattern is formed,
A step of peeling the photoresist pattern to form a wiring pattern,
A step of performing an appearance image inspection of the wiring pattern on the copper foil on which the wiring pattern is formed,
A method is provided, including:

It is a figure which shows the first half process in an example of the manufacturing method of the printed wiring board using the coreless buildup method. The latter half process following the process shown in FIG. 1 in an example of a method for manufacturing a printed wiring board using the coreless build-up method is shown. It is a conceptual diagram which shows the measuring system used for an external appearance image inspection in relation with the cross-sectional structure of a wiring pattern. It is a figure which shows an example of the external appearance image result in the case where a wiring pattern and a space are satisfactorily distinguished in association with the cross-sectional structure of the wiring pattern. It is an example of a design data image for pattern matching in an appearance image inspection. It is a figure which shows an example of the brightness|luminance histogram obtained at the time of initial setting of an external appearance image inspection, and a horizontal axis|shaft represents brightness|luminance (for example, 256 hierarchy axis|shaft), and a vertical axis|shaft represents each integrated amount. It is a figure which shows an example of an external appearance image result when it is difficult to identify a wiring pattern and a space.

The present invention relates to a method for manufacturing a printed wiring board. In the production of a printed wiring board according to the present invention, a copper foil having a predetermined treated surface on one side is prepared, a photoresist pattern is formed on the treated surface, electrolytic copper plating is formed, and a photoresist pattern is formed. This is performed by peeling the wiring pattern to form a wiring pattern, and performing a visual image inspection of the wiring pattern on the copper foil on which the wiring pattern is formed. Then, as the copper foil used in this series of steps, a copper foil having a treated surface having an 8° diffuse reflectance SCI of 41% or less for incident light is used. As a result, at an early stage after the photoresist is peeled off and before the build-up wiring layer is formed, the appearance image inspection of the wiring pattern formed on the copper foil can be performed while obtaining a high-definition binary image with high contrast. It can be performed with high accuracy.

As described above, in the present invention, the 8° diffuse reflectance SCI is adopted as the evaluation index of the copper foil. This is based on the fact that it was found that 8°, which has a high visibility of diffuse reflection with respect to the glossy copper surface, is effective for the appearance image inspection on the glossy copper surface which is the wiring pattern. It has also been found that a light source using a red LED having a high reflection efficiency (high visibility) with respect to a glossy copper surface, particularly a light source having a peak region at 635 nm is particularly effective for this appearance image inspection. That is, with a light source having a peak region at this wavelength, for example, it becomes easy to recognize an image showing a defect or short circuit of a fine wiring pattern of 3 μm or less. In order to obtain a high contrast in image processing with respect to the wiring pattern in the appearance image inspection by utilizing such characteristics, the surface of the copper foil has the above-mentioned red semiconductor in contrast to the first wiring layer which constitutes the wiring pattern. It is required that the reflection of light is small. In this respect, a copper foil having an 8° diffuse reflectance SCI of 41% or less for incident light having a wavelength of 635 nm is very advantageous. This will be described below with reference to an example of the appearance image inspection. In the appearance image inspection, for example, as conceptually shown in FIG. 3, the substrate on which the wiring pattern 24 is formed is irradiated with red semiconductor light (for example, light having a peak region at a wavelength of 635 nm) from the ring-shaped light source 50, and The reflected light from the one wiring layer 26 and the reflected light from the copper foil 16 are received by the light receiving section 52, and the obtained brightness data is compared with a preset threshold value to obtain a gap (space) and a wiring section (line). 4 to form a binarized image as shown in FIG. 4, and perform pattern matching based on the binarized image and the image derived from the design data as shown in FIG. This is done by evaluating the accuracy of the shape. The threshold value used at this time is, in the initial setting, the entire surface of the substrate on which the wiring pattern 24 is formed (the surface where the first wiring layer 26 is directly formed on the copper foil 16) or a specific sampling inspection site. The brightness data obtained by scanning in advance is integrated to create a brightness histogram as shown in FIG. 6 (a horizontal axis represents brightness (for example, a 256-level axis), a vertical axis represents an integrated amount), and the brightness histogram space (gap) Part) between the peak P _S derived from the line and the peak P _L derived from the line (wiring part), between the respective peak ends (between the end of the peak corresponding to the gap part and the start point of the peak corresponding to the wiring part). It can be determined as the median. Therefore, as shown in FIG. 6, as the peak-to-peak distance D between the gap portion (space) and the wiring portion (line) in the luminance histogram is larger, a high-definition binarized image with higher contrast is obtained in appearance image inspection. As a result, the visibility is improved. The 8° diffuse reflectance SCI of the incident light on the treated surface of the copper foil 16 is preferably 41 with respect to the incident light having a wavelength within the peak region of the light source wavelength used for appearance image inspection (preferably incident light having a wavelength of 635 nm). If it is less than or equal to %, the peak-to-peak distance D in the above-described brightness histogram significantly increases. As a result, the appearance image inspection can be performed with high accuracy while obtaining a high-definition binary image with high contrast.

As described above, according to the method of the present invention, the appearance image inspection for the wiring pattern formed on the copper foil is performed by the high contrast at the early stage after the photoresist is removed and before the build-up wiring layer is formed. It can be performed with high accuracy while obtaining a fine binary image. As described above, conventionally, the appearance image inspection is generally performed on the printed wiring board on which the wiring pattern is formed. However, the appearance image inspection is performed after the printed wiring board is manufactured (or after the manufacturing process is completed). In the case of inspection, even if there is a chip having a defective portion in the wiring pattern of the first wiring layer 26 immediately after the first wiring layer 26 is formed on the surface of the copper foil 16 of the coreless support, which is the previous step. At this stage, since the defect cannot be discriminated, it is necessary to perform the appearance inspection process of the buildup layer over all the chips, which wastefully delays the takt time of the inspection process. Therefore, it is convenient if the appearance image inspection can be performed at an earlier stage. However, the appearance image inspection after manufacturing the printed wiring board can perform a clear appearance image inspection by utilizing the contrast between the insulating layer (resin layer) and the wiring layer (copper layer), that is, the contrast caused by different materials. Therefore, there is an advantage that the inspection accuracy is high. On the other hand, when performing appearance image inspection at an earlier stage than that, it is necessary to detect the wiring pattern between the same type of material such as the copper foil and the wiring layer (copper layer), and the contrast between both materials is insufficient. For example, there is a problem that only a binarized image in which the wiring pattern as shown in FIG. 7 is unclear can be obtained, and the inspection accuracy is greatly reduced. In this respect, in the present invention, by using the copper foil having the above specific diffuse reflectance SCI, a high-definition binarized image with high contrast can be obtained, so that such a problem can be effectively avoided. As a result, the rejected products in the appearance image inspection can be excluded at the early stage as described above, so that the productivity of the printed wiring board can be significantly improved.

Hereinafter, embodiments of the method of the present invention will be described with reference to the process diagrams shown in FIGS. It should be noted that although the modes shown in FIGS. 1 and 2 are illustrated so that the copper foil with carrier 10 is provided on one surface of the coreless support 18 to form the build-up wiring layer 42 for simplification of description, It is desirable to provide the copper foil 10 with a carrier on both surfaces of the support 18 and form the build-up wiring layer 42 on the both surfaces.

(A) Preparation of Copper Foil As described above, the copper foil 16 has a surface having an 8° diffuse reflectance SCI of 41% or less for incident light. Such a treated surface is provided on one side of the copper foil 16 (in the case of the carrier-attached copper foil 10 as shown in FIG. 1, the side opposite to the release layer 14 (ie, the outermost surface of the carrier-attached copper foil 10)). Are typical, but may be provided on both sides. The incident light used to evaluate the 8° diffuse reflectance SCI preferably has a wavelength within the peak region of the light source wavelength used for appearance image inspection. Further, as described above, it is preferable that the appearance image inspection is performed using a light source having a peak region at a wavelength of 635 nm. Therefore, the wavelength of the incident light used for the evaluation of the 8° diffuse reflectance SCI is preferably 635 nm. The 8° diffuse reflectance SCI for incident light (for example, incident light having a wavelength of 635 nm) is 41% or less, preferably 20% or less, and more preferably 15% or less. The 8° diffuse reflectance SCI for incident light can be measured in accordance with JIS Z8722 (2012) using a commercially available spectral colorimeter (for example, SD7000 manufactured by Nippon Denshoku Industries Co., Ltd.). It is preferable that such a treated surface having a low 8° diffuse reflectance SCI has a small diffuse reflection component for incident light (for example, incident light having a wavelength of 635 nm). In other words, the treated surface having a low 8° diffuse reflectance SCI can be preferably realized by having a surface having a small flat component region that diffuses and reflects incident light (for example, incident light having a wavelength of 635 nm). Further, in order to improve accuracy in appearance image inspection, the surface of the copper foil is preferably copper or an alloy of copper and at least one selected from zinc, tin, cobalt, nickel, chromium and molybdenum, More preferably, a copper surface having a rough surface is preferable from the viewpoint of keeping the diffuse reflectance low.

The copper foil 16 is not particularly limited and may have a known configuration adopted for a copper foil with a carrier, except that it has the above-mentioned 8° diffuse reflectance SCI. For example, the copper foil 16 may be formed by a wet film forming method such as an electroless plating method and an electrolytic plating method, a dry film forming method such as sputtering and chemical vapor deposition, or a combination thereof. In order to obtain a granular surface, it is preferably formed by electrolytic plating. The thickness of the copper foil 16 is preferably 0.05 μm to 7 μm, more preferably 0.075 μm to 5 μm, still more preferably 0.09 μm to 4 μm.

It is further preferable that the treated surface of the copper foil 16 has a grainy rough surface (that is, a rough surface composed of irregularities composed of a plurality of or a large number of particles). By doing so, the 8° diffuse reflectance SCI for incident light (preferably incident light having a wavelength of 635 nm) can be easily made 41% or less, and the adhesion with the photoresist pattern 20 can be improved. The average particle diameter D of the roughened particles by image analysis is preferably 0.04 to 0.53 μm, more preferably 0.08 to 0.13 μm, and further preferably 0.09 to 0.12 μm. .. Within the above preferred range, the roughened surface is provided with appropriate roughness to ensure excellent adhesion with the photoresist, and at the same time, the opening property of the unnecessary region of the photoresist is favorably realized during the photoresist development. As a result, it is possible to effectively prevent a line defect of the pattern plating 22 that may occur due to the difficulty of plating due to the photoresist that has not been sufficiently opened. Therefore, it can be said that the photoresist developability and the pattern plating property are excellent when it is within the above-mentioned preferable range, and therefore, it is suitable for fine formation of the wiring pattern 24. The average particle diameter D obtained by image analysis of the roughened particles is determined by taking an image at a magnification such that a predetermined number (for example, 1000 to 3000 particles) of particles are included in one visual field of a scanning electron microscope (SEM). It is preferable that the measurement is performed by image processing using commercially available image analysis software. For example, 200 particles selected arbitrarily can be used, and the average diameter of these particles can be adopted as the average particle diameter D.

Further, on the treated surface of the copper foil 16, the roughened particles preferably have a particle density ρ by image analysis of 4 to 200 particles/μm ² , and more preferably 40 to 170 particles/μm ² , 70 to 100 particles/μm ² . μm ² . Further, when the roughened particles on the surface of the copper foil are dense and dense, a development residue of the photoresist is likely to occur, but when it is within the preferable range, such a development residue is less likely to occur, and therefore, The developability of the photoresist pattern 20 is also excellent. Therefore, it can be said that it is suitable for fine formation of the wiring pattern 24 within the preferable range. The particle density ρ obtained by image analysis of the roughened particles is determined by taking an image at a magnification such that a predetermined number of particles (for example, 1000 to 3000) are included in one visual field of a scanning electron microscope (SEM). It is preferable to measure by performing image processing using commercially available image analysis software. For example, a value obtained by dividing the number of particles (for example, 200) in a visual field containing 200 particles by the visual field area is adopted as the particle density ρ. do it.

Specular gloss Gs (85°) is another index for defining the roughened surface property suitable for the fine formation of the wiring pattern 24 as described above. In this case, the specular gloss Gs (85°) of the treated surface is preferably 20 to 100, more preferably 30 to 90, and further preferably 40 to 80. The specular gloss Gs (85°) by image analysis of the roughened particles can be measured using a commercially available gloss meter according to JIS Z 8741-1997 (specular gloss-measurement method).

After forming the above-mentioned roughened particles, the surface of the copper foil may be subjected to rust-preventing treatment such as nickel-zinc/chromate treatment, coupling treatment with a silane coupling agent, and the like. By these surface treatments, it is possible to improve the chemical stability of the copper foil surface and the adhesion when the insulating layers are laminated.

The copper foil 16 is preferably provided in the form of the copper foil 10 with a carrier. In this case, the copper foil with carrier 10 preferably comprises a carrier layer 12, a release layer 14 and a copper foil 16 in this order. In this case, the copper foil 16 can be in the form of a very thin copper foil.

The carrier layer 12 is a layer (typically a foil) for supporting the copper foil 16 and improving its handleability. Examples of the carrier layer include an aluminum foil, a copper foil, a stainless (SUS) foil, a resin film, a resin film having a metal coated on its surface, and the like, and a copper foil is preferable. The copper foil may be either a rolled copper foil or an electrolytic copper foil. The thickness of the carrier layer is typically 250 μm or less, preferably 12 μm to 200 μm.

The peeling layer 14 has a function of weakening the peeling strength of the carrier foil, ensuring stability of the strength, and suppressing mutual diffusion that may occur between the carrier foil and the copper foil during press molding at high temperature. It is a layer. The release layer is generally formed on one surface of the carrier foil, but may be formed on both surfaces. The release layer may be either an organic release layer or an inorganic release layer. Examples of organic components used in the organic release layer include nitrogen-containing organic compounds, sulfur-containing organic compounds, and carboxylic acids. Examples of the nitrogen-containing organic compound include a triazole compound and an imidazole compound. Among them, the triazole compound is preferable because the peelability is easily stabilized. Examples of triazole compounds include 1,2,3-benzotriazole, carboxybenzotriazole, N',N'-bis(benzotriazolylmethyl)urea, 1H-1,2,4-triazole and 3-amino-. 1H-1,2,4-triazole and the like can be mentioned. Examples of sulfur-containing organic compounds include mercaptobenzothiazole, thiocyanuric acid, and 2-benzimidazole thiol. Examples of carboxylic acids include monocarboxylic acids and dicarboxylic acids. On the other hand, examples of the inorganic component used in the inorganic release layer include Ni, Mo, Co, Cr, Fe, Ti, W, P, Zn, and a chromate treatment film. The release layer may be formed by bringing the release layer component-containing solution into contact with at least one surface of the carrier foil and adsorbing the release layer component onto the surface of the carrier foil in the solution. When the carrier foil is brought into contact with the release layer component-containing solution, this contact may be performed by immersing in the release layer component-containing solution, spraying the release layer component-containing solution, flowing down the release layer component-containing solution, or the like. In addition, a method of forming a film of the release layer component by a vapor phase method such as vapor deposition or sputtering can also be adopted. The release layer component may be fixed to the carrier foil surface by drying the release layer component-containing solution, electrodeposition of the release layer component in the release layer component-containing solution, or the like. The thickness of the release layer is typically 1 nm to 1 μm, preferably 5 nm to 500 nm. The peel strength between the peeling layer 14 and the carrier foil is preferably 7 gf/cm to 50 gf/cm, more preferably 10 gf/cm to 40 gf/cm, and further preferably 15 gf/cm to 30 gf/cm.

If desired, another functional layer may be provided between the release layer 14 and the carrier layer 12 and/or the copper foil 16. Examples of such other functional layers include auxiliary metal layers. The auxiliary metal layer preferably comprises nickel and/or cobalt. By forming such an auxiliary metal layer on the surface side of the carrier layer 12 and/or the surface side of the copper foil 16, it may occur between the carrier layer 12 and the copper foil 16 during hot press molding at high temperature or for a long time. Mutual diffusion can be suppressed, and stability of peeling strength of the carrier layer can be secured. The thickness of the auxiliary metal layer is preferably 0.001 to 3 μm.

(B) Formation of Laminated Body In step (b), prior to the formation of the photoresist pattern, the copper foil 16 or the copper foil 10 with a carrier is laminated on one side or both sides of the coreless support 18 to form a laminated body, if desired. You may. This lamination may be performed according to known conditions and methods adopted for laminating a copper foil and a prepreg or the like in a normal printed wiring board manufacturing process. The coreless support 18 typically comprises a resin, preferably an insulating resin. The coreless support 18 is preferably a prepreg and/or a resin sheet, more preferably a prepreg. A prepreg is a general term for a composite material obtained by impregnating or laminating a synthetic resin on a base material such as a synthetic resin plate, a glass plate, a glass woven cloth, a glass non-woven cloth, and paper. Preferable examples of the insulating resin with which the prepreg is impregnated include epoxy resin, cyanate resin, bismaleimide triazine resin (BT resin), polyphenylene ether resin, and phenol resin. In addition, examples of the insulating resin forming the resin sheet include insulating resins such as epoxy resin, polyimide resin, and polyester resin. Further, the coreless support 18 may contain filler particles made of various inorganic particles such as silica and alumina from the viewpoint of decreasing the coefficient of thermal expansion and increasing the rigidity. The thickness of the coreless support 18 is not particularly limited, but is preferably 3 to 1000 μm, more preferably 5 to 400 μm, and further preferably 10 to 200 μm.

(C) Forming Photoresist Pattern In this step (c), a photoresist pattern 20 is formed on the surface of the copper foil 16. The photoresist pattern 20 may be formed by either a negative resist or a positive resist, and the photoresist may be a film type or a liquid type. Further, the developing solution may be a developing solution such as sodium carbonate, sodium hydroxide, an amine-based aqueous solution, etc., and it is not particularly limited as long as it is carried out according to various methods and conditions generally used for manufacturing a printed wiring board.

(D) Electrolytic Copper Plating In this step (d), electrolytic copper plating 22 is applied to the copper foil 16 on which the photoresist pattern 20 is formed. The formation of the electrolytic copper plating 22 may be carried out according to various pattern plating methods and conditions generally used for manufacturing a printed wiring board such as a copper sulfate plating solution or a copper pyrophosphate plating solution, and is not particularly limited.

(E) Stripping of photoresist pattern In this step (e), the photoresist pattern 20 is stripped to form the wiring pattern 24. The photoresist pattern 20 can be peeled off by using an aqueous sodium hydroxide solution, an amine-based solution or an aqueous solution thereof, etc., and may be carried out according to various peeling methods and conditions generally used for manufacturing a printed wiring board, and is not particularly limited. In this way, the wiring pattern 24 in which the wiring portions (lines) formed of the first wiring layer 26 are arranged with the gap portions (spaces) arranged is directly formed on the surface of the copper foil 16. For example, in order to miniaturize the circuit, the line/space (L/S) is highly fine as much as 13 μm or less/13 μm or less (for example, 12 μm/12 μm, 10 μm/10 μm, 5 μm/5 μm, 2 μm/2 μm). It is preferable to form a patterned wiring pattern, and the appearance image inspection can be performed with high accuracy even in such a fine circuit in the next step (f) according to the method of the present invention.

(F) Appearance image inspection In this step (f), the appearance image inspection of the wiring pattern 24 is performed on the copper foil 16 on which the wiring pattern 24 is formed. By this appearance image inspection, it is possible to confirm the accuracy of the position and shape of the wiring pattern, and to select the laminate having the wiring pattern 24 having the desired accuracy. The visual image inspection is preferably performed by an optical automatic visual inspection (AOI). The appearance image inspection is as described above with reference to FIG. 3, etc., but the appearance image inspection is preferably performed using a light source having a peak region at a wavelength of 635 nm. This is because this wavelength has an advantage that it is easy to recognize an image showing a wiring pattern loss, a short circuit, or the like. In particular, the surface of the copper plating, which is the first wiring layer 26 that forms the wiring pattern 24 directly formed on the copper foil 16, has a characteristic that red semiconductor light is easily reflected. Therefore, in order to obtain a high contrast in the appearance image inspection, the surface of the copper foil 16 is required to reflect less of the red semiconductor light as opposed to the first wiring layer 26. In this respect, as described above, the copper foil 16 having an 8° diffuse reflectance SCI of 41% or less for incident light (preferably incident light having a wavelength of 635 nm) is very advantageous.

In the appearance image inspection, for example, as conceptually shown in FIG. 3, the substrate on which the wiring pattern 24 is formed is irradiated with red semiconductor light (for example, light having a wavelength of 635 nm) from the ring-shaped light source 50, and the first wiring layer 26. The light received from the copper foil 16 and the light reflected from the copper foil 16 are received by the light receiving portion 52, and the obtained brightness data is compared with a preset threshold value to discriminate between the gap portion (space) and the wiring portion (line). For example, a binarized image as shown in FIG. 4 is formed, and pattern matching based on this binarized image and an image derived from design data as shown in FIG. It is done by evaluating. In the initial setting, the threshold value used at this time is the entire surface of the substrate on which the wiring pattern 24 is formed (the surface where the first wiring layer 26 is directly formed on the copper foil 16) or a preset sampling inspection site. Is prescanned and the obtained brightness data is integrated to create a brightness histogram as shown in FIG. 6 (a horizontal axis represents brightness (for example, 256 hierarchical axes), a vertical axis represents an integrated amount), and a space in the brightness histogram ( Between peaks P _S originating from the gap) and peaks P _L originating from the line (wiring), between the respective peak ends (between the end of the peak corresponding to the gap and the starting point of the peak corresponding to the wiring). It may be determined as the median value of. As a result of the appearance image inspection, the laminates that do not meet the desired standard are excluded, and the laminates having the wiring pattern 24 having the desired accuracy are selected and appropriately subjected to the subsequent optional steps. ..

(G) Formation of Build-up Wiring Layer If desired, in step (g), it is preferable to form the build-up wiring layer 42 on the copper foil 16 after the visual image inspection to manufacture a laminate with a build-up wiring layer. .. For example, in addition to the first wiring layer 26 already formed on the copper foil 16, the insulating layer 28 and the second wiring layer 38 may be sequentially formed to form the buildup wiring layer 42. The method for forming the build-up layer after the second wiring layer 34 is not particularly limited, and a subtractive method, a MSAP (modified semi-additive process) method, a SAP (semi-additive) method, a full-additive method, etc. may be used. It can be used. For example, when a resin layer and a metal foil typified by a copper foil are laminated at the same time by press working, the panel plating layer and the metal foil are subjected to etching processing in combination with formation of an interlayer conduction means such as via hole formation and panel plating. Thus, a wiring pattern can be formed. When only the resin layer is attached to the surface of the copper foil 16 by pressing or laminating, a wiring pattern can be formed on the surface by a semi-additive method.

The above steps are repeated as needed to obtain a laminate with a buildup wiring layer. In this step, a buildup wiring layer in which a resin layer and a wiring layer including a wiring pattern are alternately laminated is formed, and a buildup wiring layer is formed up to the nth wiring layer 40 (n is an integer of 2 or more). It is preferred to obtain a laminate. This process may be repeated until a desired number of buildup wiring layers are formed. At this stage, a solder resist, bumps for mounting pillars or the like may be formed on the outer layer surface, if necessary. Further, the outermost layer surface of the build-up wiring layer may be formed with an outer layer wiring pattern in a subsequent step (i) of processing a multilayer wiring board.

(H) Separation of Laminate with Build-up Wiring Layer If desired, in step (h), the laminate with a build-up wiring layer is separated by the release layer 14 to obtain a multilayer wiring board 44 including the build-up wiring layer 42. Is preferred. This separation can be performed by peeling off the copper foil 16 and/or the carrier layer 12.

(I) Processing of Multilayer Wiring Board If desired, in step (i), it is preferable to process the multilayer wiring board 44 to obtain a printed wiring board 46. In this step, the multilayer wiring board 44 obtained in the above separating step is used to form a desired multilayer printed wiring board. As a processing method from the multilayer wiring board 44 to the multilayer printed wiring board 46, various known methods may be adopted. For example, the copper foil 16 on the outer layer of the multilayer wiring board 44 can be etched to form the outer layer circuit wiring to obtain a multilayer printed wiring board. Further, the copper foil 16 on the outer layer of the multilayer wiring board 44 can be completely removed by etching and used as it is as the multilayer printed wiring board 46. Further, the copper foil 16 on the outer layer of the multilayer wiring board 44 is completely removed by etching, and a circuit shape is formed on the exposed surface of the resin layer with a conductive paste or an outer layer circuit is directly formed by a semi-additive method or the like. It is also possible to make a multilayer printed wiring board by doing the same. Further, the copper foil 16 on the outer layer of the multilayer wiring board 44 is completely removed by etching and the first wiring layer 26 is soft-etched to obtain the first wiring layer 26 having the recessed portion, and the first wiring layer 26 is mounted. It can also be used as a pad for.

The present invention will be described more specifically by the following examples. In addition, the example shown below is an example for demonstrating advantages such as a copper foil having a predetermined treated surface being advantageous for appearance image inspection and fine circuit formation in a manufacturing process of a printed wiring board. ..

Example 1
(1) Production of Electrolytic Copper Foil for Carrier Using a sulfuric acid-acidified copper sulfate solution having the composition shown below as a copper electrolytic solution, a rotary electrode drum made of titanium having a surface roughness Ra of 0.20 μm was used as a cathode, and an anode was used as an anode. Was electrolyzed using DSA (dimension-stable anode) at a solution temperature of 45° C. and a current density of 55 A/dm ² to obtain an electrolytic copper foil A for carrier (hereinafter referred to as copper foil A) having a thickness of 12 μm.
(*For the copper foil A formed here, the side that was in contact with the cathode drum during electrolysis was the "drum surface side" and the side that was in contact with the electrolyte was " This shall be referred to as the "electrolyte surface side".)

(2) Formation of organic release layer The drum surface side of the copper foil A that has been subjected to pickling is treated with a CBTA aqueous solution containing 1000 ppm by weight of CBTA (carboxybenzotriazole), a free sulfuric acid concentration of 150 g/L and a copper concentration of 10 g/L. The liquid was immersed at a liquid temperature of 30° C. for 30 seconds and pulled up. In this way, the CBTA component was adsorbed on the drum surface side of the copper foil A, and the CBTA layer was formed as an organic release layer.

(3) Formation of ultra-thin copper foil Organic peeling of an ultra-thin copper foil with a current density of 8 A/dm ² and a thickness of 3 μm is performed on the drum surface side of the copper foil A on which the organic release layer is formed, in an acidic copper sulfate solution. Formed on a layer.

(4) Roughening treatment The ultrathin copper foil formed on the drum surface side of the electrolytic copper foil A for carrier was subjected to a roughening treatment in the following three steps.
-The first stage of the roughening treatment is a copper electrolytic solution for roughening treatment (copper concentration: 11 g/L, free sulfuric acid concentration: 220 g/L, 9-phenylacridine concentration: 0 mg/L, chlorine concentration: 0 mg/L, Electrolysis (current density: 10 A/dm ² ) was performed at a solution temperature: 25° C., and washing was performed with water.
-The second stage of the roughening treatment is a copper electrolytic solution for roughening treatment (copper concentration: 65 g/L, free sulfuric acid concentration: 150 g/L, 9-phenylacridine concentration: 0 mg/L, chlorine concentration: 0 mg/L, Electrolysis (current density: 15 A/dm ² ) was performed at a solution temperature: 45° C., and washing was performed with water.
-The third stage of the roughening treatment is a copper electrolytic solution for roughening treatment (copper concentration: 13 g/L, free sulfuric acid concentration: 50 g/L, 9-phenylacridine concentration: 140 mg/L, chlorine concentration: 35 mg/l, Electrolysis (current density: 50 A/dm ² ) at a solution temperature: 30° C.) and washing with water were performed.

(5) Rust prevention treatment Both surfaces of the electrolytic copper foil after the roughening treatment were subjected to rust prevention treatment consisting of inorganic rust prevention treatment and chromate treatment. First, as an inorganic anticorrosion treatment, a pyrophosphate bath was used with a potassium pyrophosphate concentration of 80 g/L, a zinc concentration of 0.2 g/L, a nickel concentration of 2 g/L, a liquid temperature of 40° C., and a current density of 0.5 A/dm ² . A zinc-nickel alloy anticorrosion treatment was performed. Then, as a chromate treatment, a chromate layer was further formed on the zinc-nickel alloy anticorrosion treatment. This chromate treatment was performed at a chromic acid concentration of 1 g/L, a pH of 11, a solution temperature of 25° C., and a current density of 1 A/dm ² .

(6) Silane Coupling Agent Treatment The above-mentioned rustproof copper foil was washed with water, and immediately thereafter, a silane coupling agent treatment was performed to adsorb the silane coupling agent on the rustproofing layer on the roughened surface. .. This silane coupling agent treatment uses pure water as a solvent and a solution having a concentration of 3-aminopropyltrimethoxysilane of 3 g/L. The solution is sprayed onto the black roughened surface by showering to perform adsorption treatment. went. After adsorption of the silane coupling agent, moisture was finally diffused by an electric heater to obtain a surface-treated copper foil with a carrier.

Examples 2-4 and 6
A surface-treated copper foil with a carrier was produced in the same manner as in Example 1 except that the roughening treatment in the two-step process was performed under the conditions shown in Table 1 instead of the roughening treatment in the three-step process. It was

Example 5
An organic release layer and an ultrathin copper foil having a thickness of 3 μm were formed on the electrolytic solution surface side of the copper foil A by the same procedure as in Example 1. Next, using a roughening copper electrolytic solution having the composition shown below on the surface of the ultra-thin copper foil, electrolysis was performed under the conditions of a solution temperature of 30° C. and a current density of 50 A/dm ² , and the roughening of the one-step process was performed. Was made.
<Composition of roughening copper electrolytic solution>
-Copper concentration: 15g/L
-Free sulfuric acid concentration: 55g/L
-9-Phenylacridine concentration: 140 mg/L
-Chlorine concentration: 35mg/L
-Bis(3-sulfopropyl)disulfide concentration: 100 ppm

The treated surface thus roughened in black was subjected to rust-prevention treatment and silane coupling treatment in the same procedure as in Example 1 to prepare a surface-treated copper foil with carrier.

Example 7 (comparison)
A surface-treated copper foil with a carrier was prepared in the same manner as in Example 5 except that the roughening treatment was not performed, and an ultrathin copper foil was formed on the electrolytic solution surface side of the copper foil A.

Evaluation of Surface Properties of Surface-Treated Copper Foil The following evaluation was performed on the treated surface of the surface-treated copper foil produced in Examples 1 to 7 (deposited surface of electrolytic copper foil). The evaluation results are as shown in Table 2.

<Optical properties>
(8° diffuse reflectance SCI at 635 nm)
For the treated surface of the surface-treated copper foil, 8° diffuse reflectance SCI for incident light with a wavelength of 635 nm was measured using a spectrocolorimeter (SD7000, manufactured by Nippon Denshoku Industries Co., Ltd.) according to JIS Z 8722 (2012) (color). Measurement method-Reflection and transmission object color).

<Roughened surface properties>
(Average particle diameter D and particle density ρ)
An angle of inclination of 0° with respect to the treated surface of the surface-treated copper foil is taken, and an image is taken at a magnification that 1000 to 3000 particles are included in one field of a scanning electron microscope (SEM), and the image is subjected to image processing. Then, the particle density ρ and the average particle diameter D were obtained. For image processing, image analysis software (Mac-VIEW, manufactured by Mountech Co., Ltd.) was used. The measurement was performed on 200 particles arbitrarily selected, the average diameter of the particles was defined as “average particle diameter D”, and the value obtained by dividing the number of particles (that is, 200 particles) by the visual field area was defined as “particle density ρ”.

(Glossiness Gs (85°))
Using a gloss meter (PG-1M, manufactured by Nippon Denshoku Industries Co., Ltd.) for the treated surface of the surface-treated copper foil, an angle of 85° according to JIS Z 8741 (1997) (specular gloss-measurement method). The glossiness of was measured.

Using the surface-treated copper foils manufactured in Evaluation Examples 1 to 7 regarding the manufacturability of the coreless support wiring layer, lamination on the coreless support, photoresist processing, pattern plating, photoresist peeling, etc. were performed in order, and the predetermined A laminated body in which the first wiring layer was formed on the surface-treated copper foil with the wiring pattern of No. 3 was produced. Specifically, it carried out as follows.

(1) Lamination to coreless laminate This coreless support was made by stacking four prepregs (GHPL-830NS, manufactured by Mitsubishi Gas Chemical Co., Inc., GHPL-830NS, thickness 45 μm) made of glass cloth-containing bismaleimide triazine resin to form a coreless support. The copper foil with a carrier produced in Examples 1 to 7 was press-laminated on both sides with the ultrathin copper foil on the outside to produce a coreless laminate. This press lamination was performed at a press temperature of 220° C., a press time of 90 minutes and a pressure of 40 MPa.

(2) Preparation of fine wiring pattern sample For evaluation of photoresist adhesion, a sample in a state where a columnar pattern of a photoresist having a diameter of 7 μm (pitch 14 μm), which has been subjected to the manufacturing steps up to the developing step described above, is prepared did. In addition, a wiring pattern having a line/space (L/S) of 8 μm/8 μm and 7 μm/7 μm, which has been subjected to the manufacturing steps up to the photoresist stripping step described above, for appearance image inspection characteristic evaluation and wiring pattern formability evaluation. A sample including was prepared. The specific procedures for photoresist coating, electrolytic copper plating, and photoresist stripping were as follows.

(Photoresist application)
A negative photoresist (RY3625, manufactured by Hitachi Chemical Co., Ltd.) was laminated on the ultrathin copper foil layer, and exposure (20 mJ/cm ² ) and development (8% sodium carbonate aqueous solution, 30° C. shower system) were performed.

(Electrolytic copper plating)
On the ultra-thin copper foil layer patterned by the development treatment, electrolytic copper plating was formed with a copper sulfate plating solution to a thickness of 10 μm.

(Removal of photoresist)
A photoresist stripping solution (R-100S manufactured by Mitsubishi Gas Chemical Co., Inc.) was used to strip the photoresist at 60° C. for 5 minutes.

The photoresist adhesion and photoresist resolution in this circuit formation and the appearance image inspection characteristics of the finally obtained laminate with the first wiring layer were evaluated as follows. The results are shown in Table 2.

<Appearance image inspection characteristics>
(Distance between peaks in 256 layers)
An optical automatic visual inspection (AOI) device (manufactured by Dainippon Screen Mfg. Co., product name: PI9500) equipped with a 635 nm red LED as a light source was prepared. The surface of the laminated body provided with the wiring pattern is scanned to create a luminance histogram as shown in FIG. 6, and as shown in FIG. 6, the space (gap portion) peak P _S on the 256-layer axis is on the higher layer side. Of the peak P _L of the line (wiring portion) to the rising position on the lower layer side (that is, the peak-to-peak distance D of 256 layers) was measured. The values obtained were as shown in Table 2.

(Visibility)
The visibility of the wiring pattern was evaluated by the following procedure. The surface of the laminated body provided with the wiring pattern was scanned to create a luminance histogram as shown in FIG. 6, and a threshold value was set so that the space and the wiring could be identified. The value of this threshold value is between the peaks P _S derived from the space (gap) of the luminance histogram and the peak P _L derived from the line (wiring part) between the respective peak ends (the end of the peak corresponding to the gap and the wiring). (Between the start points of the peaks corresponding to the parts). The circuit surface on which the wiring pattern was formed was scanned based on this threshold to identify lines and spaces, pattern matching was performed with the design data, and the rating was evaluated according to the following four-stage criteria.
-AA: A line/space image (hereinafter, L/S image) was obtained very accurately as designed as shown in FIG. 4-A: A L/S image was obtained almost accurately,
-B: an L/S image obtained to an acceptable level,
-C: It was difficult to identify lines and spaces as shown in FIG.

For reference, the image (evaluation A) obtained in Example 2 is shown in FIG.

The evaluation results are shown in Table 2. From the comparison between the 256-layer peak-to-peak distance and the visibility evaluation result shown in Table 2, the longer the 256-tier peak-to-peak distance, the better the visibility of the wiring pattern, and the accuracy of the position and shape of the wiring pattern. It can be seen that it is more suitable for visual image inspection. Further, in consideration of the relationship with the peak-to-peak distance between 256 layers shown in Table 2, it can be said that the peak-to-peak distance between 256 layers is preferably 85 or more, more preferably 100 or more, and further preferably 110 or more.

<Circuit formation characteristics>
(Evaluation of wiring pattern formability)
The wiring pattern formability was evaluated as follows. For wiring patterns including 20 lines (10 mm in length) formed by various lines/spaces (L/S), wiring patterns with line/space (L/S) of 8 μm/8 μm and 7 μm/7 μm Each of these was evaluated in the following three grades, taking into consideration whether or not there is no development residue and the electrolytic copper plating is formed as a pattern.
-A: There is no defective electroplating part-B: There are two or less defective electroplating parts in 20 lines-C: There are three or more defective electroplating parts in 20 lines

Then, the overall evaluation based on the above-mentioned four types of L/S evaluation results was rated and evaluated according to the following four-stage criteria.
-AA: Very good-A: Good-B: Acceptable-C: Poor

(Photoresist adhesion/peelability)
The evaluation of the adhesiveness/peelability of the photoresist is performed by measuring the frequency of occurrence of resist adhesion defective portions (resist skips) due to development or the occurrence status of inter-pattern resist residue defects at 200 locations of the above-mentioned photoresist columnar pattern. The evaluation was performed based on a rating of 3 levels.
-A: Less than 10 places-B: 10 or more and less than 50 defective places-C: More than 50 defective places-D: A resist residue is generated between the patterns, and an independent columnar pattern is formed. Not formed

Claims (16)

A method of manufacturing a printed wiring board, comprising:
A step of preparing a copper foil having a treated surface having an 8° diffuse reflectance SCI of 41% or less for incident light;
Forming a photoresist pattern on the treated surface of the copper foil;
A step of performing electrolytic copper plating on the copper foil on which the photoresist pattern is formed,
A step of peeling the photoresist pattern to form a wiring pattern,
A step of performing an appearance image inspection of the wiring pattern on the copper foil on which the wiring pattern is formed,
Including the method. The method according to claim 1, wherein the incident light has a wavelength within a peak region of a light source wavelength used for the appearance image inspection. The method according to claim 1, wherein the appearance image inspection is performed using a light source having a peak region at a wavelength of 635 nm. The method according to claim 1, wherein the incident light has a wavelength of 635 nm. The method according to claim 1, wherein the 8° diffuse reflectance SCI is 20% or less. The method according to any one of claims 1 to 5, wherein the treated surface has a roughened surface formed of unevenness formed of a plurality of roughened particles . The average particle diameter D by image analysis of the roughened particles is 0.04 to 0.53 μm, and the particle density ρ by image analysis of the roughened particles is 4 to 200 particles/μm ^2. the method of. The method according to any one of claims 1 to 7, wherein the specular gloss Gs (85°) of the treated surface is 20 to 100. The method according to claim 1, wherein the copper foil has a thickness of 0.05 to 7 μm. The method according to claim 1, wherein the visual appearance inspection is performed by an optical automatic visual inspection (AOI). The copper foil is provided in the form of a carrier-attached copper foil, and the carrier-attached copper foil comprises a carrier layer, a release layer, and the copper foil in this order. Method. Wherein prior to forming the photoresist pattern, further comprising a copper foil forming a laminate by laminating on one side or both sides of the coreless substrate, the method according to any one of claims 1-10. The method according to claim 11, further comprising a step of laminating the copper foil with a carrier on one side or both sides of a coreless support to form a laminated body, prior to the formation of the photoresist pattern. Further comprising a method according to any one of claims 1 to 13, steps of manufacturing a build-up wiring layer with laminate to form a build-up wiring layer on the copper foil after the appearance image inspection. When the copper foil is provided in the form of a copper foil with a carrier, and the copper foil with a carrier comprises a carrier layer, a peeling layer and the copper foil in this order, the build-up wiring layer-carrying laminate is the peeling layer. The method according to claim 14 , further comprising the step of separating to obtain a multilayer wiring board including the build-up wiring layer. The method according to claim 15 , further comprising a step of processing the copper foil or the multilayer wiring board to obtain a printed wiring board.