KR20170092519A - Method of manufacturing printed wiring board - Google Patents

Abstract

A copper foil having a processing surface having an 8-degree diffuse reflectance SCI of 41% or less with respect to incident light was prepared, a photoresist pattern was formed on the surface of the copper foil, electroplated copper was applied to the copper foil, And a step of inspecting the external appearance image of the wiring pattern with respect to the copper foil. According to the present invention, in the production of a printed wiring board, before formation of a build-up wiring layer, the appearance inspection of the wiring pattern formed on the copper foil can be performed with high accuracy, The present invention can provide a method for manufacturing a printed wiring board which can improve the reliability of the printed wiring board.

Description

METHOD OF MANUFACTURING PRINTED WIRING BOARD [0002]

The present invention relates to a method of manufacturing a printed wiring board.

In recent years, in order to increase the mounting density of a printed wiring board and make it compact, multilayered printed wiring boards have become widespread. Such a multilayer printed wiring board is used for the purpose of weight reduction and miniaturization in most of portable electronic apparatuses. In addition, the multilayer printed wiring board is required to further reduce the thickness of the interlayer insulating layer and to further reduce the weight of the wiring board.

As a technique for satisfying such a demand, there has been proposed a method of manufacturing a printed wiring board in which a wiring layer is formed directly on an ultra-thin metal layer and then multilayered. As one of such methods, a manufacturing method using a coreless build-up method is employed. An example of a method for producing a printed wiring board by a coreless build-up method using a copper foil with a carrier is shown in Figs. 1 and 2, the copper foil 10 with a carrier having the carrier layer 12, the release layer 14 and the copper foil 16 in this order is bonded to the coreless support 18 (e.g., ). Next, the photoresist pattern 20 is formed on the copper foil 16, and the wiring pattern 24 is formed through the formation of the pattern plating (electroplating) 22 and the peeling of the photoresist pattern 20. Then, pretreatment for lamination such as roughening treatment is performed on the pattern plating to form the first wiring layer 26. Next, as shown in Fig. 2, the insulating layer 28 and the carrier-adhered copper foil 30 (carrier layer 32, separation layer 34 and copper foil 36) are provided to form the buildup layer 42 The carrier layer 32 is peeled off and the copper foil 36 and the insulating layer 28 just under the copper foil 36 are laser-processed by a carbon dioxide gas laser or the like. Subsequently, the second wiring layer 38 is formed by photolithography processing, electroless copper plating, electrolytic copper plating, photoresist peeling, flash etching or the like to form the second wiring layer 38. This patterning is repeatedly performed as needed to form the nth wiring layer 40 ) (n is an integer of 2 or more). Then, the coreless support 18 is peeled together with the carrier layer 12, and the copper foils 16 and 36 exposed between the wiring patterns are removed by flash etching to obtain a predetermined wiring pattern.

In addition, for the printed wiring board on which the wiring pattern is formed, the appearance image inspection for checking the accuracy of the position and shape of the wiring pattern is generally performed. This appearance image inspection is performed by irradiating a predetermined light from a light source using an optical automatic appearance inspection (AOI) apparatus to acquire a binarized image of a wiring pattern, and to try pattern matching between the binarized image and the design data image, / RTI > < RTI ID = 0.0 > match / mismatch < / RTI > 2, after the copper foils 16 and 36 exposed between the wiring patterns on the surface of the insulating layer 28 are removed by flash etching, the insulating layer 28 is removed from the wiring pattern Is performed on the surface exposed to the liver. For example, Japanese Unexamined Patent Application Publication No. 2014-116533 discloses a method for manufacturing a coreless wiring board using a peelable metal foil. However, a predetermined inspection such as a visual inspection is performed by a wiring- And the copper foil attached to the wiring layered portion is removed to expose the dielectric layer (insulating resin layer) (final step).

Japanese Patent Application Laid-Open No. 2014-116533

However, as described above, the method of inspecting the wiring pattern portion of the first wiring layer 26 formed on the surface of the insulating layer 28 after the production of the printed wiring board (or the post-processing step of the manufacturing process) Even if there is a chip having a defective portion in the wiring pattern of the first wiring layer 26 immediately after the first wiring layer 26 is formed on the surface of the copper foil 16 of the core-less substrate, defective products can not be discriminated at this stage do. Therefore, even if the chip yield (yield rate) of the first wiring layer 26 is significantly worse and it is economically disadvantageous to proceed to the subsequent process, the process proceeds to the build-up lamination process . In this case, since the inspection is performed after the final process has been completed, there is a risk that a chip containing a large amount of defective products stays in the middle of the process. In addition, the above-described method needs to perform the appearance inspection process of the buildup layer over all the chips regardless of whether or not there is a defective portion in the wiring pattern of the first wiring layer 26, so that the tact time of the inspection process is significantly delayed I had a problem to make. Therefore, if the appearance image inspection of the wiring pattern is performed in the stage immediately after the wiring pattern of the first wiring layer 26 is formed on the surface of the copper foil 16 of the core-less support, It is possible to skip the inspection process after the subsequent build-up lamination process and simplify the inspection process. However, since the appearance image inspection after the production of the printed wiring board can perform a clear appearance image inspection using the hue contrast of the conventional insulating layer (resin layer) and the wiring layer (copper layer), that is, the hue contrast caused by the dissimilar material, (Accuracy) is high. On the other hand, when the external appearance inspection is performed in the early stage immediately after the formation of the first wiring layer, the wiring pattern must be detected between the same kind of materials such as the copper foil and the wiring layer (copper layer), and the lack of tone contrast As a result, there has been a problem that the degree of inspection is greatly reduced.

The inventors of the present invention have found that by using a copper foil having a treated surface with an 8-degree diffuse reflectance SCI of not more than 41% with respect to incident light in the production of a printed wiring board, It was found that the appearance inspection of the wiring pattern formed on the copper foil can be performed with high precision while obtaining a binary image with high definition by high contrast. Further, it was also found that the productivity of the printed wiring board can be significantly improved by eliminating rejected products in the appearance image inspection in the early stage as described above.

SUMMARY OF THE INVENTION It is therefore an object of the present invention to provide a method for manufacturing a printed wiring board which is characterized in that after the photoresist stripping and before the formation of the build-up wiring layer, the appearance inspection of the wiring pattern formed on the copper foil is carried out at high tone contrast And a method for manufacturing a printed wiring board capable of significantly improving the productivity of a printed wiring board.

According to one aspect of the present invention, there is provided a method of manufacturing a printed wiring board,

A step of preparing a copper foil having a processing surface having an 8 占 diffuse reflectance SCI of not more than 41% with respect to incident light,

Forming a photoresist pattern on the treated surface of the copper foil;

Performing electroplating on the copper foil on which the photoresist pattern is formed;

Forming a wiring pattern by peeling the photoresist pattern;

A step of inspecting the exterior appearance image of the wiring pattern with respect to the copper foil on which the wiring pattern is formed

Is provided.

BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a view showing a first half of a process for producing a printed wiring board using a coreless build-up method; Fig.
Fig. 2 is a diagram showing a second step subsequent to the step shown in Fig. 1 in an example of a method for producing a printed wiring board using the coreless build-up method; Fig.
3 is a conceptual diagram showing a measurement system used for external image inspection in association with a cross-sectional configuration of a wiring pattern.
Fig. 4 is a diagram showing an example of the appearance image result in the case where the wiring pattern and the space are distinguished from each other, in association with the sectional configuration of the wiring pattern. Fig.
5 is an example of a design data image for pattern matching in the appearance image inspection.
6 is a diagram showing an example of a luminance histogram obtained at the initial setting of the appearance image inspection, in which the abscissa represents the luminance (for example, 256 hierarchical axes) and the ordinate represents the integrated amount.
Fig. 7 is a view showing an example of a result of an appearance image in a case where it is difficult to identify a wiring pattern and a space; Fig.

The present invention relates to a method of manufacturing a printed wiring board. In the production of the printed wiring board according to the present invention, a copper foil having a predetermined treatment surface on one side is prepared, and a photoresist pattern is formed on the treated surface, electroplating is performed, and a photoresist pattern is peeled off To form a wiring pattern, and to perform a visual inspection of the wiring pattern on the copper foil on which the wiring pattern is formed. As the copper foil used in this series of processes, a copper foil having a processing surface having an 8-degree diffuse reflectance SCI of 41% or less with respect to incident light is used. Thus, in the early stage after the photoresist stripping and before the formation of the build-up wiring layer, the appearance inspection of the wiring pattern formed on the copper foil can be performed with high accuracy while obtaining a fixed three- have.

Thus, in the present invention, the 8-degree diffuse reflectance SCI is employed as the evaluation index of the copper foil. This is based on the fact that 8 °, in which the visibility of diffuse reflection is high with respect to the polished copper surface, is proven effective for the appearance inspection of the glossy copper surface which is the wiring pattern. It has also been found that a light source using a red LED having a high reflection efficiency (high visibility) with respect to a glossy copper surface, particularly a light source having a peak region at 635 nm, is particularly effective for this appearance image inspection. That is, a light source having a peak region at this wavelength is easy to recognize, for example, an image showing defects, shorts, and the like of a fine wiring pattern of 3 탆 or less. Taking advantage of these characteristics, in order to obtain a high contrast in image processing with respect to the wiring pattern in the appearance image inspection, it is required that the surface of the copper foil has a small reflection on the red semiconductor light in contrast to the first wiring layer constituting the wiring pattern do. From this point of view, the copper foil having an 8 ° diffuse reflectance SCI of 41% or less with respect to incident light having a wavelength of 635 nm is very advantageous. This is described below as an example of the appearance image inspection. 3, a red semiconductor light (for example, light having a peak area at a wavelength of 635 nm) is irradiated from the ring-shaped light source 50 to the substrate on which the wiring pattern 24 is formed And the reflected light from the first wiring layer 26 and the reflected light from the copper foil 16 are received by the light receiving section 52. The obtained luminance data is divided into a gap portion and a wiring portion (line) in accordance with a preset threshold value. For example, a binary image as shown in Fig. 4 is formed, and the position and shape of the wiring pattern 24 are determined by pattern matching based on the binarized image and the image derived from the design data as shown in Fig. And evaluating the accuracy. The threshold value used at this time is set such that the initial value is set such that the surface of the substrate on which the wiring pattern 24 is formed (the surface on which the first wiring layer 26 is directly formed on the copper foil 16) (The horizontal axis represents the luminance (for example, the 256 layer axis) and the vertical axis represents the accumulation amount), and the luminance histogram space (the interval (Between the end of the peak corresponding to the gap portion and the beginning point of the peak corresponding to the wiring portion) between the peaks P _S originating from the line (wiring portion) and the peak P _L originating from the line (wiring portion) Can be determined as a median value of. Therefore, as shown in Fig. 6, the larger the distance D between the peaks between the gap portion (space) and the wiring portion (line) in the luminance histogram, the higher the contrast in binarized images due to the high contrast in the image inspection Resulting in improved visibility. The diffuse reflectance SCI of 8 DEG for incident light (preferably incident light with a wavelength of 635 nm) having a wavelength in the peak region of the light source wavelength used for inspection of incident light, preferably an image of the appearance, on the treated surface of the copper foil 16 is If it is 41% or less, the peak-to-peak distance D in the luminance histogram described above remarkably increases. As a result, the appearance image inspection can be performed with high accuracy while obtaining a high-definition binarized image with high contrast.

Thus, according to the method of the present invention, in the early stage after the photoresist peeling and before the formation of the build-up wiring layer, the appearance inspection of the wiring pattern formed on the copper foil is carried out, and the high- You can do it to a high degree while getting. As described above, conventionally, the appearance inspection of the printed wiring board on which the wiring pattern is formed has been generally performed. However, when the appearance inspection is performed after the production of the printed wiring board (or the post-process step of the manufacturing process), for example, Even if there is a chip having a defective portion in the wiring pattern of the first wiring layer 26 immediately after the first wiring layer 26 is formed on the surface of the copper foil 16 of the coreless support, , It is necessary to perform the appearance inspection process of the buildup layer over all the chips, thereby delaying the tact time of the inspection process in a pointless manner. Therefore, if it is possible to conduct an external image inspection at an early stage, it is appropriate. However, since the appearance image inspection after the production of the printed wiring board can perform a clear appearance image inspection using the contrast between the insulating layer (resin layer) and the wiring layer (copper layer), that is, the contrast caused by the dissimilar material, There is an advantage. On the other hand, when the external appearance inspection is performed at an early stage, the wiring pattern must be detected between the same kind of materials such as the copper foil and the wiring layer (copper layer). Due to the lack of contrast between the two materials, There is a problem that only the binarized image whose wiring pattern as shown in Fig. 7 is not known is obtained, and the degree of inspection is greatly reduced. In this respect, in the present invention, by using the copper foil having the specific diffuse reflectance SCI, it is possible to effectively avoid such a problem because a high-definition binary image is obtained with high contrast. As a result, since the rejected product in the appearance image inspection can be excluded in the early stage as described above, the productivity of the printed wiring board can be significantly improved.

Hereinafter, an aspect of the method of the present invention will be described with reference to the flow charts shown in Figs. 1 and 2. Fig. 1 and 2 are depicted so as to form the build-up wiring layer 42 by providing the carrier-coated copper foil 10 on one side of the core-less support 18 for the sake of simplicity of explanation, but the core- It is preferable to form the build-up wiring layer 42 on both sides of the copper foil 10 with the carrier.

(a) Preparation of copper foil

As described above, the copper foil 16 has a surface with an 8-degree diffuse reflectance SCI of 41% or less with respect to incident light. Such a treatment surface is provided on one side of the copper foil 16 (in the case of the carrier-bonded copper foil 10 shown in Fig. 1) on the opposite side of the release layer 14 (i.e., the outermost surface of the copper foil 10 with carrier) Typically, it may be provided on both sides. The incident light used for the evaluation of the 8 占 diffuse reflectance SCI preferably has a wavelength within the peak region of the light source wavelength used for the appearance image inspection. In addition, as described above, the appearance image inspection is preferably performed using a light source having a peak region at a wavelength of 635 nm. Therefore, the wavelength of the incident light used for the evaluation of the 8 DEG diffuse reflectance SCI is preferably 635 nm. The diffuse reflectance SCI of 8 DEG to the incident light (incident light having a wavelength of 635 nm, for example) is 41% or less, preferably 20% or less, more preferably 15% or less. The 8-degree diffuse reflectance SCI for the incident light can be measured in accordance with JIS Z8722 (2012) using a commercially available spectrocolorimeter (for example, SD7000 manufactured by Nihon Denshoku Kogyo K.K.). It is preferable that the processing surface with a low 8-degree diffuse reflectance SCI is an incident surface (for example, incident light with a wavelength of 635 nm) that has less diffuse reflection component. In other words, a processing surface having a low 8 ° diffuse reflectance SCI can be preferably realized by having a surface with a small flat component region that diffuses and reflects incident light (for example, incident light having a wavelength of 635 nm). Further, in order to improve the degree of appearance in the appearance image inspection, the surface of the copper foil is preferably an alloy of copper or copper and at least one kind selected from zinc, tin, cobalt, nickel, chromium and molybdenum, , A copper surface having a roughened surface is preferable from the viewpoint of keeping the diffuse reflectance low.

The copper foil 16 may have a known constitution adopted for the copper foil with a carrier other than those having the 8-degree diffuse reflectance SCI, and is not particularly limited. For example, the copper foil 16 may be formed by a wet film forming method such as an electroless plating method and an electrolytic plating method, a dry film forming method such as sputtering and chemical vapor deposition, or a combination thereof, but the above- It is preferable that it is formed by electrolytic plating. The preferable thickness of the copper foil 16 is 0.05 탆 to 7 탆, more preferably 0.075 탆 to 5 탆, and still more preferably 0.09 탆 to 4 탆.

More preferably, the copper foil 16 has a roughened surface in the form of a particle (i.e., a roughened surface composed of irregularities composed of a plurality of particles or a plurality of particles). By doing so, the 8-diffuse reflectance SCI for the incident light (preferably incident light having a wavelength of 635 nm) can be made to be 41% or less, and the adhesion with the photoresist pattern 20 can be improved. The coarse particles preferably have an average particle diameter D determined by image analysis of 0.04 to 0.53 mu m, more preferably 0.08 to 0.13 mu m, and still more preferably 0.09 to 0.12 mu m. When the resistivity falls within the above-mentioned range, it is possible to obtain a good roughness on the roughened surface to secure good adhesion with the photoresist, and to realize an excellent constitution of the unnecessary region of the photoresist upon developing the photoresist. As a result, It is possible to effectively prevent the line defects of the pattern plating 22, which may be caused by difficulty in plating due to the photoresist which could not be obtained. Therefore, if it is within the above-mentioned range, it can be said that the photoresist developability and the pattern plating property are excellent, and therefore, it is suitable for fine formation of the wiring pattern 24. [ The average particle diameter D obtained by image analysis of the coarsened grains was measured by taking a picture at a magnification that a predetermined number of particles (for example, 1,000 to 3,000) were contained in a visual field of a scanning electron microscope (SEM) It is preferable to measure by carrying out image processing with commercially available image analysis software. For example, 200 particles selected arbitrarily may be used, and the average diameter of the particles may be employed as the average particle diameter D.

It is also preferable that the coarsened particles have a particle density p of 4 to ²⁰⁰ particles / m ² by image analysis, more preferably 40 to 170 particles / m ² , 70 to 100 m ² / 탆 / ² . When the coarse grains on the surface of the copper foil are dense and dense, development residue of the photoresist tends to occur. However, such development residue is hardly generated when the coarse grains are in the above-mentioned range. Therefore, Do. Therefore, it can be said that it is suitable for fine formation of the wiring pattern 24 if it is within the above-mentioned registered range. The particle density p obtained by image analysis of harmonic particles can be calculated by taking an image at a magnification that a predetermined number of particles (for example, 1,000 to 3,000) are contained in a field of view of a scanning electron microscope (SEM) For example, by dividing the number of particles (for example, 200) by the visual field in the field of view in which 200 particles are included, is referred to as particle density ρ.

The mirror surface gloss Gs (85 deg.) May be mentioned as another index for specifying the roughness characteristic suitable for fine formation of the wiring pattern 24 as described above. In this case, it is preferable that the mirror surface gloss Gs (85 deg.) Of the treated surface is 20 to 100, more preferably 30 to 90, and still more preferably 40 to 80. [ In addition, the specular gloss Gs (85 deg.) Obtained by image analysis of harmonic grains can be measured using a commercially available glossmeter in accordance with JIS Z 8741-1997 (mirror gloss-measuring method).

The surface of the copper foil may be subjected to a rust treatment such as a nickel-zinc / chromate treatment or a coupling treatment with a silane coupling agent after forming the above-mentioned coarse particles. By these surface treatments, it is possible to improve the chemical stability of the surface of the copper foil and to improve the adhesion at the time of laminating the insulating layer.

The copper foil 16 is preferably provided in the form of a copper foil 10 with a carrier. In this case, the carrier-coated copper foil 10 preferably comprises the carrier layer 12, the release layer 14, and the copper foil 16 in this order. In this case, the copper foil 16 may be in the form of an ultra-thin copper foil.

The carrier layer 12 is a layer (typically, foil) for supporting the copper foil 16 to improve its handling property. Examples of the carrier layer include an aluminum foil, a copper foil, a stainless steel (SUS) foil, a resin film, and a resin film obtained by metal coating the surface. The copper foil may be any of rolled copper foil and electrolytic copper foil. The thickness of the carrier layer is typically 250 占 퐉 or less, preferably 12 占 퐉 to 200 占 퐉.

The release layer 14 has a function of suppressing the peeling strength of the carrier foil to thereby ensure the stability of the strength of the carrier foil and suppress the mutual diffusion that may occur between the carrier foil and the copper foil at the time of press molding at a high temperature . The release layer is generally formed on one side of the carrier foil, but it may be formed on both sides. The release layer may be any of the organic release layer and the inorganic release layer. Examples of the organic component used in the organic release layer include a nitrogen-containing organic compound, a sulfur-containing organic compound, and a carboxylic acid. Examples of the nitrogen-containing organic compound include a triazole compound and an imidazole compound, and among them, a triazole compound is preferable in view of easy stability of peelability. Examples of triazole compounds include 1,2,3-benzotriazole, carboxybenzotriazole, N ', N'-bis (benzotriazolylmethyl) urea, 1H-1,2,4- -1H-1,2,4-triazole, and the like. Examples of the sulfur-containing organic compound include mercaptobenzothiazole, thiocyanuric acid, 2-benzimidazole thiol and the like. Examples of the carboxylic acid include monocarboxylic acid and dicarboxylic acid. On the other hand, examples of the inorganic component used in the inorganic release layer include Ni, Mo, Co, Cr, Fe, Ti, W, P, Zn and a chromate treatment film. The release layer may be formed by bringing the release layer component-containing solution into contact with at least one surface of the carrier foil and causing the release layer component to be adsorbed in the solution on the surface of the carrier foil. When the carrier foil is brought into contact with the solution containing the release layer component, the contact may be carried out by immersion in the release layer component-containing solution, spraying of the solution containing the release layer component, dropping of the solution containing the release layer component, In addition, a method of forming a film of the release layer component by a vapor deposition method such as vapor deposition or sputtering can be employed. The peeling layer component may be fixed to the surface of the carrier foil by drying the solution containing the peeling layer component, electrodeposition of the peeling layer component in the solution containing the releasing layer component, and the like. The thickness of the release layer is typically 1 nm to 1 占 퐉, preferably 5 nm to 500 nm. The peel strength between the release layer 14 and the carrier foil is preferably 7 gf / cm to 50 gf / cm, more preferably 10 gf / cm to 40 gf / cm, and even more preferably 15 gf / cm to 30 gf / cm to be.

Optionally, another functional layer may be provided between the release layer 14 and the carrier layer 12 and / or the copper foil 16. An example of such another functional layer is an auxiliary metal layer. The auxiliary metal layer is preferably made of nickel and / or cobalt. By forming such an auxiliary metal layer on the surface side of the carrier layer 12 and / or on the surface side of the copper foil 16, it is possible to obtain an effect that can occur between the carrier layer 12 and the copper foil 16 during hot- So that the stability of the peeling strength of the carrier layer can be suppressed. The thickness of the auxiliary metal layer is preferably 0.001 to 3 mu m.

(b) Formation of a laminate

The laminate may be formed by laminating the copper foil 16 or the copper foil with a carrier 10 on one side or both sides of the coreless support 18 prior to the formation of the photoresist pattern as the step (b). This lamination may be carried out according to known conditions and methods employed in the lamination of the copper foil and the prepreg in the usual printed wiring board production process. The coreless support 18 typically comprises a resin, preferably an insulating resin. The coreless support 18 is preferably a prepreg and / or a resin sheet, more preferably a prepreg. The term "prepreg" is a general term for a composite material obtained by impregnating or laminating a synthetic resin on a substrate such as a synthetic resin plate, a glass plate, a glass woven fabric, a glass nonwoven fabric, or paper. Preferable examples of the insulating resin impregnated in the prepreg include an epoxy resin, a cyanate resin, a bismaleimide triazine resin (BT resin), a polyphenylene ether resin, and a phenol resin. Examples of the insulating resin constituting the resin sheet include insulating resins such as epoxy resin, polyimide resin and polyester resin. In addition, the coreless support 18 may contain filler particles composed of various inorganic particles such as silica and alumina from the viewpoint of lowering the coefficient of thermal expansion and increasing the rigidity. The thickness of the coreless support 18 is not particularly limited, but is preferably 3 to 1000 占 퐉, more preferably 5 to 400 占 퐉, and still more preferably 10 to 200 占 퐉.

(c) forming a photoresist pattern

In this step (c), the photoresist pattern 20 is formed on the surface of the copper foil 16. The photoresist pattern 20 may be formed by any of a negative resist and a positive resist, and the photoresist may be any of a film type and a liquid type. The developing solution may be a developer such as sodium carbonate, sodium hydroxide, or an amine-based aqueous solution, and may be performed according to various methods and conditions generally used in the production of a printed wiring board, and is not particularly limited.

(d) Electrolytic copper plating

In this step (d), copper plating 22 is applied to the copper foil 16 on which the photoresist pattern 20 is formed. The formation of the electroplating plating 22 can be carried out according to various patterning methods and conditions generally used in the production of a printed wiring board such as a copper sulfate plating solution or a copper pyrophosphate plating solution, and is not particularly limited.

(e) peeling of the photoresist pattern

In this step (e), the photoresist pattern 20 is peeled off to form the wiring pattern 24. [ The photoresist pattern 20 may be peeled off by using an aqueous solution of sodium hydroxide, an amine-based solution or an aqueous solution thereof, and may be performed according to various peeling methods and conditions generally used in the production of printed wiring boards, and is not particularly limited. In this way, the wiring pattern (24) in which wiring portions (lines) made of the first wiring layer (26) are arranged on the surface of the copper foil (16) with a gap (space) therebetween is directly formed. For example, in order to miniaturize a circuit, a line / space (L / S) of 13 mu m or less / 13 mu m or less (for example, 12 mu m / 12 mu m, 10 mu m / 10 mu m, 5 mu m / / 2 [micro] m), and it is also possible to conduct a visual inspection of the microcircuits to a high degree in the next step (f) according to the method of the present invention.

(f) Appearance image inspection

In this step (f), the external appearance image inspection of the wiring pattern 24 is performed on the copper foil 16 on which the wiring pattern 24 is formed. By checking the accuracy of the position and the shape of the wiring pattern by this appearance image inspection, it is possible to select the laminate having the wiring pattern 24 having the desired accuracy. It is preferable that the appearance image inspection is performed by an optical automatic appearance inspection (AOI). The appearance image inspection is the same as described above with reference to Fig. 3 and others, but it is preferable that the appearance image inspection is performed using a light source having a peak area at a wavelength of 635 nm. This is because there is an advantage in that it is easy to recognize an image showing defects, shorts, and the like of the wiring pattern. Particularly, the surface of the copper plating, which is the first wiring layer 26 constituting the wiring pattern 24 formed directly on the copper foil 16, has a characteristic that it easily reflects red semiconductor light. For this reason, in order to obtain high contrast in the appearance image inspection, the surface of the copper foil 16 is required to have little reflection on the red semiconductor light in contrast to the first wiring layer 26. [ In this respect, the copper foil 16 having an 8 占 diffuse reflectance SCI of 41% or less with respect to incident light (preferably incident light with a wavelength of 635 nm) is as described above.

3, the red semiconductor light (for example, light having a wavelength of 635 nm) is irradiated from the ring-shaped light source 50 to the substrate on which the wiring pattern 24 is formed, The reflected light from the one wiring layer 26 and the reflected light from the copper foil 16 are received by the light receiving section 52 and the obtained luminance data is discriminated as a gap portion and a wiring portion , And the accuracy of the position and shape of the wiring pattern 24 is evaluated by pattern matching based on the binarized image and the image derived from the design data as shown in Fig. 5 Lt; / RTI > The threshold value used at this time is set so that the initial value is set to the entire surface of the substrate surface on which the wiring pattern 24 is formed (the surface on which the first wiring layer 26 is directly formed on the copper foil 16) (The horizontal axis represents the luminance (for example, 256 hierarchy axes) and the vertical axis represents the accumulation amount), and the space (gap portion) of the luminance histogram is calculated by integrating the obtained luminance data, the median of the resulting peak P _S and the line (sub-line) in between the peak P _L pedigree (between the beginning of the peak corresponding to the termination and interconnection portion of the peak corresponding to the gap portion), respective peaks terminal liver . As a result of such appearance image inspection, the laminate having the wiring pattern 24 having the desired accuracy, except for the laminate which does not satisfy the expected standard, is selected and appropriately sent to a subsequent optional process .

(g) Formation of build-up wiring layer

It is preferable to form the build-up wiring layer 42 on the copper foil 16 after the appearance image inspection as the step (g), if desired. The insulating layer 28 and the second wiring layer 38 may be formed in order to become the build-up wiring layer 42 in addition to the first wiring layer 26 already formed on the copper foil 16, for example. The method for forming the build-up layer after the second wiring layer 34 is not particularly limited and may be selected from the group consisting of a subtractive method, an MSAP (Modified Semi-additive process) method, a SAP (semi-additive) Etc. can be used. For example, when the metal foil typified by the resin layer and the copper foil is pressed together at the same time, the panel plating layer and the metal foil are etched in combination with the formation of the via hole and the formation of the interlayer conduction means such as panel plating, Can be formed. When only the resin layer is applied to the surface of the copper foil 16 by pressing or laminating, a wiring pattern may be formed on the surface of the copper foil 16 by the semi-additive method.

The above process is repeated as necessary to obtain a laminate with built-up wiring layers. In this step, a build-up wiring layer in which a resin layer and wiring layers including wiring patterns are alternately stacked is formed, and a build-up wiring layer stacked body formed up to the n-th wiring layer 40 (n is an integer of 2 or more) . This process may be repeated until a desired number of build-up wiring layers are formed. In this step, solder resists, bumps for mounting, such as fillers, or the like may be formed on the outer layer surface as needed. In addition, the outermost layer surface of the build-up wiring layer may be formed in the later step (i) of processing the multilayer wiring board.

(h) Separation of laminate with build-up wiring layer

It is preferable to obtain the multilayer wiring board 44 including the build-up wiring layer 42 by separating the build-up wiring layer stacked body from the peeling layer 14 as the step (h). This separation can be performed by peeling off the copper foil 16 and / or the carrier layer 12. [

(i) Processing of a multilayer wiring board

It is preferable to obtain the printed wiring board 46 by processing the multilayer wiring board 44 as the step (i). In this step, a desired multilayer printed wiring board is formed by using the multilayer wiring board 44 obtained by the separation step. The multilayer printed circuit board 46 may be processed from the multilayered circuit board 44 by any known method. For example, the copper foil 16 on the outer layer of the multilayer wiring board 44 is etched to form an outer layer circuit wiring, thereby obtaining a multilayer printed wiring board. The copper foil 16 on the outer layer of the multilayer wiring board 44 may be completely removed by etching and used as the multilayer printed wiring board 46 in the state as it is. Further, the copper foil 16 on the outer layer of the multilayer wiring board 44 is completely removed by etching, and the outer layer circuit is formed directly on the surface of the exposed resin layer by forming the circuit shape with the conductive paste or by the semi- A multilayer printed wiring board can be formed. The first wiring layer 26 in which the concave portion is formed can be obtained by completely etching and removing the copper foil 16 on the outer layer of the multilayer wiring board 44 and softening the first wiring layer 26, It is also possible to use a pad.

(Example)

The present invention will be described more specifically by the following examples. The examples shown below are examples for demonstrating the advantages of the copper foil having a predetermined treated surface, such as advantages in the appearance inspection of the printed wiring board and the formation of fine circuits.

Example 1

(1) Preparation of electrolytic copper foil for carrier

A sulfuric acid-containing copper sulfate solution having the composition shown below was used as a copper electrolytic solution, a rotary electrode drum made of titanium having a surface roughness Ra of 0.20 占 퐉 was used as a negative electrode, DSA (dimensionally stable positive electrode) ° C. and a current density of 55 A / dm ² to obtain a carrier electrolytic copper foil A (hereinafter referred to as copper foil A) having a thickness of 12 μm.

(With respect to the copper foil A formed here, the side which was in contact with the cathode drum during electrolysis was referred to as " drum side ", and the side which was in contact with the electrolytic solution was referred to as " However,

(2) Formation of organic peeling layer

The drum surface side of the pickled copper foil A was dipped in a CBTA aqueous solution containing CBTA (carboxybenzotriazole) of 1000 ppm by weight, a free sulfuric acid concentration of 150 g / l and a copper concentration of 10 g / l for 30 seconds at a liquid temperature of 30 ° C . Thus, the CBTA component was adsorbed on the drum side of the copper foil A to form the CBTA layer as an organic release layer.

(3) Formation of ultra-thin copper foil

In an acidic copper sulfate solution with respect to the drum side of a copper-A to form an organic release layer, the ultra-thin copper foil with a thickness of 3㎛ at a current density 8A / dm ² was formed on the organic release layer.

(4) Harmonization processing

The ultra-thin copper foil formed on the drum surface side of the carrier electrolytic copper foil A was subjected to a coarsening treatment in the following three-step process.

- The first stage of the harmonization treatment was a copper electrolytic solution for copper plating (copper concentration: 11 g / l, free sulfuric acid concentration: 220 g / l, 9-phenylacridine concentration: 0 mg / l, chlorine concentration: 0 mg / , Electrolysis (current density: 10 A / dm < ² >) at a solution temperature of 25 DEG C).

The second stage of the harmonization treatment was a copper electrolytic solution for copper plating (copper concentration: 65 g / l, free sulfuric acid concentration: 150 g / l, 9-phenyl acridine concentration: 0 mg / l, chlorine concentration: 0 mg / , Electrolysis (current density: 15 A / dm < ² >) at a solution temperature of 45 DEG C).

The third stage of the harmonization treatment was a copper electrolytic solution for copper plating (copper concentration: 13 g / l, free sulfuric acid concentration: 50 g / l, 9-phenyl acridine concentration: 140 mg / l, chlorine concentration: , Electrolysis (current density: 50 A / dm < ² >) at a solution temperature of 30 DEG C).

(5) Rust treatment

Both sides of the electrolytic copper foil after the roughening treatment were subjected to anti-corrosive treatment comprising an inorganic anti-rust treatment and a chromate treatment. First, as an inorganic anti-corrosive treatment, exhaustion of the acid bath used, in potassium pyrophosphate concentration of 80g / ℓ, a zinc concentration of 0.2g / ℓ, the nickel concentration of 2g / ℓ, a liquid temperature of 40 ℃, current density of 0.5A / dm ² zinc-nickel Alloy rust prevention treatment was performed. Next, as a chromate treatment, a chromate layer was further formed on the zinc-nickel alloy rust-preventive treatment. The chromate treatment was carried out at a chromic acid concentration of 1 g / l, a pH of 11, a solution temperature of 25 캜, and a current density of 1 A / dm ² .

(6) Treatment with silane coupling agent

The copper foil subjected to the rust-preventive treatment was washed with water and then immediately subjected to a silane coupling agent treatment to adsorb a silane coupling agent on the rust-inhibited layer. This silane coupling agent treatment was carried out by using a solution having a concentration of 3 g / l of 3-aminopropyltrimethoxysilane as a solvent and spraying the solution onto a black rough surface by means of showering and adsorbing the solution. After the adsorption of the silane coupling agent, moisture was finally produced by an electric heater to obtain a carrier-coated surface-treated copper foil.

Examples 2 to 4 and 6

A surface-treated copper foil with a carrier was produced in the same manner as in Example 1 except that the roughening treatment of the two-step process was performed under the conditions shown in Table 1, instead of the roughening treatment of the above-

Example 5

An organic peeling layer and an ultra-thin copper foil having a thickness of 3 탆 were formed on the electrolytic solution side of the copper foil A by the same procedure as in Example 1. [ Next, the surface of the ultra-thin copper foil was electrolyzed under the conditions of a solution temperature of 30 캜 and a current density of 50 A / dm ² using a copper electrolytic solution for roasting having the composition shown below, thereby completing the one-step process.

<Composition of copper electrolytic solution for harmony>

- Copper concentration: 15g / ℓ

- Free sulfuric acid concentration: 55 g / l

- 9-phenylacridine concentration: 140 mg / l

- Chlorine concentration: 35 mg / l

Bis (3-sulfopropyl) disulfide concentration: 100 ppm

Thus, a rust-preventive treatment and a silane coupling treatment were carried out on the black-treated surface in the same manner as in Example 1 to prepare a carrier-coated surface-treated copper foil.

Example 7 (comparative)

A surface-treated copper foil with a carrier having an ultra-thin copper foil formed on the electrolytic solution surface side of the copper foil A was produced in the same manner as in Example 5 except that the roughening treatment was not performed.

Evaluation on surface properties of surface treated copper foil

The following evaluation was made on the treated surface of the surface-treated copper foil produced in Examples 1 to 7 (the precipitation surface side of the electrolytic copper foil). The evaluation results are shown in Table 2.

<Optical characteristics>

(8 DEG diffuse reflectance SCI at 635 nm)

The 8 ° diffuse reflectance SCI of the incident light at a wavelength of 635 nm with respect to the treated surface of the surface-treated copper foil was measured using a spectroscopic colorimeter (SD7000, manufactured by Nihon Denshoku Kogyo K.K.) according to JIS Z 8722 (2012) - reflection and transmission object color).

<Screen appearance>

(Average particle diameter D and particle density p)

An image was taken at a tilt angle of 0 DEG with respect to the treated surface of the surface-treated copper foil, and the image was photographed at a magnification in which 1000 to 3000 pieces of the particles were observed in a visual field of a scanning electron microscope (SEM) And the average particle diameter D was obtained. Image processing software (Mac-VIEW, manufactured by Mountech Co., Ltd.) was used for the image processing. The measurement was performed on 200 particles arbitrarily selected, and the average diameter of the particles was taken as the &quot; average particle diameter D &quot;, and the value obtained by dividing the number of particles (i.e., 200 particles) by the view area was defined as &quot; particle density?

(Glossiness Gs (85 deg.))

(Polished surface-gloss measurement method) of JIS Z 8741 (1997) (surface gloss-measuring method) using a gloss meter (PG-1M made by Nippon Denshoku Kogyo K.K.) The gloss was measured.

Evaluation on the manufacturability of the coreless support wiring layer

Using the surface-treated copper foils produced in Examples 1 to 7, lamination to a coreless support, photoresist processing, pattern plating, photoresist peeling, and the like were performed one after another to form a first wiring layer with a predetermined wiring pattern, To prepare a laminate. More specifically, it is performed as follows.

(1) Lamination to the core-less laminate

Four sheets of a prepreg made of bismaleimide-triazine resin containing a glass cloth (Mitsubishi Gas Chemical Co., Ltd., GHPL-830NS, thickness: 45 탆) were laminated to form a coreless support. On both sides of this coreless support, The copper foil with a carrier prepared in 7 was laminated by pressing the ultra thin copper foil outward to produce a core-less laminate. The press lamination was performed at a press temperature of 220 占 폚, a press time of 90 minutes, and a pressure of 40 MPa.

(2) Fabrication of fine wiring pattern samples

For the evaluation of the photoresist adhesion, samples were prepared in the state where a circumferential pattern of a photoresist having a diameter of 7 mu m (pitch: 14 mu m) was subjected to the manufacturing steps up to the above-described developing step. Further, for the evaluation of appearance image inspection characteristics and the evaluation of the wiring pattern formability, the line / space (L / S) of 8 占 퐉 / 8 占 퐉 and 7 占 퐉 / 7 占 퐉 A sample including the wiring pattern was prepared. The concrete procedure of applying the photoresist, electroplating, and peeling the photoresist was as follows.

(Photoresist application)

A negative photoresist (Hitachi Chemical, RY3625) was laminated on the ultra-thin copper foil layer, and exposure (20 mJ / cm 2) and development (8% sodium carbonate aqueous solution, 30 캜 shower method) were performed.

(Electric copper plating)

On the ultra-thin copper foil layer subjected to the patterning by the developing treatment, electroplated copper was formed to a thickness of 10 mu m by a copper sulfate plating solution.

(Peeling of photoresist)

Photoresist peeling was carried out at 60 占 폚 for 5 minutes by using a photoresist peeling solution (R-100S, manufactured by Mitsubishi Gas Chemical Co., Ltd.).

The adhesion of the photoresist and the resolution of the photoresist in this circuit formation, and the appearance inspection characteristics of the finally obtained first wiring layer-attached laminate were evaluated as follows. The results are shown in Table 2.

<Characteristics of appearance image inspection>

(Distance between 256 layer peaks)

An optical automatic visual inspection (AOI) apparatus (Dainippon Screen Seiko Co., Ltd., product name: PI9500) equipped with a 635 nm red LED as a light source was prepared. A wiring pattern is carried out laminate to scan the surface creates a luminance histogram as shown in Fig. 6, Fig. 6 256 increase in the high-layer side of the peak P _S of the space (gap portion) in the layer axis, as shown in position and, to measure the distance (i.e. layer 256 peak-to-peak distance D) of the line (wiring portion) of the raised side of the low hierarchy of the peak P of the _L position. The obtained values were as shown in Table 2.

(Visibility)

The visibility of the wiring pattern was evaluated by the following procedure. A luminance histogram as shown in Fig. 6 was prepared by scanning the surface of the laminate on which the wiring pattern was formed, and a threshold value for identifying space and wiring was prepared. The value of this threshold value is set to a value between the peak P _S derived from the space (gap portion) of the luminance histogram and the peak P _L derived from the line (wiring portion) And the starting point of the peak corresponding to the wiring portion). Based on this threshold value, the circuit surface on which the wiring pattern is formed was scanned to identify lines and spaces, pattern matching with design data was performed, and graded according to the following four criteria.

- AA: As shown in Fig. 4, a line / space image (hereinafter referred to as L / S phase) was obtained exactly as designed

- A: Generally, the L / S phase was obtained correctly,

- B: An L / S phase was obtained to an acceptable degree,

C: As shown in Fig. 7, it was difficult to identify lines and spaces

For reference, the image (evaluation A) obtained in Example 2 is shown in Fig.

The evaluation results are shown in Table 2. From the comparison between the distance between the 256 layer peaks shown in Table 2 and the result of visibility evaluation, the longer the distance between the 256 layer peaks, the better the visibility of the wiring pattern and the better the appearance image inspection to check the accuracy of the position and shape of the wiring pattern It can be seen that it is appropriate. Also, considering the relationship with the distances between the 256 layer peaks shown in Table 2, the distance between the 256 layer peaks is preferably 85 or more, more preferably 100 or more, and more preferably 110 or more.

<Circuit formation characteristics>

(Wiring pattern formation property evaluation)

The wiring pattern formability was evaluated as follows. (L / S) of 8 占 퐉 / 8 占 퐉 and 7 占 퐉 / 7 占 퐉 for a wiring pattern including 20 lines (10 mm in length) formed of various lines / spaces Each of the patterns was evaluated in the following three stages, based on the assumption that there is no development residue and whether or not electroplating is formed as a pattern.

- A: No electroplating defective part

- B: Less than 2 of the 20 lines have bad electroplating

- C: 3 or more electroplating defective parts out of 20 lines

Then, the total evaluation based on the evaluation results of the above-mentioned four types of L / S was evaluated by rating according to the following four criteria.

- AA: Very good

- A: Good

- B: Permissible

- C: Dropped

(Photoresist adhesion property / peelability)

The evaluation of the adhesion and releasability of the photoresist was conducted in such a manner that the frequency of occurrences of poorly adhered resist (resist peeling) or the occurrence of defective inter-pattern resist residues in development at the 200 circumferential patterns of the above- The evaluation was carried out by grading them on the basis of the following three levels.

- A: Less than 10 places

- B: Defective locations are 10 or more and less than 50

- C: more than 50 defective points

- D: Resist residue is generated between patterns, and independent circumferential pattern is not formed

[Table 1]

[Table 2]

Claims (15)

A manufacturing method of a printed wiring board,
A step of preparing a copper foil having a processing surface having an 8 占 diffuse reflectance SCI of not more than 41% with respect to incident light,
Forming a photoresist pattern on the treated surface of the copper foil;
Performing electroplating on the copper foil on which the photoresist pattern is formed;
Forming a wiring pattern by peeling the photoresist pattern;
A step of inspecting the exterior appearance image of the wiring pattern with respect to the copper foil on which the wiring pattern is formed
&Lt; / RTI &gt; The method according to claim 1,
Wherein the incident light has a wavelength within a peak region of a light source wavelength used for the external image inspection. 3. The method according to claim 1 or 2,
Wherein the external appearance inspection is performed using a light source having a peak region at a wavelength of 635 nm. 4. The method according to any one of claims 1 to 3,
And the wavelength of the incident light is 635 nm. 5. The method according to any one of claims 1 to 4,
Wherein the 8 DEG diffuse reflectance SCI is 20% or less. 6. The method according to any one of claims 1 to 5,
Wherein a roughened surface of the particle is formed on the treated surface. The method according to claim 6,
Wherein an average particle size D of the above-mentioned coarse particles by image analysis is 0.04 to 0.53 占 퐉 and a particle density? By image analysis of said coarse particles is 4 to 200 particles / 占 퐉 ² . 8. The method according to any one of claims 1 to 7,
Wherein the treated surface has a specular gloss Gs (85 DEG) of from 20 to 100. 9. The method according to any one of claims 1 to 8,
Wherein the copper foil has a thickness of 0.05 to 7 mu m. 10. The method according to any one of claims 1 to 9,
Wherein the external appearance inspection is performed by an optical automatic appearance inspection (AOI). 11. The method according to any one of claims 1 to 10,
Wherein the copper foil is provided in the form of a copper foil with a carrier, and the copper foil with a carrier comprises a carrier layer, a release layer and the copper foil in this order. 12. The method according to any one of claims 1 to 11,
Further comprising the step of forming the laminate by laminating the copper foil or the copper foil with a carrier on one or both sides of the coreless support prior to formation of the photoresist pattern. 13. The method according to any one of claims 1 to 12,
And a step of forming a build-up wiring layer on the copper foil after the appearance image inspection to manufacture a build-up wiring layer-attached laminate. 14. The method of claim 13,
Further comprising a step of separating the build-up wiring layer-attached laminate from the release layer to obtain a multilayer wiring board including the build-up wiring layer. 15. The method according to any one of claims 1 to 14,
Further comprising a step of processing the copper foil or the multilayer wiring board to obtain a printed wiring board.

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