JP6732189B2 - Semiconductor device and manufacturing method thereof - Google Patents

Description

The present invention relates to a semiconductor device including a selective solder joint structure using a Zn—Al oxide film and a manufacturing method thereof, and more particularly to a semiconductor device in which electrodes and wirings of a high heat resistant power semiconductor chip are bonded and a manufacturing method thereof.

Conventionally, a solder alloy has been used to connect an external wiring to an electrode of a vertical semiconductor chip. That is, a plate-shaped solder is placed on a metal substrate, a vertical semiconductor chip having one electrode on the back surface is placed on the substrate and heated, and the solder is melted and cooled to solidify to form a bond. Let As a result, the vertical semiconductor chip is bonded onto the substrate via the solder layer.

In the case of a Si semiconductor element, the upper limit temperature that can guarantee the safety of its operation is about 150° C. due to the physical properties of Si, and accordingly, the solder alloy used for connection does not melt even at such an upper limit temperature and falls within a predetermined range. Materials, thicknesses and other conditions have been selected and used so that there is no problem in electrical and mechanical properties even after repeated temperature changes. As a result, conventionally, one having a melting point higher than the above temperature by 100° C. or more has been selected.

By the way, a semiconductor element made of a wide bandgap semiconductor such as SiC can operate even at a temperature exceeding 250° C. However, in order to make full use of this characteristic, the characteristics of the solder material used for mounting must be in conformity therewith. It doesn't happen. However, even if a temperature difference larger than before is repeatedly experienced, the materials that can ensure reliability for a long time are limited. Au-based alloy solder is an example, but it is expensive. As another example, there is Zn-based alloy solder, but in the atmosphere, a film of a metal oxide (hereinafter, referred to as “oxide film”) is formed on the surface of this alloy, which hinders the formation of a bond.

For example, in Patent Document 2, as a method of coping with such a problem, when Zn-Bi alloy solder is used as a bonding material, a protective coating film is applied to the surface before the formation of an oxide film to promote the progress of surface oxidation. A method of suppressing is disclosed. Furthermore, this protective coating film disappears promptly in the solder melting process, and provides good bonding.

Further, in Patent Document 3, a Zn-Al solder plate covered with an oxide film is sandwiched between a semiconductor chip and a metal substrate, and heating is performed while applying a load to this structure, whereby the oxide film is formed by the internal pressure of the molten solder. By breaking the molten solder with the metal electrode and the metal substrate on the back surface of the semiconductor chip to form a bond.

JP, 2011-254048, A JP, 2014-195831, A JP, 2013-030607, A

However, in the method of Patent Document 2, a special substance is required as a coating film for anti-oxidation, and there is a portion that is not protected by the coating film due to reshaping of preformed plate solder or damage during transportation. However, it should be noted that the performance may deteriorate.

Further, the method of Patent Document 3 requires a special device that applies a corresponding load when forming the joint.

The present invention has been made to solve the above problems, and uses a Zn-based alloy solder by an industrially simple method without using a special coating film or a load applying device while using the Zn-based alloy solder. In addition to making it possible, it has a structure that can positively utilize the existence of an oxide film, which has been regarded as an obstacle to bonding until now, and that the characteristics of bonding can be maintained electromechanically even after repeated large temperature changes. A semiconductor device and a method for manufacturing the same are provided.

In the semiconductor device according to the present invention, a semiconductor chip on which a metal electrode is formed and a metal plate that is an external wiring are joined via a solder thin plate made of a Zn-Al alloy, and the solder thin plate has rounded corners. The first bonding area is bonded to the metal electrode in a quadrangular first bonding area, and is bonded to the metal plate in a second bonding area on the main surface facing the first bonding area. There is a feature that the surface of the area and the surface of the second bonding area is covered with an oxide film. As a result, the stress on the solder thin plate adjacent to the corner of the semiconductor chip, where the stress is most concentrated due to the temperature change, is relaxed, and the connection reliability is improved.

Further, in the above-mentioned invention, the solder thin plate may be configured such that the planar shape thereof is a circle or a quadrangle with rounded corners. As a result, the shape of the solder thin plate is set in advance so as to avoid the corners of the semiconductor chip, so that the solder thin plate does not come into contact with the corners of the semiconductor chip in the first place.

Further, the semiconductor device according to the present invention includes a first metal electrode (for example, a main electrode) and a second metal electrode (for example, a control electrode) formed on one main surface of a semiconductor chip, and a first metal that is an external wiring. A plate (here, for the main electrode) and a second metal plate (here, for the control electrode) are joined together, wherein the first electrode (main electrode) is the first metal plate (main electrode). Wiring) and the second electrode (control electrode) are joined to the second metal plate (control electrode wiring) via solder thin plates made of Zn-Al alloy, respectively. There is a configuration characterized in that the side surface that does not contribute to bonding is covered with an oxide film. As a result, the possibility of short-circuiting the main electrode and the control electrode due to the oxide film can be avoided, and the bonding area can be provided very adjacent to each other. It can be formed, and short-circuiting does not occur even if the solder thin plates for the main electrode and the control electrode come close to each other.

Further, in the above structure, the second metal electrode (control electrode) partially has a rod-shaped region like the general transistor chip, and the first metal electrode (main electrode) surrounds the rod-shaped region. , The first solder thin plate for the main electrode exists over the rod-shaped region belonging to the second metal electrode (control electrode), and the second metal electrode including the rod-shaped region is still present. There is also a configuration in which an oxide film is interposed between the (control electrode) and the first solder thin plate connected to the main electrode. As a result, the areas of the solder regions communicating with the main electrode and the control electrode can be maximized, and the electrical conductivity of the mounting structure is improved with respect to the current flowing through the main current of the semiconductor chip. In addition, since there is an oxide film, even if the runner connected to the control electrode on the semiconductor chip is present without a protective film, it is possible to form a solder thin plate for the main electrode over the runner. Helps reduce mounting resistance.

Further, according to the present invention, a method for manufacturing a semiconductor device, in which a semiconductor chip having a metal electrode formed thereon and a metal plate are joined together via a solder thin plate made of a Zn--Al alloy, is a method for manufacturing the metal electrode of the semiconductor chip and the solder. The semiconductor chip bonding step of ultrasonically bonding the first surface of the thin plate to form the first bonding region, and the metal plate and the second surface of the solder thin plate facing the first surface are superposed. A metal plate joining step of sonic joining to form a second joining region, and at least the solder thin plate is heated and melted to form an alloy region in the first joining region and the second joining region. And an alloying step. As a result, the oxide film in the region to be joined is crushed and the metals are joined in advance, so that the metals are joined only by heating. Further, since the oxide film is crushed only in the region to be bonded and the metals are bonded to each other first, a strong bonding region having a desired shape and a desired shape can be formed at a desired position.

FIG. 3 is a cross-sectional view illustrating the mounting structure of the semiconductor chip according to the first embodiment of the present invention. 2 is a perspective plan view of the structure of FIG. 1. FIG. FIG. 7 is a cross-sectional view illustrating the manufacturing process of the structure of FIG. 1. FIG. 7 is a cross-sectional view illustrating the manufacturing process of the structure of FIG. 1. FIG. 7 is a cross-sectional view illustrating the manufacturing process of the structure of FIG. 1. FIG. 7 is a cross-sectional view illustrating the manufacturing process of the structure of FIG. 1. FIG. 9 is a cross-sectional view illustrating a modified example of the manufacturing process of the structure of FIG. 1. It is a plane perspective view of the structure of the modification by the 1st Embodiment of this invention. 9 is a cross-sectional view of the structure of FIG. FIG. 9 is a plan perspective view of a structure according to another modification of the first embodiment of the present invention. FIG. 8 is a plan perspective view of a structure according to still another modification of the first embodiment of the present invention. It is sectional drawing explaining the mounting structure of the semiconductor chip by the 2nd Embodiment of this invention. FIG. 13 is a cross-sectional view illustrating the manufacturing process of the structure of FIG. 12. FIG. 13 is a cross-sectional view illustrating the manufacturing process of the structure of FIG. 12. FIG. 13 is a cross-sectional view illustrating the manufacturing process of the structure of FIG. 12. FIG. 13 is a cross-sectional view illustrating the manufacturing process of the structure of FIG. 12. It is a plane perspective view explaining the 3rd Embodiment of this invention. 18 is a cross-sectional view of the structure of FIG.

Hereinafter, the semiconductor device according to the first embodiment of the present invention will be described with reference to FIGS.

FIG. 1 is a structural sectional view showing a semiconductor device according to the first embodiment of the present invention. In the figure, 1d is a metal plate, and at least the outermost surface can be made of Al, Ag, Au, Cu, Ni or the like. That is, 1d may be a thick metal plate as shown or a thin film formed on another metal plate (not shown). 2d is a thin solder plate made of an Al-Zn alloy. 3d is an oxide film formed by natural oxidation of the metal that constitutes the solder, and is present in all parts of the solder thin plate 2d that come into contact with the atmosphere. Reference numeral 4 is a semiconductor chip, and 5d is a back surface electrode of the semiconductor chip 4. The back surface electrode 5d is electrically and mechanically connected to the metal plate 1d through the solder thin plate 2d. Further, in the figure, at the corner portion of the semiconductor chip 4, there is a gap 6 between the solder thin plate 2d.

FIG. 2 is a plan view of the semiconductor device according to the first embodiment of the present invention when the structure of FIG. 1 is viewed from above. Note that FIG. 1 is the end of the cross-sectional view including the line segment AA of FIG. 2 and taken along a plane perpendicular to the paper surface. That is, the end portion of the semiconductor chip 4 shown on the left side of FIG. 1 corresponds to a corner portion. In this structure, at the four corners of the semiconductor chip 4, there are regions in which the solder thin plate 2d and the back surface electrode 6d are separated by the space 6. In FIG. 2, a boundary 60 between the region where the back surface electrode 5d and the solder thin plate 2d are joined and the void 6 is schematically shown by a chain line. Thus, when the bonding boundary 60 has a large radius of curvature near the corner of the semiconductor chip, the stress generated at this interface due to the temperature change is relaxed, and the probability of cracking in the thin solder plate is reduced.

Next, a manufacturing method for establishing such a structure will be described with reference to FIGS. First, as shown in FIG. 3, the back surface of the semiconductor chip 4 is turned upside down, and the solder thin plate 20d is placed on the back surface of the back surface electrode 5d. By the way, an oxide film 3d exists on the surface of this solder thin plate 20d of Al-Zn alloy when exposed to the atmosphere. Even if the oxide film 3d is heated above its melting point, the oxide film is not broken, and the back surface metal 5d is Al-. Even a Zn-based alloy and a wettable metal do not bond to each other. Therefore, in this state, the solder thin plate 20d is ultrasonically bonded to the back surface metal 5d using an ultrasonic bonder (semiconductor chip bonding step). FIG. 4 shows this process. In the figure, reference numeral 11 is a bonding jig for applying ultrasonic waves, 8d is the crushing of the oxide film 3d locally by the application of ultrasonic waves, and the metals are bonded by ultrasonic bonding. This is a partially alloyed region. Although the oxide film 3d in this area is crushed and exists in the vicinity of this area, it does not affect the electric conduction or the bonding strength.

Next, as shown in FIG. 5, the structure in which the semiconductor chip 4 and the solder thin plate 20d are combined is returned to the original upright posture, and this time, the solder thin plate 20d is arranged so as to face the metal plate 1d. To do. At this point, the semiconductor chip 4 and the solder thin plate 20d are joined together, so there is no risk of misalignment. Then, as shown in FIG. 6, both are ultrasonically bonded (metal plate bonding step). In the figure, reference numeral 12 is a bonding jig for fixing the semiconductor chip 4 and applying ultrasonic waves, and 9d is a region where the oxide film 3d is locally broken by the second ultrasonic wave application and the metals are alloyed. is there. The device used in this step is the same as that used for flip-chip bonding by ultrasonic bonding. Although the oxide film 3d in this area is crushed and exists in the vicinity of this area, it does not affect the electric conduction or the bonding strength.

Next, when the structure obtained by ultrasonically bonding the semiconductor chip 4, the solder thin plate 20d, and the metal plate 1d as described above is heated to a temperature higher than the melting point of the Al-Zn alloy, the inside of the solder thin plate 20d becomes liquid and The regions 8d and 9d (see FIG. 6) that have been sonic bonded proceed with an alloying reaction with a part of the metal plate 1d and the back surface metal 5d, and when solidified, a strong bond is established (alloying step). And, as shown in FIG. 1, the oxide film 3d does not propagate to the surroundings except for the region which is ultrasonically bonded in advance. As described above, according to the present invention, the semiconductor chip can be bonded to the metal plate by using the Al—Zn based alloy without using a special substance or a pressure device.

In the above process, the solder thin plate 20d is ultrasonically bonded to the back surface of the semiconductor chip 4 first. However, as shown in FIG. 7, the solder thin plate 20d is ultrasonically bonded to the metal plate 1d first, and then the process of FIG. It goes without saying that it is also possible to carry out the above, or the members may be superposed from the beginning as shown in FIG.

The void 6 in FIG. 1 is formed by performing ultrasonic bonding only inside the boundary indicated by the alternate long and short dash line in FIG. 2 in the first ultrasonic bonding step shown in FIG. be able to.

Although the size of the solder thin plate 2d is shown to be substantially the same as that of the semiconductor chip 4 in FIG. 2, the solder thin plate 2d may be larger than the semiconductor chip 4 as shown in FIG. In that case, the cross-sectional structure including the line segment AA in the drawing and perpendicular to the paper surface has a shape as shown in FIG. 9 due to the existence of the oxide film 3d described above.

Also, in order to prevent the solder thin plate 2d from approaching the region where the void 6 is to be formed, the shape of the solder thin plate 2d should be circular as shown in FIG. 10 or a square with rounded corners as shown in FIG. Can also

Next, the semiconductor device according to the second embodiment of the present invention will be explained with reference to FIGS.

In FIG. 12, the main electrode 5s and the control electrode 5g existing on the surface of the semiconductor chip 4 are attached to the surface of the insulating plate 7 via the corresponding solder thin plates 2s and 2g, and the metal plate 1s plays the role of wiring. It is a structure connected to 1g. In the case of using a bonding material having such a structure, which is once melted and then solidified during the assembly process, the solder thin plates 2s and 2g in the figure may be short-circuited when the alloy is melted. Therefore, in general, a measure has been taken to keep the distance between the solder thin plates 2s and 2g sufficiently separated from the solder thickness. However, the width of the passivation film (see reference numeral 10 in FIGS. 13 to 16) separating the main electrode 5s and the control electrode 5g on the surface of the actual semiconductor chip 4 is several tens of μm at most. Since the solder thickness is 50 μm or more, in this case, the distance between the solder thin plates 2s and 2g is at least 300 μm or more. However, such measures tend to impair the electrical characteristics of semiconductor chips.

On the other hand, in the case of solder composed of Al-Zn alloy, strong oxide films 3s and 3g are formed on the surface of each solder thin plate as shown in FIG. 12, and the solder is not easily broken even if melted. Utilizing this property, in the present invention, the metal on the semiconductor chip 4 and the wiring metal are connected to each other, but the above-mentioned short circuit is unlikely to occur. Therefore, it is possible to dispose the both close to each other, and to improve the electrical characteristics of the semiconductor chip. It is possible to realize a fully utilized mounting structure.

Next, an example of a method for manufacturing the semiconductor device illustrated in FIG. 12 is described with reference to FIGS. First, as shown in FIG. 13, the molded solder thin plates 20s and 20g are respectively placed on the surface electrodes 5s and 5g of the semiconductor chip 4, and the load and the ultrasonic wave are applied by the jig 11 of the ultrasonic bonder as shown in FIG. Is applied to form joints 8s and 8g (semiconductor chip joining step). By this ultrasonic wave application, the oxide films 3s and 3g are locally crushed, and the metals are alloyed by the frictional heat applied by the ultrasonic wave application.

Next, as shown in FIG. 15, the above structure is inverted and arranged so as to face the metal wirings 1s and 1g formed on the insulating plate 7, and the jig 11 of the ultrasonic bonder is placed as shown in FIG. Are applied to apply a load and ultrasonic waves to form joints 9s and 9g (metal plate joining step).

Next, when the structure obtained by ultrasonically bonding the semiconductor chip 4 and the insulating plate 7 through the solder thin plates 2s and 2g as described above is heated to a temperature higher than the melting point of the Al-Zn alloy, the inside of the solder thin plate becomes liquid. Then, the alloying reaction proceeds in the ultrasonically bonded regions 8s, 8g, 9s, 9g (see FIG. 16), and they are integrated with the solder thin plates 2s, 2g, respectively, and when they are solidified, a strong bonding is established ( Alloying process). Then, as shown in FIG. 12, the oxide films 3s and 3g do not flow out except for the ultrasonically bonded region, and the end of the solder thin plate has a barrel-shaped cross-sectional shape, and even if 3s and 3g come close to each other. , Never short circuit. Incidentally, in the case of eutectic Al-Zn solder, the oxide film is exclusively alumina. As described above, according to the present invention, the semiconductor chip can be bonded to the metal plate by using the Al—Zn based alloy without using a special substance or a pressure device.

In addition, the surface electrode pattern of a general power transistor chip is as shown in FIG. 17, and in order to quickly spread the control signal in the chip, the elongated runner 50g connected to the control electrode 5g is located at the center of the main electrode 5s. Some extend to. Further, FIG. 18 shows a mounting cross-sectional structure corresponding to FIG. 12, which is a cross section including a line segment BB in FIG. 17 and perpendicular to the paper surface. Since the oxide film 3s is present on the surface of the solder thin plate 2s, as shown in this figure, even if the solder thin plate 2s straddles the runner 50g, there is no short circuit. Even if is not covered with an insulating film, the main electrode solder thin plate 2s can be present across the runner 50g as shown by the broken line in FIG. 17, and the electrical performance of the transistor chip can be maximized. Of course, this structure is established even if the runner 50g is covered with a separate insulating film.

Although the embodiments of the semiconductor device and the method for manufacturing the same according to the present invention and the modifications based on the same have been described above, the present invention is not necessarily limited to these, and those skilled in the art can understand the gist of the present invention or the patent. Other configurations are within the scope of the present invention as long as they match the scope of the claims.

1d, 1s, 1g Metal plate 2d, 2s, 2g, 20d, 20s, 20g Solder thin plate 3d, 3s, 3g Oxide film 4 Semiconductor chip 5d Backside metal 5s (semiconductor chip) Main electrode 5g (semiconductor chip) Control electrode 50g runner 6 void 60 boundary 7 insulating plate 8d, 8s, 8g ultrasonic bonding between semiconductor chip and solder thin plate 9d, 9s, 9g ultrasonic wave between metal plate or insulating plate and solder thin plate Bonding points 11 and 12 Bonding jig

Claims (5)

A semiconductor device in which a semiconductor chip on which a metal electrode is formed and a metal plate are bonded via a solder thin plate made of a Zn-Al-based alloy,
The solder thin plate is bonded to the metal electrode at a first bonding region having a square shape with rounded corners, and the metal plate is bonded at a second bonding region on a main surface facing the first bonding region. And a surface of the first bonding region and the second bonding region are covered with an oxide film. 2. The semiconductor device according to claim 1, wherein the solder thin plate has a planar shape of a circle or a quadrangle with rounded corners. A semiconductor device in which a first metal electrode and a second metal electrode formed on one main surface of a semiconductor chip are joined to a first metal plate and a second metal plate,
The first electrode is bonded to the first metal plate via a first solder thin plate made of a Zn-Al alloy, and a side surface of the first solder thin plate that does not contribute to the bonding is an oxide film. Is covered with
The second electrode is bonded to the second metal plate via a second solder thin plate made of a Zn-Al alloy, and a side surface of the second solder thin plate that does not contribute to the bonding is an oxide film. A semiconductor device characterized by being covered with. The second metal electrode has a rod-shaped region in a part thereof, the first metal electrode is arranged so as to surround the rod-shaped region, and the first solder thin plate serves as the second metal electrode. The oxide film is present across the rod-shaped region to which it belongs, and an oxide film is interposed between the second metal electrode and the first solder thin plate including the rod-shaped region. Semiconductor device. A method of manufacturing a semiconductor device, comprising: joining a semiconductor chip having a metal electrode formed thereon and a metal plate via a solder thin plate made of a Zn-Al alloy;
A semiconductor chip bonding step of ultrasonically bonding the metal electrode of the semiconductor chip and the first surface of the solder thin plate to form a first bonding region;
A metal plate bonding step of ultrasonically bonding the metal plate and a second surface of the solder thin plate facing the first surface to form a second bonding region;
A method of manufacturing a semiconductor device, comprising at least an alloying step of heating and melting the solder thin plate to form an alloy region in the first bonding region and the second bonding region.

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