JP6719529B2 - Electronic component, connecting body, manufacturing method of connecting body, and connecting method of electronic component - Google Patents

Description

The present invention relates to an electronic component connected to a circuit board via an adhesive, a connection body in which the electronic component is connected to the circuit board, a method for manufacturing the connection body, and a method for connecting the electronic component, and particularly to a circuit board. The present invention relates to an electronic component in which a plurality of bump electrodes are asymmetrically arranged on the mounting surface, a connector to which the electronic component is connected, a method for manufacturing the connector, and a method for connecting the electronic component.

2. Description of the Related Art Conventionally, there has been provided a connection body in which electronic components such as IC chips and LSI chips are connected to circuit boards of various electronic devices. 2. Description of the Related Art In recent years, in various electronic devices, from the viewpoint of fine pitch, light weight and thinness, IC chips and LSI chips in which bumps, which are projecting electrodes, are arranged on a mounting surface are used as electronic components. So-called COB (chip on board) and COG (chip on glass) for directly mounting electronic components such as the above on a circuit board are adopted.

In the COB connection and the COG connection, an IC chip is thermocompression-bonded onto a terminal portion of a circuit board via an anisotropic conductive film. An anisotropic conductive film is made by mixing conductive particles into a thermosetting binder resin to form a film. The two conductive particles are heated and pressed to establish electrical conduction between the conductive particles. The binder resin holds the mechanical connection between the conductors. As the adhesive forming the anisotropic conductive film, a highly reliable thermosetting adhesive is usually used. On the other hand, a connection method using a photo-curable resin or a connection method using both heat-curing and light-curing is also used, but it is assumed that when pressing with a tool, the same problem as the thermosetting adhesive is included. It

In the bumped IC chip 50, for example, as shown in FIG. 5A, an input bump region 52 in which the input bumps 51 are arranged in a line along one side edge 50a is formed on the mounting surface of the circuit board. An output bump region 54 in which the output bumps 53 are arranged in two rows in a zigzag pattern is provided along the other side edge 50b facing the one side edge 50a. The bump arrangement varies depending on the type of the IC chip. Generally, in the conventional IC chip with bumps, the number of output bumps 53 is larger than the number of input bumps 51, and the output bump region 54 is larger than the area of the input bump region 52. Area is wide, and the shape of the input bump 51 is larger than that of the output bump 53.

Then, in the COG mounting, after the IC chip 50 is mounted on the electrode terminal 57 of the circuit board 56 via the anisotropic conductive film 55, the thermocompression bonding head 58 heats and presses the IC chip 50 from above. By the heat and pressure applied by the thermocompression bonding head 58, the binder resin of the anisotropic conductive film 55 is melted and flows between the input/output bumps 51 and 53 and the electrode terminals 57 of the circuit board 56, and the input/output is performed. The conductive particles are sandwiched between the bumps 51 and 53 and the electrode terminal 57 of the circuit board 56, and the binder resin is thermally cured in this state. As a result, the IC chip 50 is electrically and mechanically connected to the circuit board 56.

JP, 2004-214373, A

Here, as described above, in the electronic component such as the IC chip with bumps 50, the bump arrangement and size of the input bump 51 and the output bump 53 formed on the mounting surface are different, and the input bump region 52 and the output bump 53 are different. There is an area difference with the region 54. In the electronic component, the input bump area 52 and the output bump area 54 are asymmetrically arranged on the mounting surface.

Therefore, in the conventional COB connection or COG connection, the pressing force applied by the thermocompression bonding head 58 to the input bump 51 and the output bump 53 becomes non-uniform, and for example, in the output bump region 54, they are arranged on the other side edge 50b side. A pressure difference may occur between the output bumps 53 and the output bumps 53 arranged inside the mounting surface.

Further, the pressure applied by the thermocompression bonding head 58 is biased to the inner edges of the input bump area 52 and the output bump area 54, so that the output bumps 53 arranged on the other side edge 50b side in the output bump area 54. There is a risk that the pressure will become weak and the conductive particles will not be pushed in sufficiently, resulting in poor conduction.

In order to solve such a problem, so-called dummy bumps, which are not used for inputting/outputting signals and the like, are formed to disperse and equalize the stress applied from the thermocompression bonding head to the entire surface of the IC chip. However, even with this method, the number of fulcrums of stress increases, so that the technical difficulty increases. Further, in order to form the dummy bumps, the number of man-hours for manufacturing the electronic component is increased, and the material cost is also increased. Therefore, a configuration without the dummy bumps is desired.

Therefore, the present invention is an electronic component in which the input bump region and the output bump region have an area difference and are asymmetrically arranged, and the electronic component capable of eliminating the pressure difference due to the thermocompression bonding head and improving the connection reliability. , A connector, a method for manufacturing the connector, and a method for connecting.

In order to solve the above-mentioned problems, the electronic component according to the present invention is provided with an output bump region in which output bumps are arranged in proximity to one side of a pair of side edges facing each other, and An input bump area in which the input bumps are arranged is provided in proximity to the other side, and the output bump area and the input bump area are arranged in a different number of bump rows from the output bump and the input bump and arranged asymmetrically. One of the output bump area or the input bump area having a large number of bump rows is adjacent to the one or the other side edge by a distance of 4% or more and 10% or less of the width between the pair of side edges. Is formed on the inside.

Further, the connection body according to the present invention is a connection body in which the electronic component is arranged on the circuit board via an adhesive and is pressed by a pressing tool to connect the electronic component to the circuit board. In, the electronic component is the electronic component described above .

Further, the method for producing a connected body according to the present invention is a method of connecting the electronic component on the circuit board by arranging the electronic component on the circuit board via an adhesive and applying pressure with a pressure tool. In the manufacturing method, the electronic component is the electronic component described above .

Further, the connection method according to the present invention is a method for connecting electronic components, in which electronic components are arranged on a circuit board via an adhesive and pressure is applied with a pressure tool to connect the electronic components to the circuit board. The electronic component is the electronic component described above .

According to the present invention, the large-area bump region is formed from the side edge to the inside at a predetermined ratio with respect to the width of the mounting surface, so that the pressure gradient formed in the width direction of the bump region is increased. It is gently leveled and prevents the pressing force of the thermocompression bonding head from becoming insufficient on the side edge side. This allows the electronic component to reliably sandwich the conductive particles between the bumps on the side edge side and the electrode terminals formed on the circuit board, and ensure electrical continuity.

FIG. 1 is a plan view showing a mounting surface of an electronic component according to the present invention. FIG. 2 is a cross-sectional view showing a connection body to which electronic components are connected. FIG. 3 is a plan view showing a mounting surface of the electronic component according to the present invention provided with dummy bumps. FIG. 4 is a cross-sectional view showing the anisotropic conductive film. FIG. 5 is a plan view showing a mounting surface of a conventional electronic component.

Hereinafter, an electronic component, a connection body, a method for manufacturing the connection body, and a connection method to which the present invention is applied will be described in detail with reference to the drawings. It should be noted that the present invention is not limited to the following embodiments, and various modifications can of course be made without departing from the scope of the present invention. Also, the drawings are schematic, and the ratios of the respective dimensions may differ from the actual ones. Specific dimensions should be judged in consideration of the following description. Further, it is needless to say that the drawings include portions in which dimensional relationships and ratios are different from each other.

An electronic component to which the present invention is applied is an electronic component that is arranged on a circuit board via an adhesive and connected to the circuit board by being pressed by a thermocompression bonding head. For example, a driver IC or a system LSI. Etc. are packaged electronic parts. Hereinafter, the IC chip 1 will be described as an example of the electronic component.

As shown in FIG. 1, the mounting surface 2 connected to the circuit board of the IC chip 1 has a substantially rectangular shape, and the output bumps are arranged along a pair of side edges 2a and 2b facing each other in the length direction. An output bump region 4 in which 3 is arranged and an input bump region 6 in which the input bump 5 is arranged are formed. In the IC chip 1, the output bump region 4 is formed on one side edge 2a side of the mounting surface 2 and the input bump region 6 is formed on the other side edge 2b side of the mounting surface 2. Thereby, the IC chip 1 is formed such that the output bump region 4 and the input bump region 6 are separated from each other in the width direction of the mounting surface 2.

In the output bump region 4, for example, a plurality of output bumps 3 having the same shape are arranged in a zigzag pattern in three rows along the longitudinal direction of the mounting surface 2. Further, in the input bump region 6, for example, a plurality of input bumps 5 formed in the same shape are arranged in one row along the longitudinal direction of the mounting surface 2. The input bump 5 is formed larger than the output bump 3. As a result, in the IC chip 1, the output bump region 4 and the input bump region 6 have an area difference and are arranged asymmetrically on the mounting surface 2. The output bumps 3 arranged in the output bump region 4 are preferably formed with the same size. Similarly, the input bumps 5 arranged in the input bump region 6 are preferably formed to have the same size.

[Large area bump area offset]
In the IC chip 1 according to the present invention, the output bump region 4 is inward from the one side edge 2a by a predetermined ratio with respect to the IC width W extending between the one side edge 2a and the other side edge 2b. Has been formed. This prevents the IC chip 1 from being unevenly distributed inside the output bump region 4 when the IC chip 1 is heated and pressed onto the circuit board 14 by the thermocompression bonding head 17, which will be described later. An appropriate pressing force can be applied to the output pumps 3 arranged in the.

That is, since the IC chip 1 has an area difference between the output bump region 4 and the input bump region 6 and is arranged asymmetrically on the mounting surface 2, the thermocompression bonding head 17 applies pressure to the entire mounting surface 2. When applied, in the output bump region 4, which is formed in a large area in the width direction by arranging the output bumps 3 in a plurality of rows, the pressing force at the inner edge facing the input bump region 6 increases and mounting There is a pressure gradient in which the pressing force weakens toward the one side edge 2a side of the surface 2, and the pressing force against the output bumps 3 arranged on the one side edge 2a side becomes insufficient. As a result, there is a fear that the conductive resistance of the output bumps 3 may become high especially in the outer edge region of the bumps due to insufficient pushing of the conductive particles.

Therefore, the IC chip 1 is formed across the width of the output bump region 4 by forming the output bump region 4 inward from one side edge 2a by a predetermined ratio with respect to the width of the mounting surface 2. The pressure gradient being applied is gently leveled to prevent a situation in which the pressing force of the thermocompression bonding head 17 is insufficient on the side edge 2a side. As a result, the IC chip 1 reliably holds conductive particles between the output bumps 3 on the side edge 2a of the one side and the electrode terminals 15 formed on the circuit board 14 to ensure conductivity. You can

It is preferable that the distance A from the one side edge 2a to the output bump region 4 is 4% or more with respect to the IC width W between the opposite side edges 2a2b of the mounting surface 2. The output bump region 4 and the input bump region 6 having an area difference are asymmetrically arranged by forming the output bump region 4 inward from one side edge 2a by a distance of 4% or more with respect to the IC width W. Even when the thermocompression bonding head 17 uniformly applies pressure to the mounted surface 2, the pressing force is sufficiently transmitted to the output bumps 3 arranged on the first side edge 2a side. However, if the distance A from the one side edge 2a to the output bump 3 is less than 4% with respect to the IC width W, the pressing force by the thermocompression bonding head 17 is sufficient to reach the output bump 3 on the one side edge 2a side. There is a risk that conduction failure may occur due to insufficient pushing of conductive particles without being transmitted.

On the other hand, if the distance A becomes too large, the pressure on the entire surface of the IC chip 1 is inconsistent, which may cause another pressure imbalance. Therefore, the distance A is preferably within 30%, more preferably within 20%, and even more preferably within 15%.

[Distance A> Distance B]
In the IC chip 1, it is preferable that the distance A from the side edge 2a of the output bump region 4 having a relatively large area is longer than the distance B from the other side edge 2b of the input bump region 6. That is, when the distance B from the other side edge 2b of the relatively small area input bump region 6 is longer than the distance A from one side edge 2a of the large area output bump region 4, the width of the output bump region 4 becomes large. The pressure gradient across the direction is increased, which hinders the elimination of the insufficient indentation of the conductive particles in the output bump 3 on the side edge 2a side.

Further, since the input bumps 5 are arranged in a line, the pressing force by the thermocompression bonding head 17 is unevenly distributed in the input bump region 6 having a relatively small area due to the area difference from the output bump region 4 and the asymmetrical arrangement. Since the risk of insufficient pushing is small, there is no problem even if the distance B from the other side edge 2b of the mounting surface 2 is short.

[Offset large area input bump area 6]
In the IC chip 1, the configuration of the input/output bumps on the mounting surface 2 can be designed appropriately. As described above, the IC chip 1 has the output bump regions 4 each having a relatively large area by arranging a plurality of the output bumps 3 in the width direction. On the contrary, a plurality of the input bumps 5 are arranged in the width direction. By doing so, the area of the input bump region 6 may be relatively increased.

When the input bump region 6 has a relatively large area, the IC chip 1 has the input bump region 6 in a predetermined ratio with respect to the IC width W, preferably a distance of 4% or more of the IC width W, and the other. It is formed inward from the side edge 2b. Further, in this case, it is preferable that the distance B from the other side edge 2b of the relatively large area input bump region 6 be longer than the distance A from the one side edge 2a of the output bump region 4.

When the input bump region 6 is formed 4% or more of the IC width W from the other side edge 2b, the flexible substrate 16 is adjacent to the anisotropic conductive film on the circuit substrate 14 as shown in FIG. When the connection is made via 10, the connection position between the input bump 5 and the electrode terminal 15 is separated from the thermocompression bonding head 17 which thermally pressurizes the flexible substrate 16. Therefore, it is possible to prevent deterioration in connectivity due to heat radiation from the thermocompression bonding head 17 after the IC chip 1 is connected.

[Dummy bump]
As shown in FIG. 3, in the IC chip 1, a dummy bump region 19 in which so-called dummy bumps 18 that are not used for inputting/outputting signals and the like are arranged is appropriately provided between the output bump region 4 and the input bump region 6. May be.

[adhesive]
An anisotropic conductive film 10 (ACF: Anisotropic Conductive Film) can be preferably used as an adhesive for connecting the IC chip 1 to the circuit board 14. As shown in FIG. 4, the anisotropic conductive film 10 usually has a binder resin layer (adhesive layer) 13 containing conductive particles 12 formed on a release film 11 serving as a base material. As shown in FIG. 2, the anisotropic conductive film 10 has the binder resin layer 13 interposed between the electrode terminals 15 formed on the circuit board 14 and the IC chip 1, so that the circuit board 14 and the IC chip 1 can be formed. It is used to connect and connect with.

The adhesive composition of the binder resin layer 13 comprises a normal binder component containing, for example, a film forming resin, a thermosetting resin, a latent curing agent, a silane coupling agent and the like.

As the film forming resin, a resin having an average molecular weight of about 10,000 to 80,000 is preferable, and various resins such as an epoxy resin, a modified epoxy resin, a urethane resin, and a phenoxy resin can be particularly mentioned. Above all, a phenoxy resin is preferable from the viewpoint of film formation state, connection reliability and the like.

The thermosetting resin is not particularly limited, and for example, commercially available epoxy resin, acrylic resin, etc. can be used.

The epoxy resin is not particularly limited, for example, naphthalene type epoxy resin, biphenyl type epoxy resin, phenol novolac type epoxy resin, bisphenol type epoxy resin, stilbene type epoxy resin, triphenolmethane type epoxy resin, phenol aralkyl type epoxy resin. , Naphthol type epoxy resin, dicyclopentadiene type epoxy resin, triphenylmethane type epoxy resin and the like. These may be used alone or in combination of two or more.

The acrylic resin is not particularly limited, and an acrylic compound, liquid acrylate or the like can be appropriately selected according to the purpose. For example, methyl acrylate, ethyl acrylate, isopropyl acrylate, isobutyl acrylate, epoxy acrylate, ethylene glycol diacrylate, diethylene glycol diacrylate, trimethylol propane triacrylate, dimethylol tricyclodecane diacrylate, tetramethylene glycol tetraacrylate, 2-hydroxy- 1,3-Diacryloxypropane, 2,2-bis[4-(acryloxymethoxy)phenyl]propane, 2,2-bis[4-(acryloxyethoxy)phenyl]propane, dicyclopentenyl acrylate, tricyclo Examples thereof include decanyl acrylate, tris(acryloxyethyl) isocyanurate, urethane acrylate, and epoxy acrylate. In addition, it is also possible to use one obtained by converting acrylate into methacrylate. These may be used alone or in combination of two or more.

The latent curing agent is not particularly limited, and examples thereof include a heat curing type curing agent. The latent curing agent does not usually react, but is activated by various triggers selected according to the application such as heat, light, and pressure, and starts the reaction. The activation method of the heat-activatable latent curing agent is a method of generating active species (cation, anion, radical) by a dissociation reaction by heating, etc. There are a method of initiating a curing reaction by being compatible with and dissolving with a resin, a method of eluting a molecular sieve-encapsulating type curing agent at a high temperature to initiate a curing reaction, an elution/curing method using microcapsules, and the like. Examples of the heat-activatable latent curing agent include imidazole-based, hydrazide-based, boron trifluoride-amine complex, sulfonium salt, amine imide, polyamine salt, dicyandiamide, and modified products thereof, which may be used alone or in combination. It may be a mixture of the above. As the radical polymerization initiator, known ones can be used, and among them, organic peroxides can be preferably used.

The silane coupling agent is not particularly limited, and examples thereof include epoxy type, amino type, mercapto sulfide type, and ureide type. The addition of the silane coupling agent improves the adhesiveness at the interface between the organic material and the inorganic material.

[Conductive particles]
Examples of the conductive particles 12 contained in the binder resin layer 13 include any known conductive particles used in anisotropic conductive films. That is, as the conductive particles, for example, particles of various metals or metal alloys such as nickel, iron, copper, aluminum, tin, lead, chromium, cobalt, silver and gold, metal oxides, carbon, graphite, glass, ceramics. , Particles of plastic or the like whose surface is coated with a metal, or particles whose surface is further coated with an insulating thin film. When the surface of the resin particles is coated with a metal, examples of the resin particles include epoxy resin, phenol resin, acrylic resin, acrylonitrile styrene (AS) resin, benzoguanamine resin, divinylbenzene resin, styrene resin and the like. Particles can be mentioned.

The adhesive composition forming the binder resin layer 13 is not limited to the case where the film forming resin, the thermosetting resin, the latent curing agent, the silane coupling agent, and the like are contained as described above, and a usual anisotropic conductive material is used. It may be composed of any material used as the adhesive composition of the film.

The release film 11 that supports the binder resin layer 13 is made of, for example, PET (Poly Ethylene Terephthalate), OPP (Oriented Polypropylene), PMP (Poly-4-methylpentene-1), PTFE (Polytetrafluoroethylene), or other release agent such as silicone. After being applied, the anisotropic conductive film 10 is prevented from drying and the shape of the anisotropic conductive film 10 is maintained.

The anisotropic conductive film 10 may be manufactured by any method, but for example, it can be manufactured by the following method. An adhesive composition containing a film forming resin, a thermosetting resin, a latent curing agent, a silane coupling agent, conductive particles and the like is prepared. An anisotropic conductive film 10 in which the binder resin layer 13 is supported on the release film 11 by applying the adjusted adhesive composition onto the release film 11 using a bar coater, a coating device, etc. and drying it in an oven or the like. To get

Further, in the above-described embodiment, the adhesive film formed by molding the thermosetting resin composition containing the conductive particles 12 in the binder resin layer 13 into the film as an adhesive has been described as an example. The adhesive is not limited to this, and may be, for example, an insulating adhesive film including only the binder resin layer 13. Further, the adhesive according to the present invention may have a structure in which an insulating adhesive layer composed only of the binder resin layer 13 and a conductive particle-containing layer composed of the binder resin layer 13 containing the conductive particles 12 are laminated. it can. The adhesive is not limited to such a film-formed adhesive film, but an electrically conductive adhesive paste in which electrically conductive particles 12 are dispersed in a binder resin composition, or an insulating adhesive made of only the binder resin composition. It may be a paste. The adhesive according to the present invention includes any of the forms described above.

[Connection process]
Next, a connecting step of connecting the IC chip 1 to the circuit board 14 will be described. First, the anisotropic conductive film 10 is temporarily attached to the mounting portion of the circuit board 14 on which the electrode terminals 15 are formed. Next, the circuit board 14 is placed on the stage of the connection device, and the IC chip 1 is placed on the mounting portion of the circuit board 14 with the anisotropic conductive film 10 interposed therebetween.

Next, the thermocompression-bonding head 17 heated to a predetermined temperature for curing the binder resin layer 13 applies heat and pressure onto the IC chip 1 at a predetermined pressure for a predetermined time. As a result, the binder resin layer 13 of the anisotropic conductive film 10 exhibits fluidity, flows out from between the mounting surface 2 of the IC chip 1 and the mounting portion of the circuit board 14, and the conductive particles in the binder resin layer 13 are discharged. 12 is clamped by being sandwiched between the output bumps 3 and input bumps 5 of the IC chip 1 and the electrode terminals 15 of the circuit board 14.

At this time, according to the IC chip 1 to which the present invention is applied, the output bump region 4 is formed inward from one side edge 2a by a distance of 4% or more with respect to the IC width W. 4, the pressure gradient formed across the width direction is leveled, the pressing force by the thermocompression bonding head 17 is applied substantially uniformly over the entire output bump region 4, and the pressing force is insufficient on the side edge 2a side. Is prevented.

As a result, the output bumps 3 and the input bumps 5 and the electrode terminals 15 of the circuit board 14 are electrically connected by sandwiching the conductive particles 12, and the binder resin heated by the thermocompression bonding head 17 in this state. Hardens. Therefore, the IC chip 1 can surely secure the electrical continuity with the electrode terminal 15 formed on the circuit board 14 even in the output bump 3 on the side edge 2a side.

The conductive particles 12 that are not between the output bumps 3 and the input bumps 5 and the electrode terminals 15 are dispersed in the binder resin and maintain an electrically insulated state. As a result, electrical conduction is achieved only between the output bumps 3 and the input bumps 5 of the IC chip 1 and the electrode terminals 15 of the circuit board 14. By using a radical polymerization reaction type fast curing type binder resin, the binder resin can be quickly cured even with a short heating time. Further, the anisotropic conductive film 10 is not limited to the thermosetting type, and a photosetting type or a photothermal combined type adhesive may be used as long as it makes a pressure connection.

Next, examples of the present invention will be described. In this example, an IC chip having an area difference between the output bump region and the input bump region and asymmetrically arranged on the mounting surface was used to manufacture a connector sample connected to a circuit board via an anisotropic conductive film. did. In the IC chips according to the examples and the comparative examples, the IC width and the distance A from one side edge 2a of the mounting surface to the output bump region are different, and the conduction resistance values of the output bump and the input bump in the connection body sample are measured. ,evaluated.

The IC chips according to the example and the comparative example have output bump regions 4 in which output bumps 3 are arranged along a pair of side edges 2a and 2b facing each other in the length direction of the mounting surface 2 having a substantially rectangular shape. An input bump region 6 in which the input bumps 5 are arranged is formed. In the IC chip 1, the output bump region 4 is formed on one side edge 2a side of the mounting surface 2 and the input bump region 6 is formed on the other side edge 2b side of the mounting surface 2. As a result, the IC chip 1 is formed such that the output bump region 4 and the input bump region 6 are separated from each other in the width direction of the mounting surface (see FIG. 1).

In the output bump area 4, a plurality of output bumps 3 having the same shape are arranged in a zigzag pattern in three rows along the longitudinal direction of the mounting surface 2. The output bumps formed in the output bump region 4 are divided into rows, and the output bump rows 3A, 3B, and 3C are sequentially arranged from the side edge 2a. The output bumps 3 formed in each row have a rectangular shape (area: 1437.5 μm ² , width: 12.5 μm, length: 115 μm), and 1276 output bump rows 3A, 3B, 3C are arranged. There is. The total area of the output bumps 3 in each of the bump rows 3A, 3B, 3C is 1834250 μm ² . The total area of the output bump region 4 is 12919500 μm ² (width: 31900 μm, length: 405 μm).

In the input bump region 6, a plurality of input bumps 5 formed in the same shape are arranged in a row along the longitudinal direction of the mounting surface 2. One input bump row formed in the input bump area 6 is referred to as an input bump row 5A. The input bumps 5 arranged in the input bump row 5A have a rectangular shape (area: 3600 μm ² , width: 45.0 μm, length: 80 μm), and 515 are arranged. The total area of the input bumps 5 in the input bump row 5A is 1854000 μm ² . The total area of the input bump region 6 is 2553040 μm ² (width: 31913 μm, length: 80 μm).

The IC chip according to the first embodiment has an IC width W of 1.5 mm between the side edges 2a and 2b of the mounting surface 2 facing each other, and an IC length of 32 mm in the arrangement direction of the input/output bumps 3 and 5. .. The distance A from the one side edge 2a to the output bump region 4 is 150 μm, which is 10% of the IC width W (1.5 mm). Further, in the IC chip according to Example 1, no dummy bump region is provided between the output bump region 4 and the input bump region 6, and the distance B from the other side edge 2b to the input bump region 6 is 50 μm. ..

The IC chip according to the second embodiment has the same conditions as those of the first embodiment except that the distance A from the one side edge 2a to the output bump region 4 is 100 μm. The distance A in Example 2 is 6.6% with respect to the IC width W (1.5 mm).

The IC chip according to the third embodiment has the same conditions as the first embodiment except that the distance A from the one side edge 2a to the output bump region 4 is 75 μm. The distance A in Example 3 is 5.0% with respect to the IC width W (1.5 mm).

The IC chip according to the fourth embodiment has the same conditions as the first embodiment except that the distance A from the one side edge 2a to the output bump region 4 is 62.5 μm. The distance A in Example 4 is 4.2% with respect to the IC width W (1.5 mm).

The IC chip according to Example 5 has an IC width W of 2.0 mm between the opposite side edges 2a and 2b of the mounting surface 2 and an IC length of 32 mm in the arrangement direction of the input/output bumps 3 and 5. .. The distance A from the one side edge 2a to the output bump region 4 is 83 μm, which is 4.2% of the IC width W (2.0 mm). In the IC chip according to the fifth embodiment, no dummy bump region is provided between the output bump region 4 and the input bump region 6, and the distance B from the other side edge 2b to the input bump region 6 is 50 μm. ..

The IC chip according to Example 6 has an IC width W of 3.0 mm between the opposite side edges 2a and 2b of the mounting surface 2 and an IC length of 32 mm in the arrangement direction of the input/output bumps 3 and 5. .. The distance A from the one side edge 2a to the output bump region 4 is 125 μm, which is 4.2% of the IC width W (3.0 mm). Further, in the IC chip according to Example 6, no dummy bump region is provided between the output bump region 4 and the input bump region 6, and the distance B from the other side edge 2b to the input bump region 6 is 50 μm. ..

The IC chip according to Comparative Example 1 was subjected to the same conditions as in Example 1 except that the distance A from one side edge 2a to the output bump region 4 was 50 μm. The distance A in Comparative Example 1 is 3.3% with respect to the IC width W (1.5 mm).

The IC chip according to Comparative Example 2 has the same conditions as those of Comparative Example 1 except that the dummy bump region D is provided between the output bump region 4 and the input bump region 6. In the dummy bump region D, the dummy bumps are arranged in one row in the length direction of the IC chip. Each dummy bump has a rectangular shape (area: 1250 μm ² , width: 12.5 μm, length: 100 μm), and 1276 pieces are arranged. The total area of the dummy bumps in the dummy bump row D is 1595,000 μm ² . The total area of the dummy bump region D is 310000000 μm ² (width: 31900 μm, length: 100 μm).

The IC chip according to Comparative Example 3 has an IC width W of 1.2 mm between the opposite side edges 2 a and 2 b of the mounting surface 2 and an IC length of 32 mm in the arrangement direction of the input/output bumps 3 and 5. .. The distance A from one side edge 2a to the output bump region 4 is 40 μm, which is 3.3% of the IC width W (1.2 mm). Further, in the IC chip according to Comparative Example 3, no dummy bump region is provided between the output bump region 4 and the input bump region 6, and the distance B from the other side edge 2b to the input bump region 6 is 50 μm. ..

The IC chips according to Examples 1 to 6 and Comparative Examples 1 to 3 are connected to a circuit board via an anisotropic conductive film (trade name CP36931-18AJ: manufactured by Dexerials Co., Ltd.) to manufacture a connected body sample. did. The connection conditions are 150° C., 130 MPa, and 5 sec. For each connection sample, the conduction resistance in the output bump rows 3A, 3B, 3C and the input bump row 5A was measured using the 4-terminal method. As a result of the measurement, the case where the conduction resistance was 1.0Ω or less was OK, and the case where it was more than 1.0Ω was NG. The measurement results are shown in Table 1.

As shown in Table 1, in Examples 1 to 6, the conduction resistance was 1.0Ω or less in all of the output bump rows 3A, 3B, 3C and the input bump row 5A, and they were arranged on one side edge 2a side. It can be seen that the respective output bumps 3 of the existing output bump row 3A could be pressed in with a sufficient pressing force. This is because in Examples 1 to 6, the distance A from the one side edge 2a to the output bump region 4 was set to 4% or more of the IC width W, so that the pressure gradient across the width of the output bump region 4 was set. Due to being leveled.

On the other hand, in Comparative Example 1, the conduction resistance in the output bump rows 3A and 3B increased. This is because the distance A from the one side edge 2a to the output bump region 4 was 3.3% of the IC width W, so that the pressure gradient of the thermocompression bonding head becomes weaker toward the outer output bump row. It became. From this, it is understood that the distance A from the one side edge 2a to the output bump region 4 is preferably set to 4% or more of the IC width W.

Further, in Comparative Example 2, the dummy bump region D is provided between the output bump region 4 and the input bump region 6, but the conduction resistance in the output bump rows 3A and 3B becomes high. From this, when the distance A from the one side edge 2a to the output bump region 4 is 3.3% of the IC width W, by forming the dummy bumps, the pressure enough to improve the conductivity in the outer bump row is obtained. It can be seen that it is difficult to obtain the gradient.

From Examples 5 and 6, by setting the distance A from the one side edge 2a to the output bump region 4 to 4% or more of the IC width W, the conductivity in the outer bump row can be maintained even if the IC width is widened. It can be seen that an improved pressure gradient is obtained.

1 IC chip, 2 mounting surface, 2a one side edge, 2b other side edge, 3 output bump, 4 output bump area, 5 input bump, 6 input bump area, 10 anisotropic conductive film, 11 release film, 12 Conductive particles, 13 binder resin layer, 14 circuit board, 15 electrode terminals, 17 thermocompression bonding head

Claims (13)

An output bump region in which output bumps are arranged is provided near one side of a pair of opposite side edges, and an input bump region in which input bumps are arranged is provided near the other side of the pair of side edges. The
The output bump area and the input bump area, the output bump and the input bump are arranged in a different number of bump rows, and arranged asymmetrically,
One of the output bump region or the input bump region, which has a larger number of bump rows, is closer to the inside of the one or the other side edge by a distance of 4% or more and 10% or less of the width between the pair of side edges. Electronic components formed on. Of the output bump area and the input bump area, the distance A between one bump area having a large number of bump rows and the one or the other side edge adjacent to the one bump area, and the other having a small number of bump rows. The electronic component according to claim 1, wherein a distance B between the bump region and the other side edge or one side edge adjacent to the other bump area has the following relationship.
(A−B)/A=0.2 to 0.6 Of the output bump area and the input bump area, the distance A between one bump area having a large number of bump rows and the one or the other side edge adjacent to the one bump area, and the other having a small number of bump rows. The electronic component according to claim 1, wherein a distance B between the bump region and the other or one side edge adjacent to the other bump region and a width W between the pair of side edges have the following relationship.
(A−B)/W=0.008 to 0.07 An output bump region in which output bumps are arranged is provided near one side of a pair of opposite side edges, and an input bump region in which input bumps are arranged is provided near the other side of the pair of side edges. The
The output bump area and the input bump area, the output bump and the input bump are arranged in a different number of bump rows, and arranged asymmetrically,
One of the output bump region or the input bump region, which has a larger number of bump rows, is adjacent to the one or the other side edge by a distance of 4% or more and 30% or less of the width between the pair of side edges. Formed in
Of the output bump area and the input bump area, the distance A between one bump area having a large number of bump rows and the one or the other side edge adjacent to the one bump area, and the other having a small number of bump rows. An electronic component having a bump region and a distance B between the other bump region and the other side edge adjacent to the other bump region having the following relationship.
(A−B)/A=0.2 to 0.6 An output bump region in which output bumps are arranged is provided near one side of a pair of opposite side edges, and an input bump region in which input bumps are arranged is provided near the other side of the pair of side edges. The
The output bump area and the input bump area, the output bump and the input bump are arranged in a different number of bump rows, and arranged asymmetrically,
One of the output bump region or the input bump region, which has a larger number of bump rows, is adjacent to the one or the other side edge by a distance of 4% or more and 30% or less of the width between the pair of side edges. Formed in
Of the output bump area and the input bump area, the distance A between one bump area having a large number of bump rows and the one or the other side edge adjacent to the one bump area, and the other having a small number of bump rows. An electronic component in which a distance B between the bump region and the other or one of the side edges adjacent to the other bump region and a width W between the pair of side edges have the following relationship.
(A−B)/W=0.008 to 0.07 The output number of the output bump rows of bumps region, electronic component according to any one of the input bump rows claim 1-5 more than the number of the input bump area. The electronic component according to claim 1, wherein a distance from the one side edge to the output bump area is longer than a distance from the other side edge to the input bump area. The electronic component according to claim 1, wherein a distance from the other side edge to the input bump area is longer than a distance from the one side edge to the output bump area. Above the electronic component mounting surface of, between said input bump region and the output bumps region, electronic component according to any one of claims 1 to 8, dummy bumps are formed. The electronic component is an electronic component according to any one of claims 1 to 9 which is a IC chip. An electronic component is arranged on a circuit board via an adhesive, and is pressed by a pressure tool, whereby in the connection body in which the electronic component is connected to the circuit board,
The said electronic component is a connection body which is the electronic component of any one of said Claims 1-10 . An electronic component is arranged on a circuit board via an adhesive, and a method for manufacturing a connection body for connecting the electronic component on the circuit board by applying pressure with a pressure tool,
The said electronic component is a manufacturing method of the connection body which is the electronic component of any one of said Claims 1-10 . An electronic component is arranged on a circuit board via an adhesive, and a method of connecting the electronic component by connecting the electronic component on the circuit board by applying pressure with a pressure tool,
The said electronic component is a connection method of the electronic component which is the electronic component of any one of said Claims 1-10 .