JP3649042B2 - IC chip connection method and liquid crystal device manufacturing method - Google Patents

IC chip connection method and liquid crystal device manufacturing method Download PDF

Info

Publication number
JP3649042B2
JP3649042B2 JP14971299A JP14971299A JP3649042B2 JP 3649042 B2 JP3649042 B2 JP 3649042B2 JP 14971299 A JP14971299 A JP 14971299A JP 14971299 A JP14971299 A JP 14971299A JP 3649042 B2 JP3649042 B2 JP 3649042B2
Authority
JP
Japan
Prior art keywords
chip
side terminal
liquid crystal
substrate
center line
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP14971299A
Other languages
Japanese (ja)
Other versions
JP2000340613A (en
Inventor
憲治 内山
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Original Assignee
Seiko Epson Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp filed Critical Seiko Epson Corp
Priority to JP14971299A priority Critical patent/JP3649042B2/en
Publication of JP2000340613A publication Critical patent/JP2000340613A/en
Application granted granted Critical
Publication of JP3649042B2 publication Critical patent/JP3649042B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73203—Bump and layer connectors
    • H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector

Description

【０００１】
【発明の属する技術分野】
本発明は、ＩＣチップに設けられたＩＣ側端子と、基板に設けられた基板側端子とを導電接続するＩＣチップの接続方法及び液晶装置の製造方法に関する。
【０００２】
【従来の技術】
ＩＣチップを例えば液晶装置の基板上に実装する方法として、従来、いわゆるフリップチップ方式の実装方法が知られている。この実装方法では、バンプ等といったＩＣ側端子がＩＣチップの１つの面に複数個集められ、これらのＩＣ側端子が基板上に設けられた複数の基板側端子に個々に導電接続される。
【０００３】
図４は従来広く知られているフリップチップ方式のＩＣチップ５１をその能動面５１ａ側から見た状態を示している。多くのフリップチップ方式のＩＣチップ５１においては、図示の通り、その能動面５１ａに複数のバンプ５２がまとめて形成され、これらのバンプ５２は互いに対向する一対のバンプ列Ｒ１及びＲ２を形成するのが一般的である。そして、それらのバンプ列間の中心線Ｌ１は、ＩＣチップ５１の外形Ｇの中心線Ｌ０に一致するのが通常であった。
【０００４】
従来、ＩＣチップ５１を基板上に接続する際には、一般に、ＩＣチップ５１を加圧ヘッドによって基板に押し付けてそのＩＣチップ５１を基板に接着する。そしてその場合、加圧ヘッドは、その押圧中心線がＩＣチップ５１の外形の中心線Ｌ０に一致する状態でＩＣチップ５１を押圧するように設定されていた。
【０００５】
【発明が解決しようとする課題】
しかしながら最近では、バンプ列Ｒ１及びバンプ列Ｒ２の中心線Ｌ１がＩＣ外形Ｇの中心線Ｌ０に一致しない構造のＩＣチップが製造されるようになってきた。このようなＩＣチップのバンプを上記従来の接続方法によって基板上の端子に接続しようとすると、加圧ヘッドはＩＣチップの外形中心線を押圧するものの、その押圧点はバンプ列間の中心線からずれているので、全てのバンプに対して均一な押圧力を加えることができず、一部のバンプに対しては十分な押圧力が加えられる反面、他のバンプに対しては不十分な押圧力しか加わらず、その結果、ＩＣチップと基板との間の接続信頼性が低下するという問題があった。
【０００６】
本発明は、上記の問題点に鑑みて成されたものであって、バンプ等といったＩＣ側端子に関する中心線がＩＣチップの外形の中心線からずれる構造のＩＣチップを基板に実装する際に、個々のＩＣ側端子にほぼ均一な押圧力が加わるようにして導電接続の信頼性を向上することを目的とする。
【０００７】
【課題を解決するための手段】
（１） 上記の目的を達成するため、本発明に係るＩＣチップの接続方法及び液晶装置の製造方法は、ＩＣチップに設けられたＩＣ側端子と、基板に設けられた基板側端子とを導電接続するＩＣチップの接続方法であって、前記ＩＣ側端子は互いに対向する一対の端子列を形成し且つその端子列間の中心線は前記ＩＣチップの外形中心線からずれている構造のＩＣチップの接続方法において、前記ＩＣチップと前記基板との間に接着用材料を介在させ、加圧ヘッドの押圧中心が前記ＩＣ側端子列間の中心線にほぼ一致する状態でその加圧ヘッドによって前記ＩＣチップを押圧することを特徴とする。
【０００８】
このＩＣチップの接続方法及び液晶装置の製造方法によれば、加圧ヘッドの押圧中心が常にＩＣ側端子列間の中心線にほぼ一致するので、加圧ヘッドから複数のＩＣ側端子に加わる押圧力は全てのＩＣ側端子の個々に関して正確にほぼ均一になり、よって、ＩＣ側端子と基板側端子との間の導電接続の接続信頼性を高く維持することができる。
【０００９】
（２） 上記構成のＩＣチップの接続方法及び液晶装置の製造方法においては、前記接着用材料として非導電性接着剤を用いることができる。この非導電性接着剤としては、エポキシ系、アクリル系、ウレタン系といった各種の接着剤が考えられる。非導電性接着剤を用いる場合は、前記ＩＣ側端子と前記基板側端子とは互いに直接に接触することによって両者間の導電接続が達成される。
【００１０】
（３） 上記（１）記載のＩＣチップの接続方法及び液晶装置の製造方法においては、前記接着用材料としてＡＣＦ（Anisotropic Conductive Film ：異方性導電膜）を用いることができる。このＡＣＦは、例えば樹脂フィルムの中に導電粒子を分散させることによって形成されるフィルム状の接着用材料である。このＡＣＦを用いる場合は、前記ＩＣ側端子と前記基板側端子とは前記導電粒子を通して導電接続される。
【００１１】
（４） 上記（１）記載のＩＣチップの接続方法及び液晶装置の製造方法においては、前記接着用材料として等方性導電ペースト、例えば銀ペーストを用いることができる。そしてこの場合には、前記ＩＣ側端子と前記基板側端子とはその等方性導電ペーストを通して導電接続される。
【００１２】
【発明の実施の形態】
以下、添付図面を参照して、本発明によるＩＣチップの接続方法及び液晶装置の製造方法の実施の形態を、ＩＣチップとしての液晶駆動用ＩＣを液晶パネルの基板上に接続する場合を例として説明する。
【００１３】
図１は、本発明に係るＩＣチップの接続方法及び液晶装置の製造方法の一実施形態を示している。この実施形態は、ＩＣチップとしての液晶駆動用ＩＣ１に設けられるＩＣ側端子としての複数のバンプ２を、液晶パネル３を構成する一方の基板４ａ上に形成された複数の基板側端子６のそれぞれに導電接続するための方法である。
【００１４】
液晶パネル３は互いに対向する一対の基板４ａ及び４ｂを有し、これらの基板はシール材７によってそれらの周囲が互いに接着される。これらの基板４ａ及び４ｂは、例えばガラス等といった硬質な光透過性材料や、プラスチック等といった可撓性を有する光透過性材料等によって形成された基板素材に電極その他の必要要素を形成することによって作製される。
【００１５】
図２において、第１基板４ａの基板素材８ａの液晶側表面、すなわち第２基板４ｂに対向する面には、例えばコモン電極として作用する第１電極９ａが所定のパターンに形成され、その上にオーバーコート層１１ａが形成され、さらにその上に配向膜１２ａが形成される。また、第１基板４ａに対向する第２基板４ｂの液晶側表面、すなわち第１基板４ａに対向する面には、例えばセグメント電極として作用する第２電極９ｂが所定のパターンに形成され、その上にオーバーコート層１１ｂが形成され、さらにその上に配向膜１２ｂが形成される。
【００１６】
第１電極９ａ及び第２電極９ｂは、例えばＩＴＯ（Indium Tin Oxide）等の透明電極によって１０００オングストローム程度の厚さに形成され、オーバーコート層１１ａ及び１１ｂは、例えば酸化珪素、酸化チタン又はそれらの混合物等によって８００オングストローム程度の厚さに形成され、そして配向膜１２ａ及び１２ｂは、例えばポリイミド系樹脂によって８００オングストローム程度の厚さに形成される。
【００１７】
第１電極９ａは複数の直線パターンを互いに平行に配列することによって、いわゆるストライプ状に形成され、一方、第２電極９ｂは上記第１電極９ａに交差するように複数の直線パターンを互いに平行に配列することによって、やはりストライプ状に形成される。これらの電極９ａと電極９ｂとがドットマトリクス状に交差する複数の点が、像を表示するための画素を形成する。
【００１８】
以上のようにして形成された第１基板４ａ及び第２基板４ｂのいずれか一方の液晶側表面には複数のスペーサ１３が分散され、さらにいずれか一方の基板の液晶側表面にシール材７が例えば印刷等によって図１に示すように枠状に設けられる。このシール材７の内部には図２に示すように導通材１６が分散される。次に、シール材７を挟んで両基板４ａ及び４ｂを互いに貼り合わせ、さらに所定の温度で加熱することにより、シール材７によって両基板４ａ及び４ｂを接合する。
【００１９】
両基板４ａ及び４ｂの間にはスペーサ１３によって保持される均一な寸法、例えば５μｍ程度の間隙、いわゆるセルギャップが形成され、シール材７の一部に設けた液晶注入口７ａ（図１参照）を通してそのセルギャップ内に液晶１４が注入され、その注入の完了後、液晶注入口７ａが樹脂等によって封止される。
【００２０】
図１において、第１基板４ａは第２基板４ｂの外側へ張り出す張出し部４ｃを有し、第１基板４ａ上の第１電極９ａはその張出し部４ｃへ直接に延び出て基板側端子６となっている。また、第２基板４ｂ上の第２電極９ｂは、シール材７の内部に分散した導通材１６（図２参照）を介して、張出し部４ｃ上の基板側端子６に接続している。
【００２１】
なお、各電極９ａ及び９ｂ並びにそれらから延びる基板側端子６は、実際には極めて狭い間隔で多数本がそれぞれの基板４ａ及び４ｂの表面全域に形成されるが、図１では構造を分かり易く示すために実際の間隔よりも広い間隔でそれらの電極等を模式的に図示し、さらに一部の電極の図示は省略してある。また、液晶が封入される領域内の電極９ａ及び９ｂは、直線状に形成されることに限られず、適宜のパターン状に形成されることもある。
【００２２】
液晶駆動用ＩＣ１を基板４ａの張出し部４ｃの上に実装するに際しては、まず、液晶駆動用ＩＣ１を実装すべき領域であってそのＩＣ１とほぼ同じ面積の領域であるＩＣ実装領域Ｊに、接着用材料としてのＡＣＦ（Anisotropic Conductive Film ）１７を貼着し、次いで液晶駆動用ＩＣ１のバンプ２が形成された面、すなわち能動面１ａをＡＣＦ１７に貼り付けて、液晶駆動用ＩＣ１をＩＣ実装領域Ｊに仮装着する。
【００２３】
ＡＣＦ１７は、周知の通り、一対の端子間を異方性を持たせて電気的に一括接続するために用いられる導電性のある高分子フィルムであって、例えば図２に示すように、熱可塑性又は熱硬化性の樹脂フィルム１８の中に多数の導電粒子１９を分散させることによって形成される。
【００２４】
このＡＣＦ１７を挟んで基板張出し部４ｃと液晶駆動用ＩＣ１とを熱圧着することにより、液晶駆動用ＩＣ１のバンプ２と基板張出し部４ｃ上の基板側端子６との間において単一方向の導電性を持つ接続を実現する。ここにいう熱圧着とは、接着対象物である液晶駆動用ＩＣ１と基板張出し部４ｃとの間にＡＣＦ１７を挟んだ状態でそれら液晶駆動用ＩＣ１と基板張出し部４ｃとを加圧して接着することである。
【００２５】
液晶駆動用ＩＣ１と基板４ａとを加圧するため、本実施形態では、図１に示すように液晶パネル３をテーブル２３の上に載せた状態で、加圧ヘッド２２を矢印Ａのように液晶駆動用ＩＣ１へ向けて移動させながら、その加圧ヘッド２２によって液晶駆動用ＩＣ１を基板４ａの張出し部４ｃへ押し付ける。なお、加圧ヘッド２２は図示しないヒータによって所定温度に加熱され、この熱によりＡＣＦ１７が所定温度に加熱される。
【００２６】
以上のように構成された液晶パネルに関しては、さらに図２に鎖線で示すように、基板４ａ及び基板４ｂの外側表面にそれぞれ偏光板２１ａ及び２１ｂが貼着される。液晶駆動用ＩＣ１によって、第１電極９ａ又は第２電極９ｂのいずれか一方に対して行ごとに走査電圧を印加し、さらにそれらの電極の他方に対して表示画像に基づいたデータ電圧を画素ごとに印加することにより、両電圧の印加によって選択された各画素部分を通過する光を変調し、もって基板４ａ又は４ｂの外側に文字、数字等といった像を表示する。
【００２７】
本実施形態で用いる液晶駆動用ＩＣ１について、その能動面１ａを見ると、図３に示す通りである。このＩＣ１では、複数のバンプ２が矩形状の配列パターンで並べられ、その結果、互いに対向する一対の端子列、すなわちバンプ列Ｒ１及びＲ２が形成されている。また、本実施形態のＩＣ１では、特に、外形Ｇの中心線Ｌ０と、バンプ列Ｒ１とバンプ列Ｒ２との間の中心線Ｌ１とが互いに位置的にずれている。
【００２８】
前記のようにして液晶駆動用ＩＣ１を基板４ａの張出し部４ｃのＩＣ実装領域Ｊに実装する際、本実施形態では図２に示すように、加圧ヘッド２２の押圧中心線Ｌ２が液晶駆動用ＩＣ１の外形中心線Ｌ０ではなくて、バンプ列間中心線Ｌ１にほぼ一致する状態で加圧ヘッド２２によって液晶駆動用ＩＣ１を押圧するように設定されている。
【００２９】
ここで、加圧ヘッド２２の押圧中心線Ｌ２は、加圧ヘッド２２の加圧面の中心線とすることができ、あるいは、加圧ヘッド２２の押圧力が集中的に作用する線とすることもできる。
【００３０】
以上のように加圧ヘッド２２の押圧中心線Ｌ２を液晶駆動用ＩＣ１のバンプ列間中心線Ｌ１に一致させることにより、本実施形態のようにバンプ列間中心線Ｌ１と液晶駆動用ＩＣ１の外形中心線Ｌ０とが互いに位置ズレして形成される場合、すなわちＩＣ１のバンプ２がＩＣ１の外形中心線Ｌ０に対して偏在する場合でも、加圧ヘッド１からの加圧力すなわち圧着力を各々のバンプ２に常にほぼ均一に加えることができ、その結果、バンプ２の接続信頼性を向上させることができる。
【００３１】
（その他の実施形態）
以上、好ましい実施形態を挙げて本発明を説明したが、本発明はその実施形態に限定されるものでなく、請求の範囲に記載した発明の範囲内で種々に改変できる。
【００３２】
例えば、図１の実施形態では、液晶パネルを構成する一対の基板の一方にＩＣチップを実装する場合を例に挙げたが、液晶パネルの基板以外の任意の基板、例えば、抵抗、コンデンサ、トランジスタその他の各種電子チップ部品を搭載して成る通常の配線基板の上にＩＣチップを実装する場合にも本発明を適用できる。従って当然のことながら、ＩＣチップは液晶駆動用ＩＣに限られず、任意の回路構成のＩＣチップとすることができる。
【００３３】
また、図１では基板上に１つのＩＣチップを実装する場合を例に挙げたが、複数のＩＣチップを実装する場合にも本発明を適用できることはもちろんである。
【００３４】
また、図１では接着用材料としてＡＣＦを用いたが、これに代えて、エポキシ系、アクリル系、ウレタン系等といった各種の非導電性接着剤や、銀ペースト等といった等方性の導電ペーストや、ペースト状接着剤の中に導電粒子を分散させて成るＡＣＡ（Anisotropic Conductive Adhesive：異方性導電接着剤）等を接着用材料として用いることもできる。
【００３５】
【発明の効果】
本発明に係るＩＣチップの接続方法及び液晶装置の製造方法によれば、加圧ヘッドの押圧中心が常にＩＣ側端子の端子列間の中心線にほぼ一致するので、加圧ヘッドから複数のＩＣ側端子に加わる押圧力は全てのＩＣ側端子の個々に関して正確にほぼ均一になり、よって、ＩＣ側端子と基板側端子との間の導電接続の接続信頼性を高く維持することができる。
【図面の簡単な説明】
【図１】本発明に係るＩＣチップの接続方法及び液晶装置の製造方法の一実施形態を示す斜視図である。
【図２】図１のＩＩ−ＩＩ線に従って液晶パネル等の断面構造を示す断面図である。
【図３】ＩＣチップの一例の能動面を示す平面図である。
【図４】従来のＩＣチップの一例を示す平面図である。
【符号の説明】
１ 液晶駆動用ＩＣ
１ａ 能動面
２ バンプ（ＩＣ側端子）
３ 液晶パネル
４ａ，４ｂ 基板
４ｃ 基板張出し部
６ 基板側端子
７ シール材
７ａ 液晶注入口
９ａ，９ｂ 電極
１４ 液晶
１７ ＡＣＦ（接着用材料）
２２ 加圧ヘッド
２３ テーブル
Ｇ ＩＣチップの外形
Ｊ ＩＣ実装領域
Ｌ０ ＩＣチップの外形中心線
Ｌ１ ＩＣチップのバンプ列間中心線
Ｌ２ 加圧ヘッドの押圧中心線[0001]
BACKGROUND OF THE INVENTION
The present invention relates to an IC chip connection method and a liquid crystal device manufacturing method for conductively connecting an IC side terminal provided on an IC chip and a substrate side terminal provided on a substrate.
[0002]
[Prior art]
As a method for mounting an IC chip on, for example, a substrate of a liquid crystal device, a so-called flip-chip mounting method is conventionally known. In this mounting method, a plurality of IC side terminals such as bumps are gathered on one surface of the IC chip, and these IC side terminals are individually conductively connected to a plurality of substrate side terminals provided on the substrate.
[0003]
FIG. 4 shows a state in which a flip chip type IC chip 51, which has been widely known, is viewed from the active surface 51a side. In many flip-chip type IC chips 51, as shown in the figure, a plurality of bumps 52 are collectively formed on an active surface 51a, and these bumps 52 form a pair of bump rows R1 and R2 facing each other. Is common. The center line L1 between these bump rows usually coincides with the center line L0 of the outer shape G of the IC chip 51.
[0004]
Conventionally, when the IC chip 51 is connected to a substrate, the IC chip 51 is generally pressed against the substrate by a pressure head and bonded to the substrate. In this case, the pressure head is set so as to press the IC chip 51 in a state where the pressing center line coincides with the center line L0 of the outer shape of the IC chip 51.
[0005]
[Problems to be solved by the invention]
However, recently, an IC chip having a structure in which the center line L1 of the bump row R1 and the bump row R2 does not coincide with the center line L0 of the IC outline G has been manufactured. When trying to connect such IC chip bumps to the terminals on the substrate by the above conventional connection method, the pressure head presses the outer center line of the IC chip, but the pressing point is from the center line between the bump rows. Since they are misaligned, a uniform pressing force cannot be applied to all the bumps, and a sufficient pressing force can be applied to some bumps, but insufficient pressing to other bumps. Only the pressure is applied, and as a result, there is a problem that the connection reliability between the IC chip and the substrate is lowered.
[0006]
The present invention has been made in view of the above problems, and when mounting an IC chip having a structure in which a center line related to an IC side terminal such as a bump is deviated from a center line of the outer shape of the IC chip on a substrate, An object is to improve the reliability of conductive connection by applying a substantially uniform pressing force to each IC-side terminal.
[0007]
[Means for Solving the Problems]
(1) In order to achieve the above object, an IC chip connection method and a liquid crystal device manufacturing method according to the present invention electrically conduct an IC side terminal provided on an IC chip and a substrate side terminal provided on a substrate. A method of connecting IC chips to be connected, wherein the IC side terminals form a pair of terminal rows facing each other, and a center line between the terminal rows is shifted from an outer shape center line of the IC chip In this connection method, an adhesive material is interposed between the IC chip and the substrate, and the pressing head of the pressing head substantially matches the center line between the IC-side terminal rows. The IC chip is pressed.
[0008]
According to this IC chip connection method and liquid crystal device manufacturing method, the pressing center of the pressure head always coincides with the center line between the IC side terminal rows, and therefore, the pressing force applied from the pressure head to the plurality of IC side terminals. The pressure is accurately and substantially uniform with respect to each of all the IC side terminals, so that the connection reliability of the conductive connection between the IC side terminal and the board side terminal can be kept high.
[0009]
(2) In the IC chip connection method and the liquid crystal device manufacturing method configured as described above, a non-conductive adhesive can be used as the bonding material. As this non-conductive adhesive, various adhesives such as epoxy, acrylic and urethane can be considered. In the case of using a non-conductive adhesive, the IC side terminal and the substrate side terminal are in direct contact with each other to achieve a conductive connection therebetween.
[0010]
(3) In the IC chip connection method and the liquid crystal device manufacturing method described in (1) above, an ACF (Anisotropic Conductive Film) can be used as the adhesive material. This ACF is a film-like adhesive material formed by, for example, dispersing conductive particles in a resin film. When this ACF is used, the IC side terminal and the substrate side terminal are conductively connected through the conductive particles.
[0011]
(4) In the IC chip connection method and the liquid crystal device manufacturing method described in (1) above, an isotropic conductive paste, for example, a silver paste, can be used as the adhesive material. In this case, the IC side terminal and the substrate side terminal are conductively connected through the isotropic conductive paste.
[0012]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, with reference to the attached drawings, an embodiment of an IC chip connecting method and a liquid crystal device manufacturing method according to the present invention will be described by way of an example in which a liquid crystal driving IC as an IC chip is connected to a substrate of a liquid crystal panel. explain.
[0013]
FIG. 1 shows an embodiment of an IC chip connection method and a liquid crystal device manufacturing method according to the present invention. In this embodiment, a plurality of bumps 2 as IC side terminals provided on a liquid crystal driving IC 1 as an IC chip are respectively provided on a plurality of substrate side terminals 6 formed on one substrate 4 a constituting the liquid crystal panel 3. This is a method for conducting a conductive connection.
[0014]
The liquid crystal panel 3 has a pair of substrates 4 a and 4 b facing each other, and these substrates are bonded to each other by a sealing material 7. These substrates 4a and 4b are formed by forming electrodes and other necessary elements on a substrate material formed of a hard light-transmitting material such as glass, or a light-transmitting material having flexibility such as plastic. Produced.
[0015]
In FIG. 2, a first electrode 9a acting as a common electrode, for example, is formed in a predetermined pattern on the liquid crystal side surface of the substrate material 8a of the first substrate 4a, that is, the surface facing the second substrate 4b. An overcoat layer 11a is formed, and an alignment film 12a is further formed thereon. Further, on the liquid crystal side surface of the second substrate 4b facing the first substrate 4a, that is, the surface facing the first substrate 4a, for example, a second electrode 9b acting as a segment electrode is formed in a predetermined pattern. Then, an overcoat layer 11b is formed, and an alignment film 12b is further formed thereon.
[0016]
The first electrode 9a and the second electrode 9b are formed to a thickness of about 1000 angstroms by a transparent electrode such as ITO (Indium Tin Oxide), for example, and the overcoat layers 11a and 11b are made of, for example, silicon oxide, titanium oxide, or their The alignment film 12a and 12b are formed to a thickness of about 800 Å by a polyimide resin, for example.
[0017]
The first electrode 9a is formed in a so-called stripe shape by arranging a plurality of linear patterns in parallel with each other, while the second electrode 9b has a plurality of linear patterns in parallel with each other so as to intersect the first electrode 9a. By arranging, it is also formed in a stripe shape. A plurality of points where these electrodes 9a and 9b intersect in a dot matrix form a pixel for displaying an image.
[0018]
A plurality of spacers 13 are dispersed on the liquid crystal side surface of one of the first substrate 4a and the second substrate 4b formed as described above, and the sealing material 7 is further disposed on the liquid crystal side surface of either one of the substrates. For example, it is provided in a frame shape as shown in FIG. 1 by printing or the like. As shown in FIG. 2, a conductive material 16 is dispersed inside the seal material 7. Next, the substrates 4a and 4b are bonded to each other with the sealing material 7 interposed therebetween, and further heated at a predetermined temperature, so that the substrates 4a and 4b are joined by the sealing material 7.
[0019]
A uniform dimension held by the spacer 13, for example, a gap of about 5 μm, that is, a so-called cell gap is formed between the substrates 4 a and 4 b, and a liquid crystal injection port 7 a provided in a part of the sealing material 7 (see FIG. 1). Then, the liquid crystal 14 is injected into the cell gap, and after the injection is completed, the liquid crystal injection port 7a is sealed with resin or the like.
[0020]
In FIG. 1, the first substrate 4a has an overhanging portion 4c that protrudes to the outside of the second substrate 4b, and the first electrode 9a on the first substrate 4a directly extends to the overhanging portion 4c to form the substrate-side terminal 6. It has become. Further, the second electrode 9b on the second substrate 4b is connected to the substrate-side terminal 6 on the overhanging portion 4c through a conductive material 16 (see FIG. 2) dispersed inside the sealing material 7.
[0021]
The electrodes 9a and 9b and the substrate-side terminals 6 extending from them are actually formed at a very narrow interval over the entire surface of the substrates 4a and 4b. FIG. 1 shows the structure in an easy-to-understand manner. For this purpose, these electrodes and the like are schematically shown at intervals wider than the actual intervals, and some of the electrodes are not shown. Further, the electrodes 9a and 9b in the region in which the liquid crystal is sealed are not limited to be formed in a straight line shape, and may be formed in an appropriate pattern shape.
[0022]
When mounting the liquid crystal driving IC 1 on the overhanging portion 4c of the substrate 4a, first, the liquid crystal driving IC 1 is bonded to an IC mounting region J which is a region where the liquid crystal driving IC 1 is to be mounted and has almost the same area as the IC 1. ACF (Anisotropic Conductive Film) 17 as a material for the liquid crystal is pasted, and then the surface on which the bumps 2 of the liquid crystal driving IC 1 are formed, that is, the active surface 1a is pasted on the ACF 17 to attach the liquid crystal driving IC 1 to the IC mounting region J Temporarily attach to.
[0023]
As is well known, the ACF 17 is a conductive polymer film that is used to electrically connect together a pair of terminals with anisotropy. For example, as shown in FIG. Alternatively, it is formed by dispersing a large number of conductive particles 19 in a thermosetting resin film 18.
[0024]
The substrate overhanging portion 4c and the liquid crystal driving IC 1 are thermocompression-bonded with the ACF 17 interposed therebetween, whereby the unidirectional conductivity is provided between the bump 2 of the liquid crystal driving IC 1 and the substrate side terminal 6 on the substrate overhanging portion 4c. Realize a connection with The term “thermocompression bonding” as used herein refers to bonding the liquid crystal driving IC 1 and the substrate overhanging portion 4c by applying pressure while the ACF 17 is sandwiched between the liquid crystal driving IC1 and the substrate overhanging portion 4c. It is.
[0025]
In this embodiment, in order to pressurize the liquid crystal driving IC 1 and the substrate 4a, the liquid crystal panel 3 is placed on the table 23 as shown in FIG. The liquid crystal driving IC 1 is pressed against the overhanging portion 4c of the substrate 4a by the pressure head 22 while moving toward the IC 1 for use. The pressure head 22 is heated to a predetermined temperature by a heater (not shown), and the ACF 17 is heated to a predetermined temperature by this heat.
[0026]
As for the liquid crystal panel configured as described above, polarizing plates 21a and 21b are attached to the outer surfaces of the substrate 4a and the substrate 4b, respectively, as indicated by chain lines in FIG. The liquid crystal driving IC 1 applies a scanning voltage for each row to either the first electrode 9a or the second electrode 9b, and further applies a data voltage based on the display image to the other of the electrodes for each pixel. By applying the voltage to the light, the light passing through each pixel portion selected by the application of both voltages is modulated, so that an image such as a character or a number is displayed outside the substrate 4a or 4b.
[0027]
The active surface 1a of the liquid crystal driving IC 1 used in the present embodiment is as shown in FIG. In this IC1, a plurality of bumps 2 are arranged in a rectangular array pattern, and as a result, a pair of terminal rows facing each other, that is, bump rows R1 and R2 are formed. In the IC 1 of the present embodiment, in particular, the center line L0 of the outer shape G and the center line L1 between the bump row R1 and the bump row R2 are displaced from each other.
[0028]
When the liquid crystal driving IC 1 is mounted in the IC mounting region J of the overhanging portion 4c of the substrate 4a as described above, in this embodiment, as shown in FIG. 2, the pressing center line L2 of the pressure head 22 is used for driving the liquid crystal. It is set so that the liquid crystal driving IC 1 is pressed by the pressure head 22 in a state that substantially coincides with the center line L 1 between the bump rows, not the outer shape center line L 0 of the IC 1.
[0029]
Here, the pressing center line L2 of the pressing head 22 can be the center line of the pressing surface of the pressing head 22, or can be a line on which the pressing force of the pressing head 22 acts intensively. it can.
[0030]
As described above, by aligning the pressing center line L2 of the pressure head 22 with the center line L1 between the bump rows of the liquid crystal driving IC 1, the center line L1 between the bump rows and the outer shape of the liquid crystal driving IC 1 as in this embodiment. Even when the center line L0 is displaced from each other, that is, even when the bump 2 of the IC 1 is unevenly distributed with respect to the outer center line L0 of the IC 1, the applied pressure, that is, the pressure bonding force from the pressure head 1 is applied to each bump. 2 can always be added almost uniformly, and as a result, the connection reliability of the bumps 2 can be improved.
[0031]
(Other embodiments)
The present invention has been described with reference to the preferred embodiments. However, the present invention is not limited to the embodiments, and various modifications can be made within the scope of the invention described in the claims.
[0032]
For example, in the embodiment of FIG. 1, the case where an IC chip is mounted on one of a pair of substrates constituting the liquid crystal panel is taken as an example, but any substrate other than the substrate of the liquid crystal panel, for example, a resistor, a capacitor, a transistor The present invention can also be applied to the case where an IC chip is mounted on a normal wiring board on which other various electronic chip components are mounted. Therefore, as a matter of course, the IC chip is not limited to the liquid crystal driving IC, and can be an IC chip having an arbitrary circuit configuration.
[0033]
Further, FIG. 1 shows an example in which one IC chip is mounted on a substrate, but the present invention can be applied to a case where a plurality of IC chips are mounted.
[0034]
In FIG. 1, ACF is used as an adhesive material, but instead of this, various non-conductive adhesives such as epoxy, acrylic and urethane, isotropic conductive pastes such as silver paste, ACA (Anisotropic Conductive Adhesive) in which conductive particles are dispersed in a paste adhesive can also be used as an adhesive material.
[0035]
【The invention's effect】
According to the method for connecting an IC chip and the method for manufacturing a liquid crystal device according to the present invention, the pressing center of the pressure head always coincides with the center line between the terminal rows of the IC side terminals. The pressing force applied to the side terminals is accurately and substantially uniform with respect to each of all the IC side terminals, so that the connection reliability of the conductive connection between the IC side terminals and the board side terminals can be maintained high.
[Brief description of the drawings]
FIG. 1 is a perspective view showing an embodiment of an IC chip connection method and a liquid crystal device manufacturing method according to the present invention.
2 is a cross-sectional view showing a cross-sectional structure of a liquid crystal panel or the like according to the line II-II in FIG.
FIG. 3 is a plan view showing an active surface of an example of an IC chip.
FIG. 4 is a plan view showing an example of a conventional IC chip.
[Explanation of symbols]
1 Liquid crystal drive IC
1a Active surface 2 Bump (IC side terminal)
3 Liquid crystal panel 4a, 4b Substrate 4c Substrate overhanging portion 6 Substrate side terminal 7 Sealing material 7a Liquid crystal injection port 9a, 9b Electrode 14 Liquid crystal 17 ACF (adhesive material)
22 Pressure head 23 Table G IC chip outline J IC mounting area L0 IC chip outline center line L1 Bump row center line L2 of IC chip Press center line of pressure head

Claims (8)

ＩＣチップに設けられたＩＣ側端子と、基板に設けられた基板側端子とを導電接続するＩＣチップの接続方法であって、
前記ＩＣ側端子は互いに対向する一対の端子列を形成し且つその端子列間の中心線は前記ＩＣチップの外形中心線からずれている構造のＩＣチップの接続方法において、
前記ＩＣチップと前記基板との間に接着用材料を介在させ、
加圧ヘッドの押圧中心線が前記ＩＣ側端子列間の中心線にほぼ一致する状態でその加圧ヘッドによって前記ＩＣチップを押圧する
ことを特徴とするＩＣチップの接続方法。An IC chip connection method for conductively connecting an IC side terminal provided on an IC chip and a substrate side terminal provided on a substrate,
In the IC chip connection method, the IC side terminals form a pair of terminal rows facing each other, and the center line between the terminal rows is deviated from the outer shape center line of the IC chip.
An adhesive material is interposed between the IC chip and the substrate,
A method of connecting IC chips, wherein the IC chip is pressed by the pressure head in a state where the pressing center line of the pressure head substantially coincides with the center line between the IC side terminal rows. 請求項１において、前記接着用材料は非導電性接着剤であり、前記ＩＣ側端子と前記基板側端子とは互いに直接に接触することを特徴とするＩＣチップの接続方法。2. The IC chip connection method according to claim 1, wherein the adhesive material is a non-conductive adhesive, and the IC side terminal and the substrate side terminal are in direct contact with each other. 請求項１において、前記接着用材料は樹脂フィルムの中に導電粒子を分散させて成る異方性導電膜であり、前記ＩＣ側端子と前記基板側端子とは前記導電粒子を通して導電接続することを特徴とするＩＣチップの接続方法。2. The adhesive material according to claim 1, wherein the adhesive material is an anisotropic conductive film in which conductive particles are dispersed in a resin film, and the IC side terminal and the substrate side terminal are conductively connected through the conductive particles. An IC chip connection method as a feature. 請求項１において、前記接着用材料は等方性導電ペーストであり、前記ＩＣ側端子と前記基板側端子とはその等方性導電ペーストを通して導電接続することを特徴とするＩＣチップの接続方法。2. The IC chip connection method according to claim 1, wherein the adhesive material is an isotropic conductive paste, and the IC side terminal and the substrate side terminal are conductively connected through the isotropic conductive paste. ＩＣチップに設けられたＩＣ側端子と、基板に設けられた基板側端子とを導電接続する液晶装置の製造方法であって、
前記ＩＣ側端子は互いに対向する一対の端子列を形成し且つその端子列間の中心線は前記ＩＣチップの外形中心線からずれている構造の液晶装置の製造方法において、
前記ＩＣチップと前記基板との間に接着用材料を介在させ、
加圧ヘッドの押圧中心線が前記ＩＣ側端子列間の中心線にほぼ一致する状態でその加圧ヘッドによって前記ＩＣチップを押圧する
ことを特徴とする液晶装置の製造方法。A method of manufacturing a liquid crystal device in which an IC side terminal provided on an IC chip and a substrate side terminal provided on a substrate are conductively connected,
In the method of manufacturing a liquid crystal device having a structure in which the IC side terminals form a pair of terminal rows facing each other and the center line between the terminal rows is deviated from the outer shape center line of the IC chip.
An adhesive material is interposed between the IC chip and the substrate,
A method of manufacturing a liquid crystal device, wherein the IC chip is pressed by the pressure head in a state where the pressing center line of the pressure head substantially coincides with the center line between the IC side terminal rows. 請求項５において、前記接着用材料は非導電性接着剤であり、前記ＩＣ側端子と前記基板側端子とは互いに直接に接触することを特徴とする液晶装置の製造方法。6. The method of manufacturing a liquid crystal device according to claim 5, wherein the adhesive material is a non-conductive adhesive, and the IC side terminal and the substrate side terminal are in direct contact with each other. 請求項５において、前記接着用材料は樹脂フィルムの中に導電粒子を分散させて成る異方性導電膜であり、前記ＩＣ側端子と前記基板側端子とは前記導電粒子を通して導電接続することを特徴とする液晶装置の製造方法。6. The adhesive material according to claim 5, wherein the adhesive material is an anisotropic conductive film in which conductive particles are dispersed in a resin film, and the IC side terminal and the substrate side terminal are conductively connected through the conductive particles. A method for manufacturing a liquid crystal device. 請求項５において、前記接着用材料は等方性導電ペーストであり、前記ＩＣ側端子と前記基板側端子とはその等方性導電ペーストを通して導電接続することを特徴とする液晶装置の製造方法。6. The method of manufacturing a liquid crystal device according to claim 5, wherein the adhesive material is an isotropic conductive paste, and the IC side terminal and the substrate side terminal are conductively connected through the isotropic conductive paste.
JP14971299A 1999-05-28 1999-05-28 IC chip connection method and liquid crystal device manufacturing method Expired - Fee Related JP3649042B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14971299A JP3649042B2 (en) 1999-05-28 1999-05-28 IC chip connection method and liquid crystal device manufacturing method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14971299A JP3649042B2 (en) 1999-05-28 1999-05-28 IC chip connection method and liquid crystal device manufacturing method

Publications (2)

Publication Number Publication Date
JP2000340613A JP2000340613A (en) 2000-12-08
JP3649042B2 true JP3649042B2 (en) 2005-05-18

Family

ID=15481183

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14971299A Expired - Fee Related JP3649042B2 (en) 1999-05-28 1999-05-28 IC chip connection method and liquid crystal device manufacturing method

Country Status (1)

Country Link
JP (1) JP3649042B2 (en)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3781967B2 (en) * 2000-12-25 2006-06-07 株式会社日立製作所 Display device
JP3744450B2 (en) 2001-05-09 2006-02-08 セイコーエプソン株式会社 Electro-optical device, driving IC and electronic device
JP4282417B2 (en) 2003-09-12 2009-06-24 ソニーケミカル＆インフォメーションデバイス株式会社 Connection structure
JP6434210B2 (en) * 2013-12-20 2018-12-05 デクセリアルズ株式会社 Electronic component, connecting body, manufacturing method of connecting body, and connecting method of electronic component
WO2015093212A1 (en) * 2013-12-20 2015-06-25 デクセリアルズ株式会社 Electronic component, connector, connector production method, and electronic component connecting method
JP6457214B2 (en) * 2014-08-08 2019-01-23 デクセリアルズ株式会社 Electronic component, connecting body, manufacturing method of connecting body, and connecting method of electronic component
JP2016029698A (en) 2014-07-22 2016-03-03 デクセリアルズ株式会社 Connection body and manufacturing method for the same
JP6719529B2 (en) * 2018-11-08 2020-07-08 デクセリアルズ株式会社 Electronic component, connecting body, manufacturing method of connecting body, and connecting method of electronic component

Also Published As

Publication number Publication date
JP2000340613A (en) 2000-12-08

Similar Documents

Publication Publication Date Title
US8013454B2 (en) Wiring substrate and display device including the same
US9148957B2 (en) Electronic circuit substrate, display device, and wiring substrate
US20090039495A1 (en) Wiring substrate and display device including the same
JP4815081B2 (en) Imaging device
CN113193017B (en) Display panel and display device
JP3649042B2 (en) IC chip connection method and liquid crystal device manufacturing method
JP2012227480A (en) Display device and semiconductor integrated circuit device
JP2000068633A (en) Pressure-bonding method and pressure-bonding device
US20050185127A1 (en) Method of manufacturing liquid crystal display
KR20140048632A (en) Bonding apparatus and method for display device
JP2005167274A (en) Semiconductor device, method for manufacturing same, and liquid crystal display device
JP2893070B2 (en) Liquid crystal electro-optical device
JP3695265B2 (en) Display device and electronic device
JPH08304845A (en) Liquid crystal display device
JP3656488B2 (en) Semiconductor device, semiconductor device mounting method, and electro-optical device manufacturing method
JP3769995B2 (en) Manufacturing method of liquid crystal device
JP2000111939A (en) Liquid crystal display device
JP4088006B2 (en) Manufacturing method of liquid crystal display device
JP3674424B2 (en) Mounting structure, electro-optical device, and electronic apparatus
JP2003152019A (en) Connection structure of electrode terminal and liquid crystal display device using the same
JP3820812B2 (en) IC chip mounting structure, liquid crystal device and electronic device
JP2003140564A (en) Semiconductor device, manufacturing method for electrooptical device, electrooptical device and electronic equipment
JPH10319419A (en) Liquid crystal display device
KR200208176Y1 (en) Circuit part connection structure of liquid crystal display
JP2995390B2 (en) Liquid crystal electro-optical device

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20040329

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20050119

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20050125

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20050207

R150 Certificate of patent or registration of utility model

Free format text: JAPANESE INTERMEDIATE CODE: R150

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20080225

Year of fee payment: 3

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20090225

Year of fee payment: 4

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20090225

Year of fee payment: 4

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20100225

Year of fee payment: 5

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20110225

Year of fee payment: 6

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20110225

Year of fee payment: 6

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20120225

Year of fee payment: 7

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20130225

Year of fee payment: 8

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20130225

Year of fee payment: 8

LAPS Cancellation because of no payment of annual fees