JP3656488B2 - Semiconductor device, semiconductor device mounting method, and electro-optical device manufacturing method - Google Patents

Semiconductor device, semiconductor device mounting method, and electro-optical device manufacturing method Download PDF

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JP3656488B2
JP3656488B2 JP34093799A JP34093799A JP3656488B2 JP 3656488 B2 JP3656488 B2 JP 3656488B2 JP 34093799 A JP34093799 A JP 34093799A JP 34093799 A JP34093799 A JP 34093799A JP 3656488 B2 JP3656488 B2 JP 3656488B2
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semiconductor device
substrate
conductive particles
liquid crystal
terminal
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JP2001156108A (en
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和重 保科
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Seiko Epson Corp
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Seiko Epson Corp
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73201Location after the connecting process on the same surface
    • H01L2224/73203Bump and layer connectors
    • H01L2224/73204Bump and layer connectors the bump connector being embedded into the layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/831Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus
    • H01L2224/83101Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus as prepeg comprising a layer connector, e.g. provided in an insulating plate member
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304Transistor
    • H01L2924/1306Field-effect transistor [FET]
    • H01L2924/13091Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]

Description

【0001】
【発明の属する技術分野】
本発明は、パッドを有する半導体装置に関する。また本発明は、そのような半導体装置を基板に接続するための半導体装置の実装方法に関する。また、本発明は、そのような半導体装置を基板に実装する工程を有する電気光学装置の製造方法に関する。
【0002】
【従来の技術】
近年、各種の電子機器に半導体装置が広く用いられている。この半導体装置とは、ICチップそのものや、ICチップと基板とが一体になっているIC構造体のことである。ICチップとしては、パッケージングされていないベアチップICや、パッケージングされていて裏面に端子を持つIC等が知られている。
【0003】
また、上記のIC構造体としては、複数のICを1つの基板に搭載した構造のCOB(Chip On Board)や、複数のICを1つのモジュール内に収容したMCM(Multi Chip Module)や、FPC(Flexible Printed Circuit)にICを搭載した構造のCOF(Chip On FPC)等が知られている。
【0004】
従来、半導体装置を基板に実装する方法として、図10(a)に示すように、ACF( Anisotropic Conductive Film:異方性導電膜)60を間に挟んで半導体装置51の半導体装置側端子(電極端子)56を基板54の基板側端子(電極端子)59へ軽く押し付けて仮装着し、さらに熱圧着処理、すなわち加熱下で加圧するという方法が知られている。半導体装置側端子56は、Al(アルミニウム)等によって形成されたパッド52の上にAu(金)等によって形成されたバンプ53を付着することによって形成されるのが一般的である。
【0005】
ACF60は、周知の通り、一対の端子間を異方性を持たせて電気的に一括接続すると共に、2つの部材間を機械的に接続するために用いられる導電性のある高分子フィルムであって、例えば、紫外線硬化性、熱可塑性又は熱硬化性の樹脂フィルム58の中に多数の導電粒子57を分散させることによって形成される。このACF60を挟んで基板54と半導体装置51とを加熱しながら或いは紫外線照射しながら圧着することにより、図10(b)に示すように、半導体装置側端子56と基板側端子59との間において単一方向の導電性を持つ接続を実現する。
【0006】
【発明が解決しようとする課題】
しかしながら、ACFを用いた従来の実装方法では、近年における産業界の要求に応じて導電接続の対象である端子の間隔、すなわちピッチを狭くするとき、隣り合う端子間に存在する導電粒子によって当該一対の端子がショートするという、いわゆる横導通が発生して、接続信頼性が低下するという問題があった。
【0007】
また、半導体装置を基板に実装するに当たって高価なACF及び金バンプが必要となるので、部品コストが高くなるという問題があった。また、半導体装置を基板に実装するのに先立って基板の適所にACFを付着する工程が必要になるので、製造工数が多くなって製造コストが高くなるという問題もあった。
【0008】
本発明は、上記の問題点に鑑みて成されたものであって、端子間ピッチが狭くなる場合でも導電粒子による端子間の横導通の発生を防止でき、しかも安価に実装を行うことができる半導体装置及びその実装方法を提供することを目的とする。また、そのような半導体装置の実装方法を用いる電気光学装置の製造方法を提供することを目的とする。
【0009】
【課題を解決するための手段】
(1)上記の目的を達成するため、本発明に係る半導体装置は、所定の領域に配置された複数の電極端子を備え、前記所定の領域の前記複数の電極端子表面に導電粒子が付着され、前記所定の領域以外には導電粒子が付着されない半導体装置であって、前記導電粒子は表面に接着剤層を有し、その接着剤層によって前記電極端子の表面に付着されることを特徴とする。
【0010】
この半導体装置によれば、半導体装置の端子側表面、すなわち能動面において、端子の表面だけに導電粒子が載置され、それ以外の領域には導電粒子が設けられないので、端子間ピッチが狭くなっても隣り合う一対の端子が導電粒子によってショートすること、すなわち端子間における横導通が起こることがなくなる。
また、導電粒子の表面に接着剤層を形成し、その接着剤層によって導電粒子を端子の表面に付着することによって、導電粒子を端子の表面に載置することができる。
【0011】
また、導電粒子が設けられる領域が端子の表面に限定されるので、横導通の発生を心配することなく1つの端子の表面に分散する導電粒子の量、いわゆる分散量を必要なだけ多くすることができる。これにより、端子間ピッチが狭くなる場合、すなわち端子幅が狭くなる場合でも、十分な導通面積を確保できる。
【0012】
また、半導体装置を基板に実装する際にACF等といった高価な異方性導電接着要素が不要となり、さらにそのACFを基板に付着するための工程も不要となるので、コストダウンを達成できる。
【0013】
上記(1)に記載の半導体装置において、前記電極端子は硬質の導電素材、例えばAlによって形成でき、そしてその場合、前記導電粒子は弾性を有する素材によって形成することができる。この構成によれば、従来の金バンプのような軟質の端子素材を用いる必要がなくなるので、半導体装置の端子構造が簡単になり、しかも安価になる。
【0021】
(2)次に、本発明に係る他の半導体装置の実装方法は、所定の領域に配置された複数の第1の電極端子を備える半導体装置と第2の電極端子を備える基板とを、前記第1の電極端子と前記第2の電極端子とが互いに導通するように、接続するための半導体装置の実装方法において、導電粒子の表面に接着剤層が形成され、この接着剤層により前記導電粒子が前記所定の領域の前記第1の電極端子の表面に付着して載置され、前記所定の領域以外の半導体装置の表面領域に前記導電粒子が載置されない半導体装置を、接着剤を介して前記基板に接着することを特徴とする。
【0022】
この実装方法の場合も、半導体装置の端子側表面、すなわち能動面において、端子の表面だけに導電粒子が載置され、それ以外の領域には導電粒子が設けられないので、端子間ピッチが狭くなっても隣り合う一対の端子が導電粒子によってショートすること、すなわち横導通が起こることがなくなる。
また前記導電粒子の表面には接着剤層が形成され、この接着剤層により前記導電粒子が前記第1の電極端子表面に付着されることにより、導電粒子を電極端子に付着しやすくする。
【0023】
また、導電粒子が設けられる領域が端子の表面に限定されるので、横導通の発生を心配することなく1つの端子の表面に分散する導電粒子の量、いわゆる分散量を必要なだけ多くすることができる。これにより、端子間ピッチが狭くなる場合、すなわち端子幅が狭くなる場合でも、十分な導通面積を確保できる。
【0024】
また、半導体装置と基板との実装の際にACF等といった高価な異方性導電接着要素が不要となり、さらにそのACFを基板に付着するための工程も不要となるので、コストダウンを達成できる。
【0026】
本発明に係る電気光学装置の製造方法においては、上記(2)に記載の半導体装置の実装方法を用いて、前記基板上に前記電気光学装置の駆動用となる前記半導体装置を実装する工程を有することを特徴とする。
【0027】
この製造方法によれば、半導体装置の端子側表面、すなわち能動面において、端子の表面だけに導電粒子が載置され、それ以外の領域には導電粒子が設けられないので、端子間ピッチが狭くなっても隣り合う一対の端子が導電粒子によってショートすること、すなわち横導通が起こることがなくなる。よって、電気光学装置を駆動する半導体装置からの出力端子数が増やすことができるので、1つの半導体装置によって電気光学装置の画素数を増やすことができる。または、半導体装置のチップ面積を小さくできるので、電気光学装置の額縁面積を小さくすることができる。
【0028】
また、導電粒子が設けられる領域が端子の表面に限定されるので、横導通の発生を心配することなく1つの端子の表面に分散する導電粒子の量、いわゆる分散量を必要なだけ多くすることができる。これにより、端子間ピッチが狭くなる場合、すなわち端子幅が狭くなる場合でも、十分な導通面積を確保できる。
【0029】
【発明の実施の形態】
(第1実施形態)
以下、本発明に係る半導体装置を、液晶装置に用いられる液晶駆動用IC、すなわちベアチップICを例に挙げて説明する。また、本発明に係る半導体装置の実装方法を、電気光学装置の製法工程において駆動用ICをパネル基板に実装する場合を例に挙げて説明する。なお、電気光学装置として、液晶装置を例にとって説明する。
【0030】
図1(a)は、本発明に係る半導体装置の一実施形態である液晶駆動用IC1を示している。この液晶駆動用IC1は、半導体基板によって形成された基板2と、その基板2の表面に形成されたMOSトランジスタ、抵抗、容量、配線等によって電気回路が構成されてなる集積回路3と、その集積回路3の表面を覆う絶縁膜(パシベーション膜)4と、集積回路3の入力端子、出力端子、電源端子等に電気的につながる複数のパッド6とを有する。パッド6は、本発明における端子又は半導体装置側端子、すなわち電極端子として作用する。
【0031】
パッド6は、例えば、Al等のようにAu等に比べて硬質の導電素材によって形成され、拡大断面図(b)に示すように、絶縁膜4によって覆われることなく外部に露出する。そして、そのパッド6の表面には、複数の導電粒子7が分散状態で混入された接着剤8が適当量だけ付着、例えば塗布されている。接着剤8には、従来からACFとして用いていたような、加熱により硬化する絶縁性樹脂や紫外線照射により硬化する絶縁性樹脂などを用いることができる。
【0032】
導電粒子7は、例えば、図1(c)の断面構成図に示すように、弾性を備えた絶縁性の樹脂ボール9の表面にNi(ニッケル)層11を被膜形成し、そのNi層11の上にさらにAu層12を被膜形成することによって作製される。Ni層11及びAu層12は、例えばメッキによって形成できる。導電粒子7は、その芯材として弾性樹脂ボール9を用いることにより、全体としても弾性を有している。
【0033】
なお、半導体装置のパッド6部分のみに導電粒子7を混入させた接着剤8を塗布するには、例えば、インクジェット方式のように、細い開口部を有するノズルをパッド6上に位置決めしてから上記接着剤8を所定量分、パッド6上に吹き付ける、等の種々の方法が考えられる。
【0034】
図2は、本発明に係る半導体装置の実装方法を用いて構成される液晶装置10を示している。図3は、図2の液晶装置10における切断線III−IIIでの部分断面図を示す。この液晶装置10は、液晶層を挟持するパネル構造である液晶パネル13に、本発明の半導体装置である液晶駆動用IC1a及び1bを実装し、さらに液晶パネル13の一方の面に偏光板16a及び半透過反射板(又は反射型表示の場合は反射板でもよい)17を装着し、さらに液晶パネル13の他方の面に位相差板18及び偏光板16bを装着することによって形成される。
【0035】
液晶パネル13は、互いに対向して配置されていてシール材19によって周囲が貼り合わされた一対のパネル基板14a及び14bを有する。第1パネル基板14aは図3に示すように基板素材21aを有し、その基板素材21aの液晶側表面、すなわち第2パネル基板14bに対向する面には、走査電極又は信号電極の一方として作用する複数の第1電極22aが所定パターンに形成され、その上にオーバーコート層23aが形成され、さらにその上に配向膜24aが形成される。
【0036】
また、基板素材21aの外側表面には光学素子としての既述の偏光板16aが例えば貼着によって装着され、さらにその外側に光学素子としての既述の半透過反射板17が例えば貼着によって装着される。必要に応じて、基板素材21aと偏光板16aの間に位相差板を介在させてもよい。また、必要に応じて、半透過反射板17の外側に照明装置としての導光板26が設けられる。つまり、本実施形態の液晶装置10では図3の上側面が視認側となる。なお、導光体26の一辺にはLEDや蛍光管等といった発光源(図示せず)が設けられる。
【0037】
第1パネル基板14aに対向する第2パネル基板14bは基板素材21bを有し、その基板素材21bの液晶側表面、すなわち第1パネル基板14aに対向する面には、走査電極又は信号電極の他方として作用する複数の第2電極22bが所定パターンに形成され、その上にオーバーコート層23bが形成され、さらにその上に配向膜24bが形成される。
【0038】
また、基板素材21bの外側表面には光学素子としての既述の位相差板18が例えば貼着によって装着され、さらにその上に光学素子としての既述の偏光板16bが例えば貼着によって装着される。
【0039】
なお、第1パネル基板14a及び第2パネル基板14bの双方又は一方に設けられる光学素子としては、上記したもの以外に必要に応じて他の素子、例えば光拡散板等が考えられる。また、基板素材21a,21bの一方の液晶層側の面には、必要に応じてその他の光学素子、例えばカラーフィルタ等を設けることもできる。
【0040】
基板素材21a,21bは、例えばガラス等といった硬質な光透過性材料や、プラスチック等といった可撓性を有する光透過性材料等によって所定形状、例えば長方形状や正方形状に形成される。また、第1電極22a及び第2電極22bは、例えばITO(Indium Tin Oxide)等といった透明電極によって1000オングストローム程度の厚さに形成され、オーバーコート層23a,23bは、例えば酸化珪素、酸化チタン又はそれらの混合物等によって800オングストローム程度の厚さに形成され、そして配向膜24a,24bは、例えばポリイミド系樹脂によって800オングストローム程度の厚さに形成される。
【0041】
第1電極22aは、図2に示すように、複数の直線パターンを互いに平行に配列することによって、いわゆるストライプ状に形成される。一方、第2電極22bは上記第1電極22aに交差するように複数の直線パターンを互いに平行に配列することによって、やはりストライプ状に形成される。これらの電極22aと電極22bとが液晶層を介在してドットマトリクス状に交差する複数の点が、像を表示するための画素を形成する。そして、それら複数の画素によって区画形成される領域が、文字等といった像を表示するための表示領域となる。
【0042】
以上のようにして形成された第1パネル基板14a及び第2パネル基板14bのいずれか一方の液晶側表面には、図3に示すように、複数のスペーサ27が分散され、さらにいずれか一方のパネル基板の液晶側表面にシール材19が例えば印刷によって図1に示すように枠状に設けられる。また、そのシール材19の適所に液晶注入口19aが形成される。
【0043】
両パネル基板14a及び14bの間にはスペーサ27によって保持される均一な寸法、例えば5μm程度の間隙、いわゆるセルギャップが形成され、液晶注入口19aを通してそのセルギャップ内に液晶28が注入され、その注入の完了後、液晶注入口19aが樹脂等によって封止される。
【0044】
図2において、第1パネル基板14aは、第2パネル基板14bの外側であってさらにシール材19の外側へ張り出す基板張出し部14cを有する。そして、第1パネル基板14a上の第1電極22aはその基板張出し部14cへ直接に延び出て配線29aとなっている。また、基板張出し部14cの辺端部には外部回路との間で制御信号、クロック信号、表示信号の各種信号や液晶駆動電圧及びIC電源電圧を入力するための外部接続端子31aが形成される。
【0045】
第2パネル基板14bは、第1パネル基板14aの外側であってさらにシール材19の外側へ張り出す基板張出し部14dを有する。そして、第2パネル基板14b上の第2電極22bはその基板張出し部14dへ直接に延び出て配線29bとなっている。また、基板張出し部14dの辺端部には外部回路との間で制御信号、クロック信号、表示信号の各種信号や液晶駆動電圧及びIC電源電圧を入力するための外部接続端子31bが形成される。
【0046】
各電極22a,22b、それらにつながる配線29a,29b及び外部接続端子31a,31bは、いずれも、実際には極めて狭い間隔で多数本がそれぞれの基板14a及び14bの表面に形成されるが、図2及びこれから説明する各図では構造を分かり易く示すために実際の間隔よりも広い間隔でそれらの電極等を模式的に図示し、さらに一部の電極の図示は省略してある。また、電極22a及び22bは、直線状に形成されることに限られず、適宜の文字、図形等といったパターンとして形成されることもある。
【0047】
本実施形態の場合、液晶駆動用IC1a及び1bの各パッド6の表面には、図1(b)に示すように、導電粒子7を分散状態で含む接着剤8、本実施形態の場合は熱硬化型あるいは紫外線硬化形の接着剤が付着される。図4は、液晶駆動用IC1aを基板である第1パネル基板14aへ実装する状態を示している。図2において、液晶駆動用IC1bを基板である第2パネル基板14bへ実装する場合も同様である。
【0048】
図4において、液晶駆動用IC1aは、パッド6と配線29aの電極端子及びパッド6と外部接続端子31aの電極端子がそれぞれ位置的に一致するように、第1パネル基板14aの基板張出し部14cの表面に軽く押し付けられて、仮接着される。その後、基板張出し部14cの裏面側を受け治具32によって受けた状態で、液晶駆動用IC1aを圧着ヘッド33によって押圧する。
【0049】
圧着ヘッド33は図示しないヒータによって所定温度に加熱されており、よって、液晶駆動用IC1aは基板張出し部14cへ加熱下で加圧されることによって熱圧着される。この結果、図3に示すように、パッド6と配線29a及びパッド6と外部接続端子31aがそれぞれ導電粒子7によって導電接続され、さらに接着剤8が加熱により硬化することによって液晶駆動用IC1aが基板張出し部14cに機械的に接着される。導電粒子7は、その内部に弾性を備えた樹脂ボール9を有するので、上記の熱圧着時に弾性変形し、これにより、確実な導電接続を実現できる。また、接着剤8が紫外線硬化樹脂であれば、紫外線照射下で加圧して圧着することにより、同様に、導電接続を行なうことができる。
【0050】
図2において、もう1つの液晶駆動用IC1bも、同様にして、第2パネル基板14bの基板張出し部14dの表面に実装される。
【0051】
以上のようにして作製された液晶装置10に関して、液晶駆動用IC1a及び液晶駆動用IC1bによって第1電極22a又は第2電極22bのいずれか一方に対して直線パターンに走査電圧を順次に印加し、さらにそれらの電極の他方に対して表示画像に基づいてデータ電圧をそれぞれの直線パターンに同時に印加することにより、両電圧の印加によって選択された各画素部分を通過する光を変調し、これを偏光板及び位相差板を介することによって、第1パネル基板14a又は第2パネル基板14bの外側、本実施形態では第2パネル基板14bの外側に文字、数字等といった像を表示する。
【0052】
本実施形態では、図1(a)及び(b)に示したように、液晶駆動用IC1a及び1bのパッド6側の表面、すなわち能動面において、パッド6の表面だけに導電粒子7を載置し、それ以外の領域には導電粒子7を設けないようにしたので、図4において配線29aの紙面垂直方向の端子間及び外部接続端子31aの紙面垂直方向の端子間には導電粒子7が存在せず、よって、配線29a及び外部接続端子31aの端子間ピッチが狭くなったとしても、隣り合う一対の配線29a及び隣り合う一対の外部接続端子31aが導電粒子7によってショートすること、すなわち端子間の横導通が起こることがなくなる。
【0053】
また、導電粒子7が設けられる領域がパッド6の表面に限定されるので、横導通の発生を心配することなく1つのパッド6の表面に分散する導電粒子7の量、いわゆる分散量を必要なだけ多くすることができる。これにより、配線29a等の端子間ピッチが狭くなる場合、すなわち配線29a等の端子幅が狭くなる場合でも、十分な導通面積を確保できる。
【0054】
また、液晶駆動用IC1a,1bをパネル基板14a,14bへ実装する際にACF等といった高価な異方性導電接着要素が不要となり、さらにそのACFをパネル基板14a,14bに付着するための工程も不要となるので、コストダウンを達成できる。
【0055】
(第2実施形態)
図5及び図6は本発明に係る半導体装置の実装方法の他の実施形態を示している。上述した第1実施形態では、図4に示したように、第1パネル基板14aに対して特別な処理を施すことなく液晶駆動用IC1aをその第1パネル基板14aの表面に実装した。
【0056】
これに対し、図5に示す本実施形態では、第1パネル基板14aのIC実装領域に予め接着剤34を例えば塗布によって付着させた上で、圧着ヘッド33及び受け治具32を用いて液晶駆動用IC1aに対して圧着処理を施すようにしてある。この結果、圧着処理が終了すると、図6に示すように、導電粒子7によって電極端子間の導電接続が達成され、さらに接着剤34によって液晶駆動用IC1aと基板張出し部14cとがしっかりと機械的に接着される。なお、圧着時には、先に述べたように、接着剤8、34の特性に応じて、加熱や紫外線照射を行なうことにより接着剤を硬化させる。
【0057】
本実施形態において、接着剤34を用いること以外の構造は図1から図4を用いて先に説明した第1実施形態と同じとすることができるので、その構造に関する説明は省略する。また、接着剤34は、熱可塑性樹脂、熱硬化性樹脂、紫外線硬化性樹脂、その他各種の接着剤を用いることができ、硬化する方法は接着剤8と同じであることが好ましい。
【0058】
(第3実施形態)
図7は本発明に係る半導体装置の他の実施形態に係る液晶駆動用IC41を示している。ここに示す半導体装置41が図1に示した先の実施形態に係る半導体装置1と異なる点は、導電粒子の構成に改変を加え、さらにその導電粒子のパッドへの載置の仕方に改変を加えたことである。
【0059】
具体的には、例えば図7(c)に示すように、本実施形態の導電粒子37は、弾性を有する樹脂ボール9の表面にNi(ニッケル)層11を被覆形成し、そのNi層11の上にAu層12を被覆形成し、さらにその上に接着剤層38を被覆形成することによって作製される。Ni層11及びAu層12は、例えばメッキによって形成でき、接着剤層38は塗布、あるいはその他の任意の方法によって形成できる。接着剤38には、従来からACFとして用いていたような、加熱により硬化する絶縁性樹脂や紫外線照射により硬化する絶縁性樹脂などを用いることができる。
【0060】
この導電粒子37は、接着剤層38の作用により、図7(b)に示すように、特別な接着剤を用いることなく直接にパッド6の表面に載置される。また、本実施形態の液晶駆動用IC41を図2に示した液晶装置10のパネル基板に実装する際には、例えば図8に示すように、第1パネル基板14aの基板張出し部14cのIC実装領域に図5で用いたものと同様な接着剤34を予め付着しておき、その上に液晶駆動用IC41を仮装着する。
【0061】
そして、受け治具32及び圧着ヘッド33を用いて圧着処理を施すことにより、図9に示すように、液晶駆動用IC41を基板張出し部14cの表面に実装する。なお、圧着時には、先に述べたように、接着剤38、34の特性に応じて、加熱や紫外線照射を行なうことにより接着剤を硬化させる。
【0062】
この実装により、液晶駆動用IC41のパッド6と配線29a及びパッド6と外部接続端子31aの電極端子が導電粒子37によって互いに導電接続され、さらに液晶駆動用IC41と基板張出し部14cとが接着剤34によって機械的に接着される。接着剤34は、熱可塑性樹脂、熱硬化性樹脂、紫外線硬化性樹脂、その他各種の接着剤を用いることができ、硬化する方法は接着剤38と同じであることが好ましい。
【0063】
(その他の実施形態)
以上、好ましい実施形態を挙げて本発明を説明したが、本発明はその実施形態に限定されるものでなく、請求の範囲に記載した発明の範囲内で種々に改変できる。
【0064】
例えば、図1及び図7では、パッケージングされていないベアチップICに対して本発明を適用した場合を例示したが、本発明に係る半導体装置は端子が外部へ露出する構造のその他の任意の半導体装置に対しても適用することができる。
【0065】
また、以上の説明では、半導体装置としての液晶駆動用ICを液晶装置に実装する場合を例示したが、半導体装置は液晶装置以外の任意の電気光学装置、例えば電気光学物質としてEL(エレクトロルミネッセンス)素子を用いた光学装置や、プラズマディスプレイ(PDP)や、フィールドエミッションディスプレイ(FED)等の電気光学装置全般に対して適用することもできる。なお、電気光学材料として液晶ではなく、ELを用いる場合、ELを挟む一対の電極が積層形成されるので、一枚の基板のみでよい。
【0066】
また、図1及び図7に示す実施形態では、パッド6の上に導電粒子7を載置したが、場合によっては、パッド6の上にAuバンプを形成して端子を構成し、そのAuバンプの上に導電粒子を載置することもできる。
【0067】
【発明の効果】
本発明に係る半導体装置及びその実装方法によれば、半導体装置の端子側表面、すなわち能動面において、電極端子の表面だけに導電粒子が載置され、それ以外の領域には導電粒子が設けられないので、端子間ピッチが狭くなっても隣り合う一対の端子が導電粒子によってショートすること、すなわち横導通が起こることがなくなった。
【0068】
また、導電粒子が設けられる領域が端子の表面に限定されるので、横導通の発生を心配することなく1つの端子の表面に分散する導電粒子の量、いわゆる分散量を必要なだけ多くすることができる。これにより、端子間ピッチが狭くなる場合、すなわち端子幅が狭くなる場合でも、十分な導通面積を確保できる。
【0069】
また、半導体装置を基板へ実装する際にACF等といった高価な異方性導電接着要素が不要となり、さらにそのACFを基板に付着するための工程も不要となるので、コストダウンを達成できる。
【図面の簡単な説明】
【図1】本発明に係る半導体装置の一実施形態を示す斜視図であり、(a)はその全体の外観を示し、(b)は端子部分を拡大して示し、(c)は導電粒子の断面構造を示している。
【図2】本発明に係る半導体装置の実装方法を用いて構成される電気光学装置の一例である液晶装置を分解状態で示す斜視図である。
【図3】図2におけるIII−III線に従った断面図である。
【図4】本発明に係る半導体装置の実装方法を説明するための図である。
【図5】本発明に係る半導体装置の他の実装方法を説明するための図である。
【図6】図5に示す実装方法によって作製された実装構造を示す断面図である。
【図7】本発明に係る半導体装置の他の実施形態を示す斜視図であり、(a)はその全体の外観を示し、(b)は端子部分を拡大して示し、(c)は導電粒子の断面構造を示している。
【図8】図7に示す半導体装置を基板へ実装するための実装方法の一実施形態を示す断面図である。
【図9】図8に示す実装方法によって作製された実装構造を示す断面図である。
【図10】従来の半導体装置の実装方法の一例を示す断面図であり、(a)は実装途中を示し、(b)は実装作業後の実装構造を示している。
【符号の説明】
1,1a,1b 液晶駆動用IC(半導体装置)
2 基板
3 集積回路
4 絶縁膜
6 パッド(電極端子)
7 導電粒子
8 接着剤
9 樹脂ボール
10 液晶装置
11 Ni層
12 Au層
13 液晶パネル
14a,14b パネル基板(基板)
21a,21b 基板素材
22a,22b 電極
28 液晶
29a,29b 配線(基板側電極端子)
31a,31b 外部接続端子(基板側電極端子)
32 受け治具
33 圧着ヘッド
34 接着剤
37 導電粒子
38 接着剤層
41 液晶駆動用IC(半導体装置)
[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor device having a pad. The present invention also relates to a semiconductor device mounting method for connecting such a semiconductor device to a substrate. The present invention also relates to a method for manufacturing an electro-optical device including a step of mounting such a semiconductor device on a substrate.
[0002]
[Prior art]
In recent years, semiconductor devices have been widely used in various electronic devices. The semiconductor device is an IC chip itself or an IC structure in which an IC chip and a substrate are integrated. As an IC chip, a bare chip IC that is not packaged, an IC that is packaged and has terminals on the back surface, and the like are known.
[0003]
In addition, as the IC structure, a COB (Chip On Board) having a structure in which a plurality of ICs are mounted on one substrate, a MCM (Multi Chip Module) in which a plurality of ICs are accommodated in one module, an FPC, and the like. A COF (Chip On FPC) having a structure in which an IC is mounted on a (Flexible Printed Circuit) is known.
[0004]
Conventionally, as a method of mounting a semiconductor device on a substrate, as shown in FIG. 10A, a semiconductor device-side terminal (electrode) of the semiconductor device 51 with an ACF (Anisotropic Conductive Film) 60 interposed therebetween, as shown in FIG. A method is known in which a terminal 56 is lightly pressed and temporarily attached to a substrate-side terminal (electrode terminal) 59 of the substrate 54, and is further subjected to thermocompression treatment, that is, pressurization under heating. The semiconductor device side terminal 56 is generally formed by attaching a bump 53 formed of Au (gold) or the like on a pad 52 formed of Al (aluminum) or the like.
[0005]
As is well known, the ACF 60 is a conductive polymer film that is used to electrically connect together a pair of terminals with anisotropy and mechanically connect between two members. For example, the conductive film 57 is formed by dispersing a large number of conductive particles 57 in an ultraviolet curable, thermoplastic or thermosetting resin film 58. By pressing the substrate 54 and the semiconductor device 51 while heating or irradiating ultraviolet rays with the ACF 60 interposed therebetween, as shown in FIG. 10B, between the semiconductor device side terminal 56 and the substrate side terminal 59, Realize connections with unidirectional conductivity.
[0006]
[Problems to be solved by the invention]
However, in the conventional mounting method using the ACF, when the interval between the terminals to be conductively connected, that is, the pitch is narrowed according to the demands of the industry in recent years, the pair of conductive particles existing between adjacent terminals is used. There is a problem that so-called lateral conduction occurs in which the terminals of the terminal are short-circuited, resulting in a decrease in connection reliability.
[0007]
In addition, expensive ACFs and gold bumps are required for mounting the semiconductor device on the substrate, which raises a problem that the component cost increases. In addition, since a step of attaching ACF to an appropriate position of the substrate is required prior to mounting the semiconductor device on the substrate, there is a problem that the number of manufacturing steps increases and the manufacturing cost increases.
[0008]
The present invention has been made in view of the above problems, and even when the pitch between terminals becomes narrow, it is possible to prevent the occurrence of lateral conduction between terminals due to conductive particles, and it is possible to mount at low cost. An object of the present invention is to provide a semiconductor device and a mounting method thereof. It is another object of the present invention to provide a method for manufacturing an electro-optical device using such a semiconductor device mounting method.
[0009]
[Means for Solving the Problems]
(1) In order to achieve the above object, a semiconductor device according to the present invention includes a plurality of electrode terminals arranged in a predetermined region, and conductive particles are attached to surfaces of the plurality of electrode terminals in the predetermined region. A semiconductor device in which conductive particles are not attached to areas other than the predetermined region, wherein the conductive particles have an adhesive layer on the surface, and the adhesive layer adheres to the surface of the electrode terminal. To do.
[0010]
According to this semiconductor device, the conductive particles are placed only on the surface of the terminal on the terminal-side surface of the semiconductor device, that is, the active surface, and no conductive particles are provided in the other regions. Even if this occurs, a pair of adjacent terminals are short-circuited by the conductive particles, that is, lateral conduction between the terminals does not occur.
Further, the conductive particles can be placed on the surface of the terminal by forming an adhesive layer on the surface of the conductive particles and attaching the conductive particles to the surface of the terminal by the adhesive layer.
[0011]
In addition, since the region where the conductive particles are provided is limited to the surface of the terminal, the amount of conductive particles dispersed on the surface of one terminal, so-called dispersion amount, is increased as necessary without worrying about the occurrence of lateral conduction. Can do. Thereby, even when the pitch between terminals becomes narrow, that is, when the terminal width becomes narrow, a sufficient conduction area can be secured.
[0012]
Further, when the semiconductor device is mounted on the substrate, an expensive anisotropic conductive adhesive element such as ACF is not required, and a process for attaching the ACF to the substrate is not required, so that cost reduction can be achieved.
[0013]
In the semiconductor device according to the above (1), the electrode terminal can be formed of a hard conductive material, for example, Al, and in that case, the conductive particles can be formed of a material having elasticity. According to this configuration, since it is not necessary to use a soft terminal material such as a conventional gold bump, the terminal structure of the semiconductor device becomes simple and inexpensive.
[0021]
(2) Next, another method for mounting a semiconductor device according to the present invention includes: a semiconductor device including a plurality of first electrode terminals arranged in a predetermined region; and a substrate including a second electrode terminal. In a mounting method of a semiconductor device for connecting so that a first electrode terminal and the second electrode terminal are electrically connected to each other, an adhesive layer is formed on a surface of conductive particles, and the conductive layer is used to form the conductive layer. A semiconductor device in which particles are attached to and placed on the surface of the first electrode terminal in the predetermined region and the conductive particles are not placed in a surface region of the semiconductor device other than the predetermined region is bonded via an adhesive. It adheres to the substrate.
[0022]
Also in this mounting method, the conductive particles are placed only on the surface of the terminal on the terminal side surface of the semiconductor device, that is, the active surface, and no conductive particles are provided in the other region, so the pitch between the terminals is narrow. Even if it becomes, a pair of adjacent terminals are short-circuited by the conductive particles, that is, lateral conduction does not occur.
In addition, an adhesive layer is formed on the surface of the conductive particles, and the conductive particles are attached to the surface of the first electrode terminal by the adhesive layer, so that the conductive particles are easily attached to the electrode terminal.
[0023]
In addition, since the region where the conductive particles are provided is limited to the surface of the terminal, the amount of conductive particles dispersed on the surface of one terminal, so-called dispersion amount, is increased as necessary without worrying about the occurrence of lateral conduction. Can do. Thereby, even when the pitch between terminals becomes narrow, that is, when the terminal width becomes narrow, a sufficient conduction area can be secured.
[0024]
Further, when mounting the semiconductor device and the substrate, an expensive anisotropic conductive adhesive element such as ACF is not required, and further, a process for attaching the ACF to the substrate is not required, so that cost reduction can be achieved.
[0026]
In the electro-optical device manufacturing method according to the present invention, the step of mounting the semiconductor device for driving the electro-optical device on the substrate using the mounting method of the semiconductor device described in (2) above. It is characterized by having.
[0027]
According to this manufacturing method, the conductive particles are placed only on the surface of the terminal on the terminal side surface of the semiconductor device, that is, the active surface, and the conductive particles are not provided in the other region, so the pitch between the terminals is narrow. Even if it becomes, a pair of adjacent terminals are short-circuited by the conductive particles, that is, lateral conduction does not occur. Accordingly, since the number of output terminals from the semiconductor device that drives the electro-optical device can be increased, the number of pixels of the electro-optical device can be increased by one semiconductor device. Alternatively, since the chip area of the semiconductor device can be reduced, the frame area of the electro-optical device can be reduced.
[0028]
In addition, since the region where the conductive particles are provided is limited to the surface of the terminal, the amount of conductive particles dispersed on the surface of one terminal, so-called dispersion amount, is increased as necessary without worrying about the occurrence of lateral conduction. Can do. Thereby, even when the pitch between terminals becomes narrow, that is, when the terminal width becomes narrow, a sufficient conduction area can be secured.
[0029]
DETAILED DESCRIPTION OF THE INVENTION
(First embodiment)
Hereinafter, a semiconductor device according to the present invention will be described by taking a liquid crystal driving IC used for a liquid crystal device, that is, a bare chip IC as an example. Further, the semiconductor device mounting method according to the present invention will be described by taking as an example the case where the driving IC is mounted on the panel substrate in the manufacturing process of the electro-optical device. Note that a liquid crystal device will be described as an example of the electro-optical device.
[0030]
FIG. 1A shows a liquid crystal driving IC 1 which is an embodiment of a semiconductor device according to the present invention. The liquid crystal driving IC 1 includes a substrate 2 formed of a semiconductor substrate, an integrated circuit 3 in which an electric circuit is configured by a MOS transistor, a resistor, a capacitor, a wiring, and the like formed on the surface of the substrate 2, and an integrated circuit thereof. An insulating film (passivation film) 4 that covers the surface of the circuit 3 and a plurality of pads 6 that are electrically connected to an input terminal, an output terminal, a power supply terminal, and the like of the integrated circuit 3 are provided. The pad 6 functions as a terminal in the present invention or a semiconductor device side terminal, that is, an electrode terminal.
[0031]
The pad 6 is formed of a conductive material harder than Au or the like, such as Al, and is exposed to the outside without being covered by the insulating film 4 as shown in the enlarged sectional view (b). An appropriate amount of an adhesive 8 mixed with a plurality of conductive particles 7 in a dispersed state is attached, for example, applied to the surface of the pad 6. For the adhesive 8, an insulating resin that is cured by heating, an insulating resin that is cured by ultraviolet irradiation, or the like, which has been conventionally used as an ACF, can be used.
[0032]
For example, as shown in the cross-sectional configuration diagram of FIG. 1C, the conductive particles 7 are formed by forming a Ni (nickel) layer 11 on the surface of an insulating resin ball 9 having elasticity, It is produced by forming a film of the Au layer 12 thereon. The Ni layer 11 and the Au layer 12 can be formed by plating, for example. The conductive particles 7 have elasticity as a whole by using elastic resin balls 9 as the core material.
[0033]
In order to apply the adhesive 8 in which the conductive particles 7 are mixed only in the pad 6 portion of the semiconductor device, for example, a nozzle having a thin opening is positioned on the pad 6 and then the above-mentioned, as in the ink jet method. Various methods such as spraying a predetermined amount of the adhesive 8 on the pad 6 can be considered.
[0034]
FIG. 2 shows a liquid crystal device 10 configured by using the semiconductor device mounting method according to the present invention. FIG. 3 is a partial cross-sectional view taken along section line III-III in the liquid crystal device 10 of FIG. In this liquid crystal device 10, liquid crystal driving ICs 1 a and 1 b, which are semiconductor devices of the present invention, are mounted on a liquid crystal panel 13 having a panel structure that sandwiches a liquid crystal layer. Further, a polarizing plate 16 a and a polarizing plate 16 a on one surface of the liquid crystal panel 13 A transflective plate (or a reflective plate in the case of a reflective display) 17 is mounted, and a retardation plate 18 and a polarizing plate 16b are mounted on the other surface of the liquid crystal panel 13.
[0035]
The liquid crystal panel 13 includes a pair of panel substrates 14 a and 14 b that are arranged to face each other and are bonded together by a sealing material 19. As shown in FIG. 3, the first panel substrate 14a has a substrate material 21a, and the surface of the substrate material 21a on the liquid crystal side, that is, the surface facing the second panel substrate 14b, acts as one of a scanning electrode or a signal electrode. A plurality of first electrodes 22a are formed in a predetermined pattern, an overcoat layer 23a is formed thereon, and an alignment film 24a is further formed thereon.
[0036]
Further, the above-described polarizing plate 16a as an optical element is attached to the outer surface of the substrate material 21a by, for example, sticking, and the above-described transflective plate 17 as an optical element is further attached to the outer surface thereof by, for example, sticking. Is done. If necessary, a retardation plate may be interposed between the substrate material 21a and the polarizing plate 16a. Further, if necessary, a light guide plate 26 as an illumination device is provided outside the transflective plate 17. That is, in the liquid crystal device 10 of the present embodiment, the upper side surface of FIG. A light source (not shown) such as an LED or a fluorescent tube is provided on one side of the light guide 26.
[0037]
The second panel substrate 14b facing the first panel substrate 14a has a substrate material 21b. The other side of the scanning electrode or the signal electrode is on the liquid crystal side surface of the substrate material 21b, that is, the surface facing the first panel substrate 14a. A plurality of second electrodes 22b functioning as a predetermined pattern are formed, an overcoat layer 23b is formed thereon, and an alignment film 24b is further formed thereon.
[0038]
Further, the above-described retardation plate 18 as an optical element is attached to the outer surface of the substrate material 21b by, for example, adhesion, and the above-described polarizing plate 16b as an optical element is further attached thereto by, for example, adhesion. The
[0039]
In addition, as an optical element provided in both or one side of the 1st panel board | substrate 14a and the 2nd panel board | substrate 14b, other elements, for example, a light diffusing plate etc., can be considered as needed other than the above-mentioned thing. In addition, other optical elements such as a color filter can be provided on the surface of the substrate materials 21a and 21b on the one liquid crystal layer side as necessary.
[0040]
The substrate materials 21a and 21b are formed in a predetermined shape, for example, a rectangular shape or a square shape by using a hard light-transmitting material such as glass or the like, or a light-transmitting material having flexibility such as plastic. The first electrode 22a and the second electrode 22b are formed to a thickness of about 1000 angstroms by a transparent electrode such as ITO (Indium Tin Oxide), for example, and the overcoat layers 23a and 23b are made of, for example, silicon oxide, titanium oxide or The alignment film 24a, 24b is formed to a thickness of about 800 Å by, for example, a polyimide resin.
[0041]
As shown in FIG. 2, the first electrode 22a is formed in a so-called stripe shape by arranging a plurality of linear patterns in parallel with each other. On the other hand, the second electrode 22b is also formed in a stripe shape by arranging a plurality of linear patterns parallel to each other so as to intersect the first electrode 22a. A plurality of points where these electrodes 22a and 22b intersect with each other in the form of a dot matrix through a liquid crystal layer form a pixel for displaying an image. An area partitioned by the plurality of pixels is a display area for displaying an image such as a character.
[0042]
As shown in FIG. 3, a plurality of spacers 27 are dispersed on one liquid crystal side surface of the first panel substrate 14a and the second panel substrate 14b formed as described above. A sealing material 19 is provided on the liquid crystal side surface of the panel substrate in a frame shape as shown in FIG. 1, for example, by printing. Further, a liquid crystal injection port 19 a is formed at an appropriate position of the sealing material 19.
[0043]
A uniform dimension held by the spacer 27, for example, a so-called cell gap, that is, a so-called cell gap is formed between the panel substrates 14a and 14b, and the liquid crystal 28 is injected into the cell gap through the liquid crystal injection port 19a. After the injection is completed, the liquid crystal injection port 19a is sealed with resin or the like.
[0044]
In FIG. 2, the first panel substrate 14 a has a substrate protruding portion 14 c that extends outside the second panel substrate 14 b and further to the outside of the sealing material 19. The first electrode 22a on the first panel substrate 14a extends directly to the substrate overhanging portion 14c to form a wiring 29a. Further, an external connection terminal 31a for inputting various signals such as a control signal, a clock signal, a display signal, a liquid crystal drive voltage, and an IC power supply voltage is formed at the side edge of the substrate extension 14c. .
[0045]
The second panel substrate 14 b has a substrate overhanging portion 14 d that extends outside the first panel substrate 14 a and further outside the sealing material 19. And the 2nd electrode 22b on the 2nd panel board | substrate 14b is directly extended to the board | substrate overhang | projection part 14d, and becomes the wiring 29b. Further, an external connection terminal 31b for inputting various signals such as a control signal, a clock signal, a display signal, a liquid crystal drive voltage, and an IC power supply voltage is formed at the side edge of the substrate extension 14d. .
[0046]
Each of the electrodes 22a and 22b, the wirings 29a and 29b connected to them, and the external connection terminals 31a and 31b are actually formed on the surfaces of the respective substrates 14a and 14b at a very narrow interval. In FIG. 2 and each figure to be described hereinafter, in order to show the structure in an easy-to-understand manner, those electrodes and the like are schematically shown at intervals wider than the actual intervals, and some of the electrodes are not shown. Further, the electrodes 22a and 22b are not limited to being formed in a straight line, and may be formed as a pattern such as an appropriate character or figure.
[0047]
In the case of this embodiment, an adhesive 8 containing conductive particles 7 in a dispersed state is provided on the surface of each pad 6 of the liquid crystal driving ICs 1a and 1b, as shown in FIG. A curable or ultraviolet curable adhesive is applied. FIG. 4 shows a state in which the liquid crystal driving IC 1a is mounted on the first panel substrate 14a which is a substrate. In FIG. 2, the same applies to the case where the liquid crystal driving IC 1b is mounted on the second panel substrate 14b which is a substrate.
[0048]
In FIG. 4, the liquid crystal driving IC 1a includes a substrate overhanging portion 14c of the first panel substrate 14a so that the electrode terminals of the pad 6 and the wiring 29a and the electrode terminals of the pad 6 and the external connection terminal 31a coincide with each other. Lightly pressed onto the surface and temporarily bonded. Thereafter, the liquid crystal driving IC 1 a is pressed by the pressure-bonding head 33 in a state where the back surface side of the substrate extending portion 14 c is received by the jig 32.
[0049]
The pressure-bonding head 33 is heated to a predetermined temperature by a heater (not shown). Therefore, the liquid crystal driving IC 1a is heat-bonded by being pressed against the substrate overhanging portion 14c under heating. As a result, as shown in FIG. 3, the pad 6 and the wiring 29a and the pad 6 and the external connection terminal 31a are conductively connected by the conductive particles 7, respectively, and the adhesive 8 is cured by heating, whereby the liquid crystal driving IC 1a is formed on the substrate. It is mechanically bonded to the overhanging portion 14c. Since the conductive particles 7 have the resin balls 9 with elasticity inside, the conductive particles 7 are elastically deformed at the time of the above-described thermocompression bonding, thereby realizing a reliable conductive connection. Further, if the adhesive 8 is an ultraviolet curable resin, the conductive connection can be similarly performed by pressurizing and pressure bonding under ultraviolet irradiation.
[0050]
In FIG. 2, another liquid crystal driving IC 1b is similarly mounted on the surface of the substrate overhanging portion 14d of the second panel substrate 14b.
[0051]
With respect to the liquid crystal device 10 manufactured as described above, a scanning voltage is sequentially applied in a linear pattern to either the first electrode 22a or the second electrode 22b by the liquid crystal driving IC 1a and the liquid crystal driving IC 1b. Further, by simultaneously applying a data voltage to each linear pattern based on the display image to the other of the electrodes, the light passing through each pixel portion selected by the application of both voltages is modulated and polarized. By using the plate and the phase difference plate, images such as letters and numbers are displayed outside the first panel substrate 14a or the second panel substrate 14b, in this embodiment, outside the second panel substrate 14b.
[0052]
In this embodiment, as shown in FIGS. 1A and 1B, the conductive particles 7 are placed only on the surface of the pad 6 on the surface on the pad 6 side of the liquid crystal driving ICs 1a and 1b, that is, the active surface. However, since the conductive particles 7 are not provided in other regions, the conductive particles 7 exist between the terminals in the vertical direction of the wiring 29a and between the terminals of the external connection terminals 31a in the vertical direction of the paper in FIG. Therefore, even if the pitch between the terminals of the wiring 29a and the external connection terminal 31a is narrowed, the pair of adjacent wirings 29a and the pair of adjacent external connection terminals 31a are short-circuited by the conductive particles 7, that is, between the terminals. No lateral conduction occurs.
[0053]
Further, since the region where the conductive particles 7 are provided is limited to the surface of the pad 6, the amount of the conductive particles 7 dispersed on the surface of one pad 6 without worrying about the occurrence of lateral conduction, so-called dispersion amount is necessary. Can only do more. Thereby, even when the pitch between the terminals of the wiring 29a or the like is narrowed, that is, when the terminal width of the wiring 29a or the like is narrowed, a sufficient conduction area can be secured.
[0054]
Further, when mounting the liquid crystal driving ICs 1a and 1b on the panel substrates 14a and 14b, an expensive anisotropic conductive adhesive element such as ACF is not necessary, and there is a process for attaching the ACF to the panel substrates 14a and 14b. Cost reduction can be achieved because it is not necessary.
[0055]
(Second Embodiment)
5 and 6 show another embodiment of a semiconductor device mounting method according to the present invention. In the first embodiment described above, as shown in FIG. 4, the liquid crystal driving IC 1a is mounted on the surface of the first panel substrate 14a without performing any special treatment on the first panel substrate 14a.
[0056]
On the other hand, in the present embodiment shown in FIG. 5, the adhesive 34 is previously attached to the IC mounting region of the first panel substrate 14 a by, for example, coating, and then the liquid crystal driving is performed using the pressure bonding head 33 and the receiving jig 32. The IC 1a is subjected to a crimping process. As a result, when the crimping process is completed, as shown in FIG. 6, conductive connection between the electrode terminals is achieved by the conductive particles 7, and the liquid crystal driving IC 1 a and the substrate overhanging portion 14 c are firmly mechanically bonded by the adhesive 34. Glued to. At the time of pressure bonding, as described above, the adhesive is cured by heating or ultraviolet irradiation according to the characteristics of the adhesives 8 and 34.
[0057]
In the present embodiment, the structure other than the use of the adhesive 34 can be the same as that of the first embodiment described above with reference to FIGS. As the adhesive 34, a thermoplastic resin, a thermosetting resin, an ultraviolet curable resin, and other various adhesives can be used, and the curing method is preferably the same as the adhesive 8.
[0058]
(Third embodiment)
FIG. 7 shows a liquid crystal driving IC 41 according to another embodiment of the semiconductor device according to the present invention. The semiconductor device 41 shown here is different from the semiconductor device 1 according to the previous embodiment shown in FIG. 1 in that the configuration of the conductive particles is modified, and further, the method of placing the conductive particles on the pad is modified. It is added.
[0059]
Specifically, for example, as shown in FIG. 7C, the conductive particles 37 of the present embodiment are formed by coating a Ni (nickel) layer 11 on the surface of a resin ball 9 having elasticity. It is produced by coating the Au layer 12 thereon and further coating the adhesive layer 38 thereon. The Ni layer 11 and the Au layer 12 can be formed by, for example, plating, and the adhesive layer 38 can be formed by coating or any other method. As the adhesive 38, an insulating resin that is cured by heating, an insulating resin that is cured by ultraviolet irradiation, or the like, which has been conventionally used as an ACF, can be used.
[0060]
The conductive particles 37 are placed directly on the surface of the pad 6 by using the adhesive layer 38 without using a special adhesive, as shown in FIG. 7B. Further, when the liquid crystal driving IC 41 of the present embodiment is mounted on the panel substrate of the liquid crystal device 10 shown in FIG. 2, for example, as shown in FIG. 8, the IC mounting of the substrate overhanging portion 14c of the first panel substrate 14a is performed. An adhesive 34 similar to that used in FIG. 5 is attached in advance to the region, and a liquid crystal driving IC 41 is temporarily mounted thereon.
[0061]
Then, by performing a crimping process using the receiving jig 32 and the crimping head 33, as shown in FIG. 9, the liquid crystal driving IC 41 is mounted on the surface of the substrate overhanging portion 14c. At the time of pressure bonding, as described above, the adhesive is cured by heating or ultraviolet irradiation according to the characteristics of the adhesives 38 and 34.
[0062]
By this mounting, the pad 6 and the wiring 29a of the liquid crystal driving IC 41 and the electrode terminals of the pad 6 and the external connection terminal 31a are conductively connected to each other by the conductive particles 37, and the liquid crystal driving IC 41 and the substrate overhanging portion 14c are further bonded to the adhesive 34. Are mechanically bonded together. As the adhesive 34, a thermoplastic resin, a thermosetting resin, an ultraviolet curable resin, and other various adhesives can be used, and the curing method is preferably the same as the adhesive 38.
[0063]
(Other embodiments)
The present invention has been described with reference to the preferred embodiments. However, the present invention is not limited to the embodiments, and various modifications can be made within the scope of the invention described in the claims.
[0064]
For example, FIGS. 1 and 7 illustrate the case where the present invention is applied to an unpackaged bare chip IC, but the semiconductor device according to the present invention is any other semiconductor having a structure in which the terminal is exposed to the outside. It can also be applied to a device.
[0065]
Further, in the above description, the case where the liquid crystal driving IC as the semiconductor device is mounted on the liquid crystal device has been exemplified. However, the semiconductor device may be any electro-optical device other than the liquid crystal device, for example, EL (electroluminescence) as an electro-optical material. The present invention can also be applied to optical devices using elements, electro-optical devices in general such as a plasma display (PDP) and a field emission display (FED). Note that in the case of using EL instead of liquid crystal as the electro-optical material, a pair of electrodes sandwiching the EL are stacked, so that only one substrate is required.
[0066]
In the embodiment shown in FIGS. 1 and 7, the conductive particles 7 are placed on the pads 6. However, in some cases, Au bumps are formed on the pads 6 to form terminals, and the Au bumps. Conductive particles can be placed on the substrate.
[0067]
【The invention's effect】
According to the semiconductor device and the mounting method thereof according to the present invention, the conductive particles are placed only on the surface of the electrode terminal on the terminal side surface of the semiconductor device, that is, the active surface, and the conductive particles are provided in other regions. Therefore, even if the pitch between terminals is narrowed, a pair of adjacent terminals are not short-circuited by conductive particles, that is, lateral conduction does not occur.
[0068]
In addition, since the region where the conductive particles are provided is limited to the surface of the terminal, the amount of conductive particles dispersed on the surface of one terminal, so-called dispersion amount, is increased as necessary without worrying about the occurrence of lateral conduction. Can do. Thereby, even when the pitch between terminals becomes narrow, that is, when the terminal width becomes narrow, a sufficient conduction area can be secured.
[0069]
Further, when the semiconductor device is mounted on the substrate, an expensive anisotropic conductive adhesive element such as ACF is not required, and further, a process for attaching the ACF to the substrate is not required, so that cost reduction can be achieved.
[Brief description of the drawings]
1A and 1B are perspective views showing an embodiment of a semiconductor device according to the present invention, in which FIG. 1A is an overall appearance, FIG. 1B is an enlarged view of a terminal portion, and FIG. The cross-sectional structure of is shown.
FIG. 2 is a perspective view showing, in an exploded state, a liquid crystal device which is an example of an electro-optical device configured by using the semiconductor device mounting method according to the present invention.
3 is a cross-sectional view taken along line III-III in FIG.
FIG. 4 is a diagram for explaining a semiconductor device mounting method according to the present invention;
FIG. 5 is a diagram for explaining another method for mounting a semiconductor device according to the present invention;
6 is a cross-sectional view showing a mounting structure manufactured by the mounting method shown in FIG.
7A and 7B are perspective views showing another embodiment of a semiconductor device according to the present invention, in which FIG. 7A is an overall appearance, FIG. 7B is an enlarged view of a terminal portion, and FIG. The cross-sectional structure of the particles is shown.
8 is a cross-sectional view showing an embodiment of a mounting method for mounting the semiconductor device shown in FIG. 7 on a substrate.
9 is a cross-sectional view showing a mounting structure manufactured by the mounting method shown in FIG.
FIGS. 10A and 10B are cross-sectional views illustrating an example of a conventional method for mounting a semiconductor device, where FIG. 10A illustrates a mounting process and FIG. 10B illustrates a mounting structure after mounting work;
[Explanation of symbols]
1,1a, 1b Liquid crystal driving IC (semiconductor device)
2 Substrate
3 Integrated circuits
4 Insulating film
6 Pad (electrode terminal)
7 Conductive particles
8 Adhesive
9 Resin balls
10 Liquid crystal device
11 Ni layer
12 Au layer
13 LCD panel
14a, 14b Panel substrate (substrate)
21a, 21b Substrate material
22a, 22b electrode
28 LCD
29a, 29b wiring (substrate side electrode terminal)
31a, 31b External connection terminal (board-side electrode terminal)
32 receiving jig
33 Crimp head
34 Adhesive
37 conductive particles
38 Adhesive layer
41 Liquid crystal drive IC (semiconductor device)

Claims (4)

所定の領域に配置された複数の電極端子を備え、
前記所定の領域の前記複数の電極端子表面に導電粒子が付着され、前記所定の領域以外には導電粒子が付着されない半導体装置であって、
前記導電粒子は表面に接着剤層を有し、その接着剤層によって前記電極端子の表面に付着されることを特徴とする半導体装置。
A plurality of electrode terminals arranged in a predetermined area,
Conductive particles are attached to the surface of the plurality of electrode terminals in the predetermined region, and the semiconductor device is not attached conductive particles other than the predetermined region,
The conductive particles have an adhesive layer on the surface, and are adhered to the surface of the electrode terminal by the adhesive layer.
請求項1において、前記導電粒子は弾性を有することを特徴とする半導体装置。  2. The semiconductor device according to claim 1, wherein the conductive particles have elasticity. 所定の領域に配置された複数の第1の電極端子を備える半導体装置と第2の電極端子を備える基板とを、前記第1の電極端子と前記第2の電極端子とが互いに導通するように、接続するための半導体装置の実装方法において、
導電粒子の表面に接着剤層が形成され、この接着剤層により前記導電粒子が前記所定の領域の前記第1の電極端子の表面に付着して載置され、
前記所定の領域以外の半導体装置の表面領域に前記導電粒子が載置されない半導体装置を、
接着剤を介して前記基板に接着することを特徴とする半導体装置の実装方法。
A semiconductor device having a plurality of first electrode terminals arranged in a predetermined region and a substrate having a second electrode terminal are connected to each other so that the first electrode terminal and the second electrode terminal are electrically connected to each other. In the mounting method of the semiconductor device for connection,
An adhesive layer is formed on the surface of the conductive particles, and the conductive particles are attached and placed on the surface of the first electrode terminal in the predetermined region by the adhesive layer,
A semiconductor device in which the conductive particles are not placed on the surface region of the semiconductor device other than the predetermined region,
A method of mounting a semiconductor device, wherein the semiconductor device is bonded to the substrate via an adhesive.
電気光学装置の製造方法であって、請求項3に記載の半導体装置の実装方法を用いて、前記基板上に前記電気光学装置の駆動用となる前記半導体装置を実装する工程を有することを特徴とする電気光学装置の製造方法。  An electro-optical device manufacturing method comprising: mounting the semiconductor device for driving the electro-optical device on the substrate using the semiconductor device mounting method according to claim 3. A method for manufacturing an electro-optical device.
JP34093799A 1999-11-30 1999-11-30 Semiconductor device, semiconductor device mounting method, and electro-optical device manufacturing method Expired - Fee Related JP3656488B2 (en)

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