JP2005167274A - Semiconductor device, method for manufacturing same, and liquid crystal display device - Google Patents

Semiconductor device, method for manufacturing same, and liquid crystal display device Download PDF

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JP2005167274A
JP2005167274A JP2005013937A JP2005013937A JP2005167274A JP 2005167274 A JP2005167274 A JP 2005167274A JP 2005013937 A JP2005013937 A JP 2005013937A JP 2005013937 A JP2005013937 A JP 2005013937A JP 2005167274 A JP2005167274 A JP 2005167274A
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conductive particles
liquid crystal
semiconductor device
substrate
terminals
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Kazue Hoshina
和重 保科
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Seiko Epson Corp
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73203—Bump and layer connectors
    • H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/831—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus
    • H01L2224/83101—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus as prepeg comprising a layer connector, e.g. provided in an insulating plate member
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1306—Field-effect transistor [FET]
    • H01L2924/13091—Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]

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  • Electrodes Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Wire Bonding (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor device capable of preventing the occurrence of transverse conduction due to conductive particles even when the pitch between terminals becomes narrower and of mounting at a low cost, a method for manufacturing the same, and a liquid crystal device thereof. <P>SOLUTION: An IC chip, namely a semiconductor device 1 comprises multiple terminals exposing to the outside, that is, pads 6 as well as a built-in semiconductor. On the surface of the pad 6, conductive particles 7 are mounted and on the surface region other than the pad 6 of the semiconductor, the conductive particles 7 are not mounted. Since there exist no conductive particles 7 between neighboring pads 6, transverse conduction is not caused to occur between the neighboring pads 6 when mounting the IC chip 1 having a structure whose pitch between terminals of the pads 6 is narrow on a substrate, on which it is to be mounted. The conductive particles 7 on the surface of the pads 6 are formed by spraying an adhesive mixed with conductive particles using a nozzle having a narrow opening. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

本発明は、パッドを有する半導体装置及び該半導体装置の製造方法に関する。また本発明は、そのような半導体装置が実装された液晶装置に関する。     The present invention relates to a semiconductor device having a pad and a method for manufacturing the semiconductor device. The present invention also relates to a liquid crystal device in which such a semiconductor device is mounted.

近年、各種の電子機器に半導体装置が広く用いられている。この半導体装置とは、ＩＣチップそのものや、ＩＣチップと基板とが一体になっているＩＣ構造体のことである。ＩＣチップとしては、パッケージングされていないベアチップＩＣや、パッケージングされていて裏面に端子を持つＩＣ等が知られている。   In recent years, semiconductor devices have been widely used in various electronic devices. The semiconductor device is an IC chip itself or an IC structure in which an IC chip and a substrate are integrated. As an IC chip, a bare chip IC that is not packaged, an IC that is packaged and has terminals on the back surface, and the like are known.

また、上記のＩＣ構造体としては、複数のＩＣを１つの基板に搭載した構造のＣＯＢ（Chip On Board）や、複数のＩＣを１つのモジュール内に収容したＭＣＭ（Multi Chip Module）や、ＦＰＣ（Flexible Printed Circuit）にＩＣを搭載した構造のＣＯＦ（Chip On FPC）等が知られている。   In addition, as the IC structure, a COB (Chip On Board) having a structure in which a plurality of ICs are mounted on one substrate, a MCM (Multi Chip Module) in which a plurality of ICs are accommodated in one module, an FPC, and the like. A COF (Chip On FPC) having a structure in which an IC is mounted on a (Flexible Printed Circuit) is known.

従来、半導体装置を基板に実装する方法として、図１０（ａ）に示すように、ＡＣＦ（ Anisotropic Conductive Film：異方性導電膜）６０を間に挟んで半導体装置５１の半導体装置側端子（電極端子）５６を基板５４の基板側端子（電極端子）５９へ軽く押し付けて仮装着し、さらに熱圧着処理、すなわち加熱下で加圧するという方法が知られている。半導体装置側端子５６は、Ａｌ（アルミニウム）等によって形成されたパッド５２の上にＡｕ（金）によって形成されたバンプ５３を付着することによって形成されるのが一般的である。   Conventionally, as a method of mounting a semiconductor device on a substrate, as shown in FIG. 10A, a semiconductor device side terminal (electrode) of the semiconductor device 51 with an ACF (Anisotropic Conductive Film) 60 interposed therebetween, as shown in FIG. A method is known in which a terminal 56 is lightly pressed and temporarily attached to a substrate-side terminal (electrode terminal) 59 of the substrate 54, and is further subjected to thermocompression treatment, that is, pressurization under heating. The semiconductor device side terminal 56 is generally formed by attaching a bump 53 made of Au (gold) on a pad 52 made of Al (aluminum) or the like.

ＡＣＦ６０は、周知の通り、一対の端子間を異方性を持たせて電気的に一括接続すると共に、２つの部材間を機械的に接続するために用いられる導電性のある高分子フィルムであって、例えば、紫外線硬化性、熱可塑性又は熱硬化性の樹脂フィルム５８の中に多数の導電粒子５７を分散させることによって形成される。このＡＣＦ６０を挟んで基板５４と半導体装置５１とを加熱しながら或いは紫外線照射しながら圧着することにより、図１０（ｂ）に示すように、半導体装置側端子５６と基板側端子５９との間において単一方向の導電性を持つ接続を実現する。   As is well known, the ACF 60 is a conductive polymer film that is used to electrically connect together a pair of terminals with anisotropy and mechanically connect between two members. For example, the conductive film 57 is formed by dispersing a large number of conductive particles 57 in an ultraviolet curable, thermoplastic or thermosetting resin film 58. By pressing the substrate 54 and the semiconductor device 51 while heating or irradiating ultraviolet rays with the ACF 60 interposed therebetween, as shown in FIG. 10B, between the semiconductor device side terminal 56 and the substrate side terminal 59, Realize connections with unidirectional conductivity.

しかしながら、ＡＣＦを用いた従来の実装方法では、近年における産業界の要求に応じて導電接続の対象である端子の間隔、すなわちピッチを狭くするとき、隣り合う端子間に存在する導電粒子によって当該一対の端子がショートするという、いわゆる横導通が発生して、接続信頼性が低下するという問題があった。   However, in the conventional mounting method using the ACF, when the interval between the terminals to be conductively connected, that is, the pitch is narrowed according to the demands of the industry in recent years, the pair of conductive particles existing between adjacent terminals is used. There is a problem that so-called lateral conduction occurs in which the terminals of the terminal are short-circuited, resulting in a decrease in connection reliability.

また、半導体装置を基板に実装するに当たって高価なＡＣＦ及び金バンプが必要となるので、部品コストが高くなるという問題があった。また、半導体装置を基板に実装するのに先立って基板の適所にＡＣＦを付着する工程が必要になるので、製造工数が多くなって製造コストが高くなるという問題もあった。   In addition, expensive ACFs and gold bumps are required for mounting the semiconductor device on the substrate, which raises a problem that the component cost increases. In addition, since a step of attaching ACF to an appropriate position of the substrate is required prior to mounting the semiconductor device on the substrate, there is a problem that the number of manufacturing steps increases and the manufacturing cost increases.

本発明は、上記の問題点に鑑みて成されたものであって、端子間ピッチが狭くなる場合でも導電粒子による端子間の横導通の発生を防止でき、しかも安価に実装を行うことができる半導体装置及びその製造方法を提供することを目的とする。また、そのような半導体装置を用いる液晶装置を提供することを目的とする。   The present invention has been made in view of the above problems, and even when the pitch between terminals becomes narrow, it is possible to prevent the occurrence of lateral conduction between terminals due to conductive particles, and it is possible to mount at low cost. An object of the present invention is to provide a semiconductor device and a manufacturing method thereof. Another object is to provide a liquid crystal device using such a semiconductor device.

（１）上記の目的を達成するため、本発明に係る半導体装置は、所定の領域に配置
された複数の電極端子を備え、前記複数の電極端子表面に導電粒子が付着され、前記複数の電極端子表面以外は導電粒子が付着されない半導体装置であって、前記導電粒子の付着が、細い開口部を有するノズルを用いて、導電粒子を混入した接着剤を吹き付けることによりなることを特徴とする (1) In order to achieve the above object, a semiconductor device according to the present invention includes a plurality of electrode terminals arranged in a predetermined region, and conductive particles are attached to surfaces of the plurality of electrode terminals, and the plurality of electrodes A semiconductor device to which conductive particles other than the terminal surface are not attached, wherein the conductive particles are attached by spraying an adhesive mixed with the conductive particles using a nozzle having a thin opening.

この半導体装置によれば、半導体装置の端子側表面、すなわち能動面において、端子の表面だけに導電粒子が載置され、それ以外の領域には導電粒子が設けられないので、端子間ピッチが狭くなっても隣り合う一対の端子が導電粒子によってショートすること、すなわち端子間における横導通が起こることがなくなる。   According to this semiconductor device, the conductive particles are placed only on the surface of the terminal on the terminal-side surface of the semiconductor device, that is, the active surface, and no conductive particles are provided in the other regions. Even if this occurs, a pair of adjacent terminals are short-circuited by the conductive particles, that is, lateral conduction between the terminals does not occur.

また、導電粒子が設けられる領域が端子の表面に限定されるので、横導通の発生を心配することなく１つの端子の表面に分散する導電粒子の量、いわゆる分散量を必要なだけ多くすることができる。これにより、端子間ピッチが狭くなる場合、すなわち端子幅が狭くなる場合でも、十分な導通面積を確保できる。   In addition, since the region where the conductive particles are provided is limited to the surface of the terminal, the amount of conductive particles dispersed on the surface of one terminal, so-called dispersion amount, is increased as necessary without worrying about the occurrence of lateral conduction. Can do. Thereby, even when the pitch between terminals becomes narrow, that is, when the terminal width becomes narrow, a sufficient conduction area can be secured.

また、半導体装置を基板に実装する際にＡＣＦ等といった高価な異方性導電接着要素が不要となり、さらにそのＡＣＦを基板に付着するための工程も不要となるので、コストダウンを達成できる。   Further, when the semiconductor device is mounted on the substrate, an expensive anisotropic conductive adhesive element such as ACF is not required, and a process for attaching the ACF to the substrate is not required, so that cost reduction can be achieved.

（２）更に本願発明は、上記（１）項記載の半導体装置において、前記導電粒子の付着が、インクジェット方式を用いて、導電粒子を混入した接着剤を吹き付けることによりなることを特徴とする。 (2) Further, the invention of the present application is characterized in that in the semiconductor device according to the above item (1), the adhesion of the conductive particles is performed by spraying an adhesive mixed with the conductive particles using an ink jet method.

上記（１）項又は（２）項記載の半導体装置においては、導電粒子を含む接着剤を前記電極端子の表面に適量だけ付着することにより、導電粒子を端子の表面に載置することができる。   In the semiconductor device according to the item (1) or (2), the conductive particles can be placed on the surface of the terminal by adhering an appropriate amount of the adhesive containing the conductive particles to the surface of the electrode terminal. .

（３）又本願発明に係る半導体装置の製造方法は、所定の領域に配置された複数の電
極端子を備え、前記複数の電極端子表面に導電粒子が付着され、前記複数の電極端子表面以外は導電粒子が付着されない半導体装置の製造方法であって、前記複数の電極端子表面の導電粒子の付着を、前記複数の電極端子上に前記導電粒子を混入した接着剤を、細い開口部を有するノズルを用いて吹き付けることにより行うことを特徴とする。 (3) A method of manufacturing a semiconductor device according to the present invention includes a plurality of electrode terminals arranged in a predetermined region, and conductive particles are attached to the surfaces of the plurality of electrode terminals, except for the surfaces of the plurality of electrode terminals. A method of manufacturing a semiconductor device to which conductive particles are not attached, the adhesion of conductive particles on the surface of the plurality of electrode terminals, an adhesive mixed with the conductive particles on the plurality of electrode terminals, and a nozzle having a narrow opening It is characterized by performing by spraying using.

この半導体装置の製造方法によれば、半導体装置の端子側表面、すなわち能動面において、端子の表面だけに導電粒子が載置され、それ以外の領域には導電粒子が設けられないので、端子間ピッチが狭くなっても隣り合う一対の端子が導電粒子によってショートすること、すなわち端子間における横導通が起こることがなくなる。   According to this method for manufacturing a semiconductor device, since conductive particles are placed only on the surface of the terminal on the terminal side surface of the semiconductor device, that is, the active surface, and no conductive particles are provided in other regions, Even if the pitch is narrowed, a pair of adjacent terminals are not short-circuited by conductive particles, that is, lateral conduction between the terminals does not occur.

（４）更に本願発明は、前記（３）に記載の半導体装置の製造方法において、前記導電粒子を混入する接着剤をインクジェット方式により前記電極端子上に吹き付けることを特徴とする (4) Further, the invention of the present application is characterized in that, in the method for manufacturing a semiconductor device according to (3), an adhesive mixed with the conductive particles is sprayed onto the electrode terminal by an ink jet method.

上記（３）項又は（４）項記載の半導体装置の製造方法においては、導電粒子を含む接着剤を前記電極端子の表面に適量だけ付着することにより、導電粒子を端子の表面に載置することができる。   In the method for manufacturing a semiconductor device according to the above item (3) or (4), the conductive particles are placed on the surface of the terminal by attaching an appropriate amount of an adhesive containing the conductive particles to the surface of the electrode terminal. be able to.

（５）また本願発明に係る液晶装置は、液晶層を狭持するパネル構造である液晶パネルを有する液晶装置であって、上記（１）又は（２）に記載の半導体装置が前記液晶パネルに実装されていることを特徴とする。 (5) A liquid crystal device according to the present invention is a liquid crystal device having a liquid crystal panel having a panel structure sandwiching a liquid crystal layer, and the semiconductor device according to the above (1) or (2) is included in the liquid crystal panel. It is implemented.

この液晶装置によれば、半導体装置の液晶パネルへの実装の際にＡＣＦ等といった高価な異方性導電接着要素が不要となり、さらにそのＡＣＦを基板に付着するための工程も不要となるので、コストダウンを達成できる。 According to this liquid crystal device, an expensive anisotropic conductive adhesive element such as ACF is not required when the semiconductor device is mounted on the liquid crystal panel, and a process for attaching the ACF to the substrate is also unnecessary. Cost reduction can be achieved.

（６）更に本願発明に係る液晶装置は、上記（５）項記載の液晶装置において、前記半導体装置が液晶駆動用ＩＣであることを特徴とする。 (6) Further, the liquid crystal device according to the present invention is characterized in that in the liquid crystal device described in the above item (5), the semiconductor device is a liquid crystal driving IC.

この液晶装置によれば、半導体装置の端子側表面、すなわち能動面において、端子の表面だけに導電粒子が載置され、それ以外の領域には導電粒子が設けられないので、端子間ピッチが狭くなっても隣り合う一対の端子が導電粒子によってショートすること、すなわち横導通が起こることがなくなる。よって、電気光学装置を駆動する半導体装置からの出力端子数が増やすことができるので、１つの半導体装置によって液晶装置の画素数を増やすことができる。または、半導体装置のチップ面積を小さくできるので、液晶装置の額縁面積を小さくすることができる。   According to this liquid crystal device, since the conductive particles are placed only on the surface of the terminal on the surface on the terminal side of the semiconductor device, that is, the active surface, and no conductive particles are provided in other regions, the pitch between the terminals is narrow. Even if it becomes, a pair of adjacent terminals are short-circuited by the conductive particles, that is, lateral conduction does not occur. Accordingly, since the number of output terminals from the semiconductor device that drives the electro-optical device can be increased, the number of pixels of the liquid crystal device can be increased by one semiconductor device. Alternatively, since the chip area of the semiconductor device can be reduced, the frame area of the liquid crystal device can be reduced.

（第１実施形態）
以下、本発明に係る半導体装置を、液晶装置に用いられる液晶駆動用ＩＣ、すなわちベアチップＩＣを例に挙げて説明する。また、本発明に係る半導体装置の実装方法を、電気光学装置の製法工程において駆動用ＩＣをパネル基板に実装する場合を例に挙げて説明する。なお、電気光学装置として、液晶装置を例にとって説明する。 (First embodiment)
Hereinafter, a semiconductor device according to the present invention will be described by taking a liquid crystal driving IC used in a liquid crystal device, that is, a bare chip IC as an example. Further, the semiconductor device mounting method according to the present invention will be described by taking as an example the case where the driving IC is mounted on the panel substrate in the manufacturing process of the electro-optical device. A liquid crystal device will be described as an example of the electro-optical device.

図１（ａ）は、本発明に係る半導体装置の一実施形態である液晶駆動用ＩＣ１を示している。この液晶駆動用ＩＣ１は、半導体基板によって形成された基板２と、その基板２の表面に形成されたＭＯＳトランジスタ、抵抗、容量、配線等によって電気回路が構成されてなる集積回路３と、その集積回路３の表面を覆う絶縁膜（パシベーション膜）４と、集積回路３の入力端子、出力端子、電源端子等に電気的につながる複数のパッド６とを有する。パッド６は、本発明における端子又は半導体装置側端子、すなわち電極端子として作用する。   FIG. 1A shows a liquid crystal driving IC 1 which is an embodiment of a semiconductor device according to the present invention. The liquid crystal driving IC 1 includes a substrate 2 formed of a semiconductor substrate, an integrated circuit 3 in which an electric circuit is configured by a MOS transistor, a resistor, a capacitor, a wiring, and the like formed on the surface of the substrate 2, and an integrated circuit thereof. An insulating film (passivation film) 4 covering the surface of the circuit 3 and a plurality of pads 6 electrically connected to input terminals, output terminals, power supply terminals and the like of the integrated circuit 3 are provided. The pad 6 functions as a terminal in the present invention or a semiconductor device side terminal, that is, an electrode terminal.

パッド６は、例えば、Ａｌ等のようにＡｕ等に比べて硬質の導電素材によって形成され、拡大断面図（ｂ）に示すように、絶縁膜４によって覆われることなく外部に露出する。そして、そのパッド６の表面には、複数の導電粒子７が分散状態で混入された接着剤８が適当量だけ付着、例えば塗布されている。接着剤８には、従来からＡＣＦとして用いていたような、加熱により硬化する絶縁性樹脂や紫外線照射により硬化する絶縁性樹脂などを用いることができる。   The pad 6 is formed of a conductive material harder than Au or the like, such as Al, and is exposed to the outside without being covered by the insulating film 4 as shown in the enlarged sectional view (b). An appropriate amount of an adhesive 8 mixed with a plurality of conductive particles 7 in a dispersed state is attached, for example, applied to the surface of the pad 6. For the adhesive 8, an insulating resin that is cured by heating, an insulating resin that is cured by ultraviolet irradiation, or the like, which has been conventionally used as an ACF, can be used.

導電粒子７は、例えば、図１（ｃ）の断面構成図に示すように、弾性を備えた絶縁性の樹脂ボール９の表面にＮｉ（ニッケル）層１１を被膜形成し、そのＮｉ層１１の上にさらにＡｕ層１２を被膜形成することによって作製される。Ｎｉ層１１及びＡｕ層１２は、例えばメッキによって形成できる。導電粒子７は、その芯材として弾性樹脂ボール９を用いることにより、全体としても弾性を有している。   For example, as shown in the cross-sectional configuration diagram of FIG. 1C, the conductive particles 7 are formed by forming a Ni (nickel) layer 11 on the surface of an insulating resin ball 9 having elasticity, It is produced by forming a film of the Au layer 12 thereon. The Ni layer 11 and the Au layer 12 can be formed by plating, for example. The conductive particles 7 have elasticity as a whole by using elastic resin balls 9 as the core material.

なお、半導体装置のパッド６部分のみに導電粒子７を混入させた接着剤８を塗布するには、例えば、インクジェット方式のように、細い開口部を有するノズルをパッド６上に位置決めしてから上記接着剤８を所定量分、パッド６上に吹き付ける、等の種々の方法が考えられる。   In order to apply the adhesive 8 in which the conductive particles 7 are mixed only in the pad 6 portion of the semiconductor device, for example, a nozzle having a thin opening is positioned on the pad 6 and then the above-mentioned, as in the ink jet method. Various methods such as spraying a predetermined amount of the adhesive 8 on the pad 6 can be considered.

図２は、本発明に係る半導体装置の実装方法を用いて構成される液晶装置１０を示している。図３は、図２の液晶装置１０における切断線III−IIIでの部分断面図を示す。この液晶装置１０は、液晶層を挟持するパネル構造である液晶パネル１３に、本発明の半導体装置である液晶駆動用ＩＣ１ａ及び１ｂを実装し、さらに液晶パネル１３の一方の面に偏光板１６ａ及び半透過反射板（又は反射型表示の場合は反射板でもよい）１７を装着し、さらに液晶パネル１３の他方の面に位相差板１８及び偏光板１６ｂを装着することによって形成される。   FIG. 2 shows a liquid crystal device 10 configured by using the semiconductor device mounting method according to the present invention. FIG. 3 is a partial cross-sectional view taken along section line III-III in the liquid crystal device 10 of FIG. In this liquid crystal device 10, liquid crystal driving ICs 1 a and 1 b, which are semiconductor devices of the present invention, are mounted on a liquid crystal panel 13 having a panel structure that sandwiches a liquid crystal layer. Further, a polarizing plate 16 a and a polarizing plate 16 a on one surface of the liquid crystal panel 13 A transflective plate (or a reflective plate in the case of a reflective display) 17 is mounted, and a retardation plate 18 and a polarizing plate 16b are mounted on the other surface of the liquid crystal panel 13.

液晶パネル１３は、互いに対向して配置されていてシール材１９によって周囲が貼り合わされた一対のパネル基板１４ａ及び１４ｂを有する。第１パネル基板１４ａは図３に示すように基板素材２１ａを有し、その基板素材２１ａの液晶側表面、すなわち第２パネル基板１４ｂに対向する面には、走査電極又は信号電極の一方として作用する複数の第１電極２２ａが所定パターンに形成され、その上にオーバーコート層２３ａが形成され、さらにその上に配向膜２４ａが形成される。   The liquid crystal panel 13 includes a pair of panel substrates 14 a and 14 b that are arranged to face each other and are bonded together by a sealing material 19. As shown in FIG. 3, the first panel substrate 14a has a substrate material 21a, and the surface of the substrate material 21a on the liquid crystal side, that is, the surface facing the second panel substrate 14b, acts as one of a scanning electrode or a signal electrode. A plurality of first electrodes 22a are formed in a predetermined pattern, an overcoat layer 23a is formed thereon, and an alignment film 24a is further formed thereon.

また、基板素材２１ａの外側表面には光学素子としての既述の偏光板１６ａが例えば貼着によって装着され、さらにその外側に光学素子としての既述の半透過反射板１７が例えば貼着によって装着される。必要に応じて、基板素材２１ａと偏光板１６ａの間に位相差板を介在させてもよい。また、必要に応じて、半透過反射板１７の外側に照明装置としての導光板２６が設けられる。つまり、本実施形態の液晶装置１０では図３の上側面が視認側となる。なお、導光体２６の一辺にはＬＥＤや蛍光管等といった発光源（図示せず）が設けられる。   Further, the above-described polarizing plate 16a as an optical element is attached to the outer surface of the substrate material 21a by, for example, sticking, and the above-described transflective plate 17 as an optical element is further attached to the outer surface thereof by, for example, sticking. Is done. If necessary, a retardation plate may be interposed between the substrate material 21a and the polarizing plate 16a. Further, if necessary, a light guide plate 26 as an illumination device is provided outside the transflective plate 17. That is, in the liquid crystal device 10 of the present embodiment, the upper side surface of FIG. A light source (not shown) such as an LED or a fluorescent tube is provided on one side of the light guide 26.

第１パネル基板１４ａに対向する第２パネル基板１４ｂは基板素材２１ｂを有し、その基板素材２１ｂの液晶側表面、すなわち第１パネル基板１４ａに対向する面には、走査電極又は信号電極の他方として作用する複数の第２電極２２ｂが所定パターンに形成され、その上にオーバーコート層２３ｂが形成され、さらにその上に配向膜２４ｂが形成される。   The second panel substrate 14b facing the first panel substrate 14a has a substrate material 21b. The other side of the scanning electrode or the signal electrode is on the liquid crystal side surface of the substrate material 21b, that is, the surface facing the first panel substrate 14a. A plurality of second electrodes 22b functioning as a predetermined pattern are formed, an overcoat layer 23b is formed thereon, and an alignment film 24b is further formed thereon.

また、基板素材２１ｂの外側表面には光学素子としての既述の位相差板１８が例えば貼着によって装着され、さらにその上に光学素子としての既述の偏光板１６ｂが例えば貼着によって装着される。   Further, the above-described retardation plate 18 as an optical element is attached to the outer surface of the substrate material 21b by, for example, adhesion, and the above-described polarizing plate 16b as an optical element is further attached thereto by, for example, adhesion. The

なお、第１パネル基板１４ａ及び第２パネル基板１４ｂの双方又は一方に設けられる光学素子としては、上記したもの以外に必要に応じて他の素子、例えば光拡散板等が考えられる。また、基板素材２１ａ，２１ｂの一方の液晶層側の面には、必要に応じてその他の光学素子、例えばカラーフィルタ等を設けることもできる。   In addition, as an optical element provided in both or one side of the 1st panel board | substrate 14a and the 2nd panel board | substrate 14b, other elements, for example, a light diffusing plate etc., can be considered as needed other than the above. In addition, other optical elements such as a color filter can be provided on the surface of the substrate materials 21a and 21b on the one liquid crystal layer side as necessary.

基板素材２１ａ，２１ｂは、例えばガラス等といった硬質な光透過性材料や、プラスチック等といった可撓性を有する光透過性材料等によって所定形状、例えば長方形状や正方形状に形成される。また、第１電極２２ａ及び第２電極２２ｂは、例えばＩＴＯ（Indium Tin Oxide）等といった透明電極によって１０００オングストローム程度の厚さに形成され、オーバーコート層２３ａ，２３ｂは、例えば酸化珪素、酸化チタン又はそれらの混合物等によって８００オングストローム程度の厚さに形成され、そして配向膜２４ａ，２４ｂは、例えばポリイミド系樹脂によって８００オングストローム程度の厚さに形成される。   The substrate materials 21a and 21b are formed in a predetermined shape, for example, a rectangular shape or a square shape by using a hard light-transmitting material such as glass or the like, or a light-transmitting material having flexibility such as plastic. The first electrode 22a and the second electrode 22b are formed to a thickness of about 1000 angstroms by a transparent electrode such as ITO (Indium Tin Oxide), for example, and the overcoat layers 23a and 23b are made of, for example, silicon oxide, titanium oxide or The alignment film 24a, 24b is formed to a thickness of about 800 Å by, for example, a polyimide resin.

第１電極２２ａは、図２に示すように、複数の直線パターンを互いに平行に配列することによって、いわゆるストライプ状に形成される。一方、第２電極２２ｂは上記第１電極２２ａに交差するように複数の直線パターンを互いに平行に配列することによって、やはりストライプ状に形成される。これらの電極２２ａと電極２２ｂとが液晶層を介在してドットマトリクス状に交差する複数の点が、像を表示するための画素を形成する。そして、それら複数の画素によって区画形成される領域が、文字等といった像を表示するための表示領域となる。   As shown in FIG. 2, the first electrode 22a is formed in a so-called stripe shape by arranging a plurality of linear patterns in parallel with each other. On the other hand, the second electrode 22b is also formed in a stripe shape by arranging a plurality of linear patterns parallel to each other so as to intersect the first electrode 22a. A plurality of points where these electrodes 22a and 22b intersect with each other in the form of a dot matrix through a liquid crystal layer form a pixel for displaying an image. An area partitioned by the plurality of pixels is a display area for displaying an image such as a character.

以上のようにして形成された第１パネル基板１４ａ及び第２パネル基板１４ｂのいずれか一方の液晶側表面には、図３に示すように、複数のスペーサ２７が分散され、さらにいずれか一方のパネル基板の液晶側表面にシール材１９が例えば印刷によって図１に示すように枠状に設けられる。また、そのシール材１９の適所に液晶注入口１９ａが形成される。   As shown in FIG. 3, a plurality of spacers 27 are dispersed on one liquid crystal side surface of the first panel substrate 14a and the second panel substrate 14b formed as described above. A sealing material 19 is provided on the liquid crystal side surface of the panel substrate in a frame shape as shown in FIG. 1, for example, by printing. Further, a liquid crystal injection port 19 a is formed at an appropriate position of the sealing material 19.

両パネル基板１４ａ及び１４ｂの間にはスペーサ２７によって保持される均一な寸法、例えば５μｍ程度の間隙、いわゆるセルギャップが形成され、液晶注入口１９ａを通してそのセルギャップ内に液晶２８が注入され、その注入の完了後、液晶注入口１９ａが樹脂等によって封止される。   A uniform dimension held by the spacer 27, for example, a gap of about 5 μm, that is, a so-called cell gap is formed between the panel substrates 14a and 14b, and the liquid crystal 28 is injected into the cell gap through the liquid crystal injection port 19a. After the injection is completed, the liquid crystal injection port 19a is sealed with resin or the like.

図２において、第１パネル基板１４ａは、第２パネル基板１４ｂの外側であってさらにシール材１９の外側へ張り出す基板張出し部１４ｃを有する。そして、第１パネル基板１４ａ上の第１電極２２ａはその基板張出し部１４ｃへ直接に延び出て配線２９ａとなっている。また、基板張出し部１４ｃの辺端部には外部回路との間で制御信号、クロック信号、表示信号の各種信号や液晶駆動電圧及びＩＣ電源電圧を入力するための外部接続端子３１ａが形成される。   In FIG. 2, the first panel substrate 14 a has a substrate protruding portion 14 c that extends outside the second panel substrate 14 b and further to the outside of the sealing material 19. The first electrode 22a on the first panel substrate 14a extends directly to the substrate overhanging portion 14c to form a wiring 29a. Further, an external connection terminal 31a for inputting various signals such as a control signal, a clock signal, a display signal, a liquid crystal drive voltage, and an IC power supply voltage is formed at the side edge of the substrate extension 14c. .

第２パネル基板１４ｂは、第１パネル基板１４ａの外側であってさらにシール材１９の外側へ張り出す基板張出し部１４ｄを有する。そして、第２パネル基板１４ｂ上の第２電極２２ｂはその基板張出し部１４ｄへ直接に延び出て配線２９ｂとなっている。また、基板張出し部１４ｄの辺端部には外部回路との間で制御信号、クロック信号、表示信号の各種信号や液晶駆動電圧及びＩＣ電源電圧を入力するための外部接続端子３１ｂが形成される。   The second panel substrate 14 b has a substrate overhanging portion 14 d that extends outside the first panel substrate 14 a and further outside the sealing material 19. And the 2nd electrode 22b on the 2nd panel board | substrate 14b is directly extended to the board | substrate overhang | projection part 14d, and becomes the wiring 29b. Further, an external connection terminal 31b for inputting various signals such as a control signal, a clock signal, a display signal, a liquid crystal drive voltage, and an IC power supply voltage is formed at the side edge of the substrate extension 14d. .

各電極２２ａ，２２ｂ、それらにつながる配線２９ａ，２９ｂ及び外部接続端子３１ａ，３１ｂは、いずれも、実際には極めて狭い間隔で多数本がそれぞれの基板１４ａ及び１４ｂの表面に形成されるが、図２及びこれから説明する各図では構造を分かり易く示すために実際の間隔よりも広い間隔でそれらの電極等を模式的に図示し、さらに一部の電極の図示は省略してある。また、電極２２ａ及び２２ｂは、直線状に形成されることに限られず、適宜の文字、図形等といったパターンとして形成されることもある。   Each of the electrodes 22a and 22b, the wirings 29a and 29b connected to them, and the external connection terminals 31a and 31b are actually formed on the surfaces of the respective substrates 14a and 14b at a very narrow interval. In FIG. 2 and each figure to be described hereinafter, in order to show the structure in an easy-to-understand manner, those electrodes and the like are schematically shown at intervals wider than the actual intervals, and some of the electrodes are not shown. Further, the electrodes 22a and 22b are not limited to being formed in a straight line, and may be formed as a pattern such as an appropriate character or figure.

本実施形態の場合、液晶駆動用ＩＣ１ａ及び１ｂの各パッド６の表面には、図１（ｂ）に示すように、導電粒子７を分散状態で含む接着剤８、本実施形態の場合は熱硬化型あるいは紫外線硬化形の接着剤が付着される。図４は、液晶駆動用ＩＣ１ａを基板である第１パネル基板１４ａへ実装する状態を示している。図２において、液晶駆動用ＩＣ１ｂを基板である第２パネル基板１４ｂへ実装する場合も同様である。   In the case of this embodiment, an adhesive 8 containing conductive particles 7 in a dispersed state is provided on the surface of each pad 6 of the liquid crystal driving ICs 1a and 1b, as shown in FIG. A curable or ultraviolet curable adhesive is applied. FIG. 4 shows a state in which the liquid crystal driving IC 1a is mounted on the first panel substrate 14a which is a substrate. In FIG. 2, the same applies to the case where the liquid crystal driving IC 1b is mounted on the second panel substrate 14b which is a substrate.

図４において、液晶駆動用ＩＣ１ａは、パッド６と配線２９ａの電極端子及びパッド６と外部接続端子３１ａの電極端子がそれぞれ位置的に一致するように、第１パネル基板１４ａの基板張出し部１４ｃの表面に軽く押し付けられて、仮接着される。その後、基板張出し部１４ｃの裏面側を受け治具３２によって受けた状態で、液晶駆動用ＩＣ１ａを圧着ヘッド３３によって押圧する。   In FIG. 4, the liquid crystal driving IC 1a includes a substrate overhanging portion 14c of the first panel substrate 14a so that the electrode terminals of the pad 6 and the wiring 29a and the electrode terminals of the pad 6 and the external connection terminal 31a coincide with each other. Lightly pressed onto the surface and temporarily bonded. Thereafter, the liquid crystal driving IC 1 a is pressed by the pressure-bonding head 33 in a state where the back surface side of the substrate extending portion 14 c is received by the jig 32.

圧着ヘッド３３は図示しないヒータによって所定温度に加熱されており、よって、液晶駆動用ＩＣ１ａは基板張出し部１４ｃへ加熱下で加圧されることによって熱圧着される。この結果、図３に示すように、パッド６と配線２９ａ及びパッド６と外部接続端子３１ａがそれぞれ導電粒子７によって導電接続され、さらに接着剤８が加熱により硬化することによって液晶駆動用ＩＣ１ａが基板張出し部１４ｃに機械的に接着される。導電粒子７は、その内部に弾性を備えた樹脂ボール９を有するので、上記の熱圧着時に弾性変形し、これにより、確実な導電接続を実現できる。また、接着剤８が紫外線硬化樹脂であれば、紫外線照射下で加圧して圧着することにより、同様に、導電接続を行なうことができる。   The pressure-bonding head 33 is heated to a predetermined temperature by a heater (not shown). Therefore, the liquid crystal driving IC 1a is heat-bonded by being pressed against the substrate overhanging portion 14c under heating. As a result, as shown in FIG. 3, the pad 6 and the wiring 29a and the pad 6 and the external connection terminal 31a are conductively connected by the conductive particles 7, respectively, and the adhesive 8 is cured by heating, whereby the liquid crystal driving IC 1a is formed on the substrate. It is mechanically bonded to the overhanging portion 14c. Since the conductive particles 7 have the resin balls 9 with elasticity inside, the conductive particles 7 are elastically deformed at the time of the above-described thermocompression bonding, thereby realizing a reliable conductive connection. Further, if the adhesive 8 is an ultraviolet curable resin, the conductive connection can be similarly performed by pressurizing and pressure bonding under ultraviolet irradiation.

図２において、もう１つの液晶駆動用ＩＣ１ｂも、同様にして、第２パネル基板１４ｂの基板張出し部１４ｄの表面に実装される。   In FIG. 2, another liquid crystal driving IC 1b is similarly mounted on the surface of the substrate overhanging portion 14d of the second panel substrate 14b.

以上のようにして作製された液晶装置１０に関して、液晶駆動用ＩＣ１ａ及び液晶駆動用ＩＣ１ｂによって第１電極２２ａ又は第２電極２２ｂのいずれか一方に対して直線パターンに走査電圧を順次に印加し、さらにそれらの電極の他方に対して表示画像に基づいてデータ電圧をそれぞれの直線パターンに同時に印加することにより、両電圧の印加によって選択された各画素部分を通過する光を変調し、これを偏光板及び位相差板を介することによって、第１パネル基板１４ａ又は第２パネル基板１４ｂの外側、本実施形態では第２パネル基板１４ｂの外側に文字、数字等といった像を表示する。   With respect to the liquid crystal device 10 manufactured as described above, a scanning voltage is sequentially applied in a linear pattern to either the first electrode 22a or the second electrode 22b by the liquid crystal driving IC 1a and the liquid crystal driving IC 1b. Furthermore, by applying a data voltage to each linear pattern simultaneously based on the display image to the other of the electrodes, the light passing through each pixel portion selected by the application of both voltages is modulated and polarized. By using the plate and the phase difference plate, images such as letters and numbers are displayed outside the first panel substrate 14a or the second panel substrate 14b, in this embodiment, outside the second panel substrate 14b.

本実施形態では、図１（ａ）及び（ｂ）に示したように、液晶駆動用ＩＣ１ａ及び１ｂのパッド６側の表面、すなわち能動面において、パッド６の表面だけに導電粒子７を載置し、それ以外の領域には導電粒子７を設けないようにしたので、図４において配線２９ａの紙面垂直方向の端子間及び外部接続端子３１ａの紙面垂直方向の端子間には導電粒子７が存在せず、よって、配線２９ａ及び外部接続端子３１ａの端子間ピッチが狭くなったとしても、隣り合う一対の配線２９ａ及び隣り合う一対の外部接続端子３１ａが導電粒子７によってショートすること、すなわち端子間の横導通が起こることがなくなる。   In this embodiment, as shown in FIGS. 1A and 1B, the conductive particles 7 are placed only on the surface of the pad 6 on the surface on the pad 6 side of the liquid crystal driving ICs 1a and 1b, that is, the active surface. However, since the conductive particles 7 are not provided in other regions, the conductive particles 7 exist between the terminals in the vertical direction of the wiring 29a and between the terminals of the external connection terminals 31a in the vertical direction of the paper in FIG. Therefore, even if the pitch between the terminals of the wiring 29a and the external connection terminal 31a is narrowed, the pair of adjacent wirings 29a and the pair of adjacent external connection terminals 31a are short-circuited by the conductive particles 7, that is, between the terminals. No lateral conduction occurs.

また、導電粒子７が設けられる領域がパッド６の表面に限定されるので、横導通の発生を心配することなく１つのパッド６の表面に分散する導電粒子７の量、いわゆる分散量を必要なだけ多くすることができる。これにより、配線２９ａ等の端子間ピッチが狭くなる場合、すなわち配線２９ａ等の端子幅が狭くなる場合でも、十分な導通面積を確保できる。   Further, since the region where the conductive particles 7 are provided is limited to the surface of the pad 6, the amount of the conductive particles 7 dispersed on the surface of one pad 6 without worrying about the occurrence of lateral conduction, so-called dispersion amount is necessary. Can only do more. Thereby, even when the pitch between terminals of the wiring 29a or the like is narrowed, that is, when the terminal width of the wiring 29a or the like is narrowed, a sufficient conduction area can be secured.

また、液晶駆動用ＩＣ１ａ，１ｂをパネル基板１４ａ，１４ｂへ実装する際にＡＣＦ等といった高価な異方性導電接着要素が不要となり、さらにそのＡＣＦをパネル基板１４ａ，１４ｂに付着するための工程も不要となるので、コストダウンを達成できる。   Further, when mounting the liquid crystal driving ICs 1a and 1b on the panel substrates 14a and 14b, an expensive anisotropic conductive adhesive element such as ACF is not required, and there is a process for attaching the ACF to the panel substrates 14a and 14b. Cost reduction can be achieved because it is not necessary.

（第２実施形態）
図５及び図６は本発明に係る半導体装置の実装方法の他の実施形態を示している。上述した第１実施形態では、図４に示したように、第１パネル基板１４ａに対して特別な処理を施すことなく液晶駆動用ＩＣ１ａをその第１パネル基板１４ａの表面に実装した。 (Second Embodiment)
5 and 6 show another embodiment of a semiconductor device mounting method according to the present invention. In the first embodiment described above, as shown in FIG. 4, the liquid crystal driving IC 1a is mounted on the surface of the first panel substrate 14a without performing any special treatment on the first panel substrate 14a.

これに対し、図５に示す本実施形態では、第１パネル基板１４ａのＩＣ実装領域に予め接着剤３４を例えば塗布によって付着させた上で、圧着ヘッド３３及び受け治具３２を用いて液晶駆動用ＩＣ１ａに対して圧着処理を施すようにしてある。この結果、圧着処理が終了すると、図６に示すように、導電粒子７によって電極端子間の導電接続が達成され、さらに接着剤３４によって液晶駆動用ＩＣ１ａと基板張出し部１４ｃとがしっかりと機械的に接着される。なお、圧着時には、先に述べたように、接着剤８、３４の特性に応じて、加熱や紫外線照射を行なうことにより接着剤を硬化させる。   On the other hand, in the present embodiment shown in FIG. 5, the adhesive 34 is previously attached to the IC mounting region of the first panel substrate 14 a by, for example, application, and then the liquid crystal driving is performed using the pressure bonding head 33 and the receiving jig 32. The IC 1a is subjected to a crimping process. As a result, when the crimping process is completed, as shown in FIG. 6, conductive connection between the electrode terminals is achieved by the conductive particles 7, and the liquid crystal driving IC 1 a and the substrate overhanging portion 14 c are firmly mechanically bonded by the adhesive 34. Glued to. At the time of pressure bonding, as described above, the adhesive is cured by heating or ultraviolet irradiation according to the characteristics of the adhesives 8 and 34.

本実施形態において、接着剤３４を用いること以外の構造は図１から図４を用いて先に説明した第１実施形態と同じとすることができるので、その構造に関する説明は省略する。また、接着剤３４は、熱可塑性樹脂、熱硬化性樹脂、紫外線硬化性樹脂、その他各種の接着剤を用いることができ、硬化する方法は接着剤８と同じであることが好ましい。   In the present embodiment, the structure other than the use of the adhesive 34 can be the same as that of the first embodiment described above with reference to FIGS. As the adhesive 34, a thermoplastic resin, a thermosetting resin, an ultraviolet curable resin, and other various adhesives can be used, and the curing method is preferably the same as the adhesive 8.

（第３実施形態）
図７は本発明に係る半導体装置の他の実施形態に係る液晶駆動用ＩＣ４１を示している。ここに示す半導体装置４１が図１に示した先の実施形態に係る半導体装置１と異なる点は、導電粒子の構成に改変を加え、さらにその導電粒子のパッドへの載置の仕方に改変を加えたことである。 (Third embodiment)
FIG. 7 shows a liquid crystal driving IC 41 according to another embodiment of the semiconductor device according to the present invention. The semiconductor device 41 shown here is different from the semiconductor device 1 according to the previous embodiment shown in FIG. 1 in that the configuration of the conductive particles is modified, and further, the method of placing the conductive particles on the pad is modified. It is added.

具体的には、例えば図７（ｃ）に示すように、本実施形態の導電粒子３７は、弾性を有する樹脂ボール９の表面にＮｉ（ニッケル）層１１を被覆形成し、そのＮｉ層１１の上にＡｕ層１２を被覆形成し、さらにその上に接着剤層３８を被覆形成することによって作製される。Ｎｉ層１１及びＡｕ層１２は、例えばメッキによって形成でき、接着剤層３８は塗布、あるいはその他の任意の方法によって形成できる。接着剤３８には、従来からＡＣＦとして用いていたような、加熱により硬化する絶縁性樹脂や紫外線照射により硬化する絶縁性樹脂などを用いることができる。   Specifically, for example, as shown in FIG. 7C, the conductive particles 37 of the present embodiment are formed by coating a Ni (nickel) layer 11 on the surface of a resin ball 9 having elasticity. It is produced by coating the Au layer 12 thereon and further coating the adhesive layer 38 thereon. The Ni layer 11 and the Au layer 12 can be formed by plating, for example, and the adhesive layer 38 can be formed by coating or any other method. As the adhesive 38, an insulating resin that is cured by heating, an insulating resin that is cured by ultraviolet irradiation, or the like, which has been conventionally used as an ACF, can be used.

この導電粒子３７は、接着剤層３８の作用により、図７（ｂ）に示すように、特別な接着剤を用いることなく直接にパッド６の表面に載置される。また、本実施形態の液晶駆動用ＩＣ４１を図２に示した液晶装置１０のパネル基板に実装する際には、例えば図８に示すように、第１パネル基板１４ａの基板張出し部１４ｃのＩＣ実装領域に図５で用いたものと同様な接着剤３４を予め付着しておき、その上に液晶駆動用ＩＣ４１を仮装着する。   The conductive particles 37 are placed directly on the surface of the pad 6 by using the adhesive layer 38 without using a special adhesive, as shown in FIG. 7B. Further, when the liquid crystal driving IC 41 of the present embodiment is mounted on the panel substrate of the liquid crystal device 10 shown in FIG. 2, for example, as shown in FIG. 8, the IC mounting of the substrate overhanging portion 14c of the first panel substrate 14a is performed. An adhesive 34 similar to that used in FIG. 5 is attached in advance to the region, and a liquid crystal driving IC 41 is temporarily mounted thereon.

そして、受け治具３２及び圧着ヘッド３３を用いて圧着処理を施すことにより、図９に示すように、液晶駆動用ＩＣ４１を基板張出し部１４ｃの表面に実装する。なお、圧着時には、先に述べたように、接着剤３８、３４の特性に応じて、加熱や紫外線照射を行なうことにより接着剤を硬化させる。   Then, by performing a crimping process using the receiving jig 32 and the crimping head 33, as shown in FIG. 9, the liquid crystal driving IC 41 is mounted on the surface of the substrate overhanging portion 14c. At the time of pressure bonding, as described above, the adhesive is cured by heating or ultraviolet irradiation according to the characteristics of the adhesives 38 and 34.

この実装により、液晶駆動用ＩＣ４１のパッド６と配線２９ａ及びパッド６と外部接続端子３１ａの電極端子が導電粒子３７によって互いに導電接続され、さらに液晶駆動用ＩＣ４１と基板張出し部１４ｃとが接着剤３４によって機械的に接着される。接着剤３４は、熱可塑性樹脂、熱硬化性樹脂、紫外線硬化性樹脂、その他各種の接着剤を用いることができ、硬化する方法は接着剤３８と同じであることが好ましい。   By this mounting, the pad 6 and the wiring 29a of the liquid crystal driving IC 41 and the electrode terminals of the pad 6 and the external connection terminal 31a are conductively connected to each other by the conductive particles 37, and the liquid crystal driving IC 41 and the substrate overhanging portion 14c are further bonded to the adhesive 34. Are mechanically bonded together. As the adhesive 34, a thermoplastic resin, a thermosetting resin, an ultraviolet curable resin, and other various adhesives can be used, and the curing method is preferably the same as the adhesive 38.

（その他の実施形態）
以上、好ましい実施形態を挙げて本発明を説明したが、本発明はその実施形態に限定されるものでなく、請求の範囲に記載した発明の範囲内で種々に改変できる。 (Other embodiments)
The present invention has been described with reference to the preferred embodiments. However, the present invention is not limited to the embodiments, and various modifications can be made within the scope of the invention described in the claims.

例えば、図１及び図７では、パッケージングされていないベアチップＩＣに対して本発明を適用した場合を例示したが、本発明に係る半導体装置は端子が外部へ露出する構造のその他の任意の半導体装置に対しても適用することができる。   For example, FIGS. 1 and 7 illustrate the case where the present invention is applied to an unpackaged bare chip IC, but the semiconductor device according to the present invention is any other semiconductor having a structure in which the terminal is exposed to the outside. It can also be applied to a device.

また、以上の説明では、半導体装置としての液晶駆動用ＩＣを液晶装置に実装する場合を例示したが、半導体装置は液晶装置以外の任意の電気光学装置、例えば電気光学物質としてＥＬ（エレクトロルミネッセンス）素子を用いた光学装置や、プラズマディスプレイ（ＰＤＰ）や、フィールドエミッションディスプレイ（ＦＥＤ）等の電気光学装置全般に対して適用することもできる。なお、電気光学材料として液晶ではなく、ＥＬを用いる場合、ＥＬを挟む一対の電極が積層形成されるので、一枚の基板のみでよい。   Further, in the above description, the case where the liquid crystal driving IC as the semiconductor device is mounted on the liquid crystal device has been exemplified. However, the semiconductor device may be any electro-optical device other than the liquid crystal device, for example, EL (electroluminescence) as an electro-optical material. The present invention can also be applied to optical devices using elements, electro-optical devices in general, such as a plasma display (PDP) and a field emission display (FED). Note that in the case of using EL instead of liquid crystal as the electro-optical material, a pair of electrodes sandwiching the EL are stacked, so that only one substrate is required.

また、図１及び図７に示す実施形態では、パッド６の上に導電粒子７を載置したが、場合によっては、パッド６の上にＡｕバンプを形成して端子を構成し、そのＡｕバンプの上に導電粒子を載置することもできる。   In the embodiment shown in FIGS. 1 and 7, the conductive particles 7 are placed on the pads 6. However, in some cases, Au bumps are formed on the pads 6 to form terminals, and the Au bumps. Conductive particles can be placed on the substrate.

（発明の効果）
本発明に係る半導体装置及びその実装方法によれば、半導体装置の端子側表面、すなわち能動面において、電極端子の表面だけに導電粒子が載置され、それ以外の領域には導電粒子が設けられないので、端子間ピッチが狭くなっても隣り合う一対の端子が導電粒子によってショートすること、すなわち横導通が起こることがなくなった。 (The invention's effect)
According to the semiconductor device and the mounting method thereof according to the present invention, the conductive particles are placed only on the surface of the electrode terminal on the terminal side surface of the semiconductor device, that is, the active surface, and the conductive particles are provided in other regions. Therefore, even if the pitch between the terminals is narrowed, a pair of adjacent terminals are not short-circuited by the conductive particles, that is, lateral conduction does not occur.

また、導電粒子が設けられる領域が端子の表面に限定されるので、横導通の発生を心配することなく１つの端子の表面に分散する導電粒子の量、いわゆる分散量を必要なだけ多くすることができる。これにより、端子間ピッチが狭くなる場合、すなわち端子幅が狭くなる場合でも、十分な導通面積を確保できる。   In addition, since the region where the conductive particles are provided is limited to the surface of the terminal, the amount of conductive particles dispersed on the surface of one terminal, so-called dispersion amount, is increased as necessary without worrying about the occurrence of lateral conduction. Can do. Thereby, even when the pitch between terminals becomes narrow, that is, when the terminal width becomes narrow, a sufficient conduction area can be secured.

また、半導体装置を基板へ実装する際にＡＣＦ等といった高価な異方性導電接着要素が不要となり、さらにそのＡＣＦを基板に付着するための工程も不要となるので、コストダウンを達成できる。   Further, when the semiconductor device is mounted on the substrate, an expensive anisotropic conductive adhesive element such as ACF is not required, and further, a process for attaching the ACF to the substrate is not required, so that cost reduction can be achieved.

本発明に係る半導体装置の一実施形態を示す斜視図であり、（ａ）はその全体の外観を示し、（ｂ）は端子部分を拡大して示し、（ｃ）は導電粒子の断面構造を示している。1A and 1B are perspective views showing an embodiment of a semiconductor device according to the present invention, in which FIG. 1A shows the overall appearance, FIG. 2B shows an enlarged terminal portion, and FIG. 2C shows a cross-sectional structure of conductive particles. Show. 本発明に係る半導体装置の実装方法を用いて構成される電気光学装置の一例である液晶装置を分解状態で示す斜視図である。1 is a perspective view showing an exploded state of a liquid crystal device which is an example of an electro-optical device configured using a semiconductor device mounting method according to the present invention. 図２におけるＩＩＩ−ＩＩＩ線に従った断面図である。It is sectional drawing according to the III-III line in FIG. 本発明に係る半導体装置の実装方法を説明するための図である。It is a figure for demonstrating the mounting method of the semiconductor device which concerns on this invention. 本発明に係る半導体装置の他の実装方法を説明するための図である。It is a figure for demonstrating the other mounting method of the semiconductor device which concerns on this invention. 図５に示す実装方法によって作製された実装構造を示す断面図である。It is sectional drawing which shows the mounting structure produced by the mounting method shown in FIG. 本発明に係る半導体装置の他の実施形態を示す斜視図であり、（ａ）はその全体の外観を示し、（ｂ）は端子部分を拡大して示し、（ｃ）は導電粒子の断面構造を示している。It is a perspective view which shows other embodiment of the semiconductor device which concerns on this invention, (a) shows the whole external appearance, (b) expands and shows a terminal part, (c) is sectional structure of an electroconductive particle. Is shown. 図７に示す半導体装置を基板へ実装するための実装方法の一実施形態を示す断面図である。It is sectional drawing which shows one Embodiment of the mounting method for mounting the semiconductor device shown in FIG. 7 on a board | substrate. 図８に示す実装方法によって作製された実装構造を示す断面図である。It is sectional drawing which shows the mounting structure produced by the mounting method shown in FIG. 従来の半導体装置の実装方法の一例を示す断面図であり、（ａ）は実装途中を示し、（ｂ）は実装作業後の実装構造を示している。It is sectional drawing which shows an example of the mounting method of the conventional semiconductor device, (a) shows the middle of mounting and (b) has shown the mounting structure after the mounting operation.

符号の説明Explanation of symbols

１，１ａ，１ｂ 液晶駆動用ＩＣ（半導体装置）
２ 基板
３ 集積回路
４ 絶縁膜
６ パッド（電極端子）
７ 導電粒子
８ 接着剤
９ 樹脂ボール
１０ 液晶装置
１１ Ｎｉ層
１２ Ａｕ層
１３ 液晶パネル
１４ａ，１４ｂ パネル基板（基板）
２１ａ，２１ｂ 基板素材
２２ａ，２２ｂ 電極
２８ 液晶
２９ａ，２９ｂ 配線（基板側電極端子）
３１ａ，３１ｂ 外部接続端子（基板側電極端子）
３２ 受け治具
３３ 圧着ヘッド
３４ 接着剤
３７ 導電粒子
３８ 接着剤層
４１ 液晶駆動用ＩＣ（半導体装置） 1,1a, 1b Liquid crystal driving IC (semiconductor device)
2 Substrate 3 Integrated circuit 4 Insulating film 6 Pad (electrode terminal)
7 Conductive Particles 8 Adhesive 9 Resin Ball 10 Liquid Crystal Device 11 Ni Layer 12 Au Layer 13 Liquid Crystal Panels 14a and 14b Panel Substrate (Substrate)
21a, 21b Substrate material 22a, 22b Electrode 28 Liquid crystal 29a, 29b Wiring (substrate-side electrode terminal)
31a, 31b External connection terminal (board-side electrode terminal)
32 receiving jig 33 pressure bonding head 34 adhesive 37 conductive particles 38 adhesive layer 41 liquid crystal driving IC (semiconductor device)

Claims (6)

所定の領域に配置された複数の電極端子を備え、前記複数の電極端子表
面に導電粒子が付着され、前記複数の電極端子表面以外は導電粒子が付着されない半導体装置であって、
前記導電粒子の付着が、細い開口部を有するノズルを用いて、導電粒子を混入した接着剤
を吹き付けることによりなることを特徴とする半導体装置。 A semiconductor device comprising a plurality of electrode terminals arranged in a predetermined region, wherein conductive particles are attached to the surfaces of the plurality of electrode terminals, and conductive particles are not attached to surfaces other than the surfaces of the plurality of electrode terminals,
The semiconductor device is characterized in that the conductive particles are attached by spraying an adhesive mixed with conductive particles using a nozzle having a thin opening. 請求項１に記載の半導体装置において、前記導電粒子の付着が、インク
ジェット方式を用いて、導電粒子を混入した接着剤を吹き付けることによりなることを特
徴とする半導体装置。 2. The semiconductor device according to claim 1, wherein the conductive particles are attached by spraying an adhesive mixed with the conductive particles by using an inkjet method. 3. 所定の領域に配置された複数の電極端子を備え、前記複数の電極端子表
面に導電粒子が付着され、前記複数の電極端子表面以外は導電粒子が付着されない半導体装置の製造方法であって、
前記複数の電極端子表面の導電粒子の付着を、前記複数の電極端子上に前記導電粒子を混
入した接着剤を、細い開口部を有するノズルを用いて吹き付けることにより行うことを特徴とする半導体装置の製造方法。 A method for manufacturing a semiconductor device comprising a plurality of electrode terminals arranged in a predetermined region, wherein conductive particles are attached to the surfaces of the plurality of electrode terminals, and conductive particles are not attached to surfaces other than the surfaces of the plurality of electrode terminals,
The semiconductor device is characterized in that the conductive particles on the surface of the plurality of electrode terminals are attached by spraying an adhesive mixed with the conductive particles on the plurality of electrode terminals using a nozzle having a thin opening. Manufacturing method. 請求項３に記載の半導体装置の製造方法において、前記導電粒子を混入する接着剤をインクジェット方式により前記電極端子上に吹き付けることを特徴とする半導体装置の製造方法。 4. The method of manufacturing a semiconductor device according to claim 3, wherein an adhesive that mixes the conductive particles is sprayed onto the electrode terminal by an inkjet method. 液晶層を狭持するパネル構造である液晶パネルを有する液晶装置であって、
請求項１又は請求項２に記載の半導体装置が前記液晶パネルに実装されていることを特徴とする液晶装置。 A liquid crystal device having a liquid crystal panel having a panel structure that sandwiches a liquid crystal layer,
A liquid crystal device, wherein the semiconductor device according to claim 1 or 2 is mounted on the liquid crystal panel. 請求項５に記載の液晶装置において、
前記半導体装置が液晶駆動用ＩＣであることを特徴とする液晶装置。 The liquid crystal device according to claim 5.
A liquid crystal device, wherein the semiconductor device is a liquid crystal driving IC.
JP2005013937A 2005-01-21 2005-01-21 Semiconductor device, method for manufacturing same, and liquid crystal display device Withdrawn JP2005167274A (en)

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008244277A (en) * 2007-03-28 2008-10-09 Nec Corp Semiconductor device and manufacturing method therefor
JP2008244256A (en) * 2007-03-28 2008-10-09 Casio Comput Co Ltd Electronic chip component and manufacturing method therefor
CN100447974C (en) * 2005-07-27 2008-12-31 精工爱普生株式会社 Bonding pad, method for fabricating a bonding pad and an electronic device, and its fabricating method

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN100447974C (en) * 2005-07-27 2008-12-31 精工爱普生株式会社 Bonding pad, method for fabricating a bonding pad and an electronic device, and its fabricating method
US7754597B2 (en) 2005-07-27 2010-07-13 Seiko Epson Corporation Bonding pad fabrication method, method for fabricating a bonding pad and an electronic device, and electronic device
JP2008244277A (en) * 2007-03-28 2008-10-09 Nec Corp Semiconductor device and manufacturing method therefor
JP2008244256A (en) * 2007-03-28 2008-10-09 Casio Comput Co Ltd Electronic chip component and manufacturing method therefor

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