JP2002246404A - Semiconductor element with bump - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor element having bumps, of very high stability after connecting, so as to stabilize electric connection to the connecting terminal of a semiconductor mounting substrate, by making the stress applied to the bump uniform, when the element with the bump is pressed against the semiconductor mounting substrate. SOLUTION: Relations between a total area S of the mounting surface of the bump Bi of one side end, a total area T1 of the mounting surface of an inside bump Bo1 of an extreme opposed electrode side, and a total area T2 of a mounting surface of an outside bump Bo2 satisfy S>=T1>=T2 and S<=T1+T2.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a bumped semiconductor device having bumps which are protruding electrodes.

[0002]

2. Description of the Related Art As a semiconductor element such as an IC chip or an LSI chip having a bump, which is a protruding electrode, is advantageous for miniaturization of a substrate for mounting semiconductors and thinning of a module. It is widely used in electronic devices such as liquid crystal display devices. The bump, which is a protruding electrode, is made of a material such as solder or gold (A).
u), silver (Ag), copper (Cu), lead (Pd), nickel (Ui), etc. are used, and a cream-like method is used on a bump formed by a photolithography and plating method or a bump formed by a photolithography and plating method. Conventionally, there is a method of forming by printing solder or a method of forming by a so-called transfer bump method.

[0003] There are various methods for mounting such a semiconductor device with bumps face-down on a substrate. However, with the spread of small and thin liquid crystal display devices, so-called solder bumps have been replaced by anisotropic conductive films. Anisotropic
The use of conductive film (ACF) between the connection terminals enables high-density mounting (fine pitch). The anisotropic conductive film has a paste or film shape in which conductive particles are dispersed in an adhesive having an insulating property, has conductivity in a thickness direction (connection direction), and has an insulating property in a plane direction (lateral direction). Adhesive.

With the recent increase in the density of semiconductor elements and the further miniaturization of substrates for mounting semiconductors, the pitch of the bump arrangement tends to be narrower (fine pitch of the bumps). The array is often a so-called staggered multiple array.

On the other hand, in mounting a semiconductor element in a liquid crystal display device, there is COG (chip on glass) mounting in which the semiconductor element is directly connected to an electrode terminal on a glass substrate. A plastic flexible substrate may be used instead of a glass substrate (this is called COF (chip on fil
m), COP (chip on plastic). ), These COG mountings, etc. are used to reduce the size of the liquid crystal panel.
It is expected that it will become the mainstream in the field of liquid crystal display devices that are remarkably thinned. In COG mounting, it is usual to mount a semiconductor element IC having a bump having the above shape using the anisotropic conductive film.

[0006]

The example shown in FIG. 6A is a staggered bump arrangement in which one input side bump Bi is in one row and the other output side bumps Bo1 and Bo2 are in two rows. However, in a conventional semiconductor device IC with bumps, the input-side bumps Bi, the inner output bumps Bo1, and the outer output bumps Bo2 are usually the same size bumps. That is, each bump Bi, B
Usually, o1 and Bo2 have the same width and the same length. Then, as shown in FIG. 5, in the COG mounting, after the anisotropic conductive film is applied and heated and pressurized by means of U1 and U2 and cured, the semiconductor element IC is interposed through the anisotropic conductive film 6. Are electrically connected to the connection terminals (also referred to as “terminal electrodes” and “pads”) of the semiconductor mounting substrate of the liquid crystal display panel.

However, in the conventional device, each of the bumps Bi, Bo1, Bo at the time of mounting the semiconductor device with bumps is mounted.
2 has a problem that the stress (or pressing force) applied to the sample No. 2 cannot be made uniform in a strict sense. That is, the total area S of the mounting surface of the input-side bumps Bi, the total area T1 of the mounting surface of the inner output bumps Bo1, and the total area T2 of the mounting surface of the outer output bumps Bo2 are different from each other. Yes, and the density of each bump (the distribution of bumps on the mounting surface of the semiconductor element)
Are biased in the mounting surface of the semiconductor element. Therefore, when thermocompression bonding is performed on a semiconductor mounting substrate via an anisotropic conductive film, as shown in FIG.
And the inner output bump Bo1 and the outer output bump Bo2
Is not uniform, and as a result, there is a difference in how the conductive particles of the anisotropic conductive film are crushed, and there is a difference in bump deformation due to thermocompression bonding (the bump surface originally has irregularities, (It is deformed by about 1 to 2 μm in height due to pressure bonding), and it is not possible to stabilize the electrical connection with the connection terminals of the semiconductor mounting substrate. That is, the total area of the mounting surface of the outer output bump Bo2 (the area of the total number of Bo2 in FIG. 6A) is equal to the total area of the mounting surface of the inner output bump Bo1 (the total area of the total number of Bo1 in FIG. 6A). 6A, the stress applied to the output bump Bo2 in the outer row is larger than the stress applied to the output bump Bo1 in the inner row. As a result, there is a high possibility that the conductive particles of the anisotropic conductive film do not sufficiently contact each other, or a difference occurs in the deformation of the bumps (schematically, only the inner output bump Bo1 is connected as shown in FIG. 6B). Then, the outer output bump Bo2 floats up), and as a result, an electrical connection failure occurs between the outer output bump Bo2 and the connection terminal of the semiconductor mounting substrate. The relationship between the input-side bumps Bi and the other output-side bumps Bo1 and Bo2 indicates that the input-side bumps B
Total area of mounting surface i (area of total number of Bi in FIG. 6A)
Is smaller than the total area of the mounting surfaces of the other output bumps Bo1 and Bo2 (the area of the total number of Bo1 and Bo2 in FIG. 6A), so that the stress applied to the input-side bump Bi is smaller than the output-side bump Bo1. And the stress applied to Bo2, and the possibility that the conductive particles of the anisotropic conductive film do not sufficiently contact each other increases, or the bump deformation is different. Electrical connection failure occurs.

Accordingly, an object of the present invention is to make the stress applied to each row of the bump arrangement uniform when pressing a semiconductor element with bumps against the substrate for mounting a semiconductor device, so that the connection terminals of the substrate for mounting a semiconductor device can be reduced. An object of the present invention is to provide a semiconductor device with bumps, which can stabilize electrical connection of the semiconductor device and has extremely high stability after connection.

[0009]

According to a first aspect of the present invention, there is provided a semiconductor device with bumps according to the present invention, wherein a plurality of bumps, which are protruding electrodes, are formed on the semiconductor device, and at least a part of the arrangement of the bumps is the same as the semiconductor device. In the semiconductor device with bumps composed of a plurality of rows along the periphery, the total area T1 of the bump mounting surface in the inner row and the total area T2 of the bump mounting face in the outer row of the plurality of rows of bumps And T1> T2.

According to the present invention, the relationship between the total area T1 of the mounting surfaces of the bumps in the inner row and the total area T2 of the mounting surfaces of the bumps in the outer row is T1> T2. Is pressed against the substrate for semiconductor mounting via the anisotropic conductive film, the stress applied to the bumps in the outer row does not become smaller than the stress applied to the bumps in the inner row. The conduction of the bumps in the row does not become unstable.

According to a second aspect of the present invention, based on the first aspect of the present invention, the bump mounting surface has a rectangular shape, and the length in one direction is equal to the length of each bump. When the length is constant, the relationship between the length b of the inner bump in the other direction and the length c of the outer bump in the other direction is b> c.

According to the present invention, when the shape of the mounting surface of the bump is quadrangular and the length in one direction is constant in each bump, the length b of the inner bump in the other direction and the length b in the other direction B> c with respect to the length c in the other direction of the bump
Therefore, when the semiconductor device with bumps is pressed and brought into contact with the substrate for semiconductor mounting via the anisotropic conductive film, the stress applied to the bumps in the outer row is smaller than the stress applied to the bumps in the inner row. And the conduction of the outer bumps does not become unstable. The relationship between the total area T1 of the bump mounting surface in the inner row and the total area T2 of the bump mounting face in the outer row according to claim 1, by merely adjusting the other length of the same square. Can be easily satisfied that T1> T2.

According to a third aspect of the present invention, there is provided a semiconductor device with bumps according to the first or second aspect of the present invention, wherein the bumps are arranged in a line along one edge of the semiconductor element. Are arranged in two rows along the edge on the counter electrode side, the total area S of the mounting surface of the bumps on one side, the total area T1 of the mounting surface of the inner bumps on the counter electrode side, and the mounting surface of the outer bumps. The relationship with the total area T2 is S ≧ T1> T2 and S ≦
T1 + T2.

According to the present invention, the relationship between the total area S of the mounting surfaces of the bumps on one side, the total area T1 of the mounting surfaces of the inner bumps on the opposite side, and the total area T2 of the mounting surfaces of the outer bumps is determined. Since S ≧ T1> T2 and S ≦ T1 + T2, when the bump of the bumped semiconductor element is brought into contact with the semiconductor mounting substrate via the anisotropic conductive film,
The stress applied to any of the bumps becomes uniform, and the conduction of any of the bumps does not become unstable. That is,
The total area S of the mounting surfaces of the bumps on one side is usually larger than the total area T1 of the mounting surfaces of the inner bumps on the opposite electrode side (S ≧
T1) and by satisfying the relationship of S ≦ T1 + T2, the total area S of the mounting surfaces of the bumps on one side with a small number is usually equal to or larger than the above-mentioned T1 + T2 with a large number. The stress applied to the bumps in the row also becomes uniform.

[0015]

An embodiment of the present invention will be described below with reference to the drawings.

(First Embodiment) A plurality of bumps B1 are formed on a semiconductor element IC. Bump B1
As shown in FIG. 1, a plurality of input bumps on one side are arranged in a single row, and output bumps on the other side are shifted from each other in two rows of an outer side and an inner side as shown in FIG. Each is provided with a plurality. That is, the output side bump Bo
1 and Bo2 are arranged in a staggered manner. Such a staggered arrangement can be similarly applied to the input bumps Bi.

In this embodiment, the total area S of the mounting surface of the input bumps Bi, the total area T1 of the mounting surface of the inner output bumps Bo1, and the total area T of the mounting surface of the outer output bumps Bo2.
2 is S ≧ T1> T2, and S ≦ T1
+ T2. That is, the surfaces of the input-side bumps Bi and the output-side bumps Bo are both formed in a rectangular cross section, and the respective bumps Bi, B in the longitudinal direction of the semiconductor element IC are formed.
The widths of o1 and Bo2 are denoted by a, b, and c, and the semiconductor element I
The lengths of the bumps Bi, Bo1, Bo2 in the short side direction of C are denoted by d, e, f, and the number of bumps Bi on the input side is N.
1, when the number of inner output bumps Bo1 is N2 and the number of outer output bumps Bo2 is N3, a × d × N1 ≧ b ×
e × N2> c × f × N3 and a × d × N1 ≦
b × e × N2 + c × f × N3. Specifically, in the present embodiment, the width a of the input bump Bi is 50 μm.
m, the length d is 128 μm, and the number N1 is 11. Therefore, the total area S of the mounting surface of the input bumps Bi is 70 μm.
400 μm ² . On the other hand, the width a of the inner output bump Bo1 is 50 μm, the length d is 128 μm, and the number N1
Are ten, and the total area T1 of the mounting surface of the output bump Bo1 is 64000 μm ² . The width a of the outer output bump Bo2 is 40 μm, and the length d is 100 μm.
m, the number N3 is 10, and the total area T2 of the mounting surface of the output bump Bo2 is 40000 μm ² . As a result, S (70400 μm ² ) ≧ T1 (640
00μm ^2)> is a T2 (40000μm ^2), and,
S (70400 μm ² ) ≦ T1 (64000 μm ² ) + T
2 (40000 μm ² ). If the above relational expression (S ≧ T1> T2 and S ≦ T1 + T2) is satisfied, the individual bumps Bi, Bo1, B
The size and shape of o2 are not limited.

Therefore, the relationship between the total area T1 of the mounting surface of the bumps (inner output bumps) Bo1 in the inner row and the total area T2 of the mounting surfaces of the bumps (outer output bumps) Bo2 in the outer row is T1> Since it is at T2, the stress applied to the bump (inner output bump) Bo1 in the inner row does not increase the stress applied to the bump (outer output bump) Bo2 in the outer row.
The conduction of the bumps (outer output bumps) Bo2 in the outer row does not become unstable as in the conventional example (see FIG. 6). In addition, one side of the bump (input bump) B
Although the total area S of the mounting surface of i is greater than or equal to the total area T1 of the mounting surface of the inner bumps (inner output bumps) Bo1 on the counter electrode side (S ≧ T1), the total area S of the mounting surface of the input bumps Bi is equal to the counter electrode. Since the total area of the mounting surfaces T1 and T2 of the two rows of output bumps Bo1 and Bo2 is equal to or less than the total area (S ≦ T1 + T2), one row of input bumps Bi and two rows of output bumps Bo1 and Bo2 are provided. The balance of the stress (or pressure) applied to both sides (one side and the opposing side) is maintained, and the semiconductor element IC with bumps is pressed against the first substrate (semiconductor mounting substrate) 1 of the anisotropic conductive film. When they are brought into contact with each other, the stress applied to the bumps in any row is made uniform.
That is, the total area S of the mounting surface of the input bump Bi on one side is
Is usually larger than the total area T1 of the mounting surface of the output bump Bo on the inner side of the counter electrode (S ≧ T1), and the above S ≦
By satisfying the relationship of T1 + T2, the total area S of the mounting surface of the input bumps Bi on one side having a small number is usually equal to or larger than the above-mentioned T1 + T2 having a large number, so that the bumps in any row are added. The stress also becomes uniform.

Here, the total area S of the mounting surfaces of the input bumps Bi, the total area T1 of the mounting surfaces of the inner output bumps Bo1, and the total area T2 of the mounting surfaces of the outer output bumps Bo2 are calculated by the above relational expression S ≦ T1 + T2. And the value of S and T1 + T
2 is made closer to (S = T
1 + T2), and the stress can be made more uniform. Needless to say that such a high-precision design is not required, when the shape of the mounting surface of each of the bumps is rectangular and the length of one side of each of the bumps Bi, Bo1, Bo2 is d = e = f, By simply setting b> c, the inside bump B
The stress applied to o1 does not become larger than that of the outer bump Bo2, thereby facilitating design.
In the present embodiment, the shapes of the surfaces of the input bumps Bi and the output bumps Bo1 and Bo2 are not limited, and the cross section may be polygonal, circular, or streamlined in addition to the rectangular shape. In the present embodiment, the relational expression (S ≧ T
1> T2, and S ≦ T1 + T2). In the drawing, the bumps Bi, Bo1, Bo2 have different lengths and widths in the above-mentioned rectangular shape. I have. In order to satisfy the above relational expression, some of the bumps Bi, Bo1, Bo2 may be dummy bumps (bumps that are not actually used for inputting and outputting signals and the like).

(COG Mounting) Next, a method of mounting a semiconductor element will be described with reference to an example of COG mounting in which a semiconductor element IC is directly mounted on a liquid crystal display panel using the above embodiments.
First, in the liquid crystal display device, as shown in FIGS. 2 and 3, a semiconductor element IC is mounted in a mounting area 5 at a peripheral portion of a liquid crystal panel L. The liquid crystal panel L is a reflection type liquid crystal display device L using a TFT which is a typical active element currently used.

The first substrate of the liquid crystal panel L (one substrate:
The AM substrate 1 is also referred to as an array substrate. The substrate 1 is larger than the other substrate 13. Therefore, when the substrates 1 and 13 are overlapped with each other, a mounting region 25 of the semiconductor element IC partially protruding around the AM substrate 1 is formed. Have been. The mounting area 5 of the first substrate 1 has a wiring pattern P for semiconductor mounting.
1 and P2 are formed, and a wiring pattern P3 is formed on the wiring board F.
Are formed. The AM substrate 1 may be a flexible substrate made of a synthetic resin.

Semiconductor device IC with solder according to the present embodiment
Are mounted on the mounting area 5 of the semiconductor element IC via an adhesive 6 having conductivity.

On the first substrate 1, electrodes 11 and 12 connected to the semiconductor element IC are formed in a pattern. Electrode 1
1 (right side in FIG. 3) is an input electrode, and the electrode 12 (FIG.
The middle left) is an output electrode. Then, a semiconductor element IC for driving the liquid crystal panel L via the conductive adhesive 6 is mounted. Here, the terminal electrodes 11,
Twelve surfaces of the bumps Bi, Bo1, Bo of the present embodiment.
The shape may be the same as 2, and the number may be the same so that each corresponds exactly.

The anisotropic conductive film 6 has conductive particles 6b dispersed in an adhesive having insulating properties, has conductivity in the thickness direction (connection direction), and has insulation properties in the plane direction (lateral direction). And is composed of the conductive particles 6b and the adhesive 6c. The connection is basically a thermocompression bonding, in which the conductive particles 6b are in charge of the function of electrical connection, and the adhesive 6c is in charge of the function of maintaining the pressed state. As the insulating film, a thermoplastic resin is used. As the adhesive 6c of the anisotropic conductive film 6, a thermoplastic resin or a thermosetting resin is used. Before the liquid crystal panel is attached, the anisotropic conductive film 6 is supplied in a configuration such as a double-sided tape. After the adhesive layer side is attached to the liquid crystal panel, the anisotropic conductive film 6 is cured by applying heating and pressing means.

Therefore, when the semiconductor element IC is mounted on the AM substrate 1 which is a substrate for mounting a semiconductor, the entire area of the mounting area 5 of the first substrate (AM substrate) 1 is required as shown in FIG. To supply the anisotropic conductive film 6. Next, after the anisotropic conductive film 6 is supplied, the semiconductor device IC with the gold bumps B1 (including B2) is thermocompression-bonded and mounted using a mounting machine.

That is, as shown in FIG. 5, a pressing tool (pressing means) U1 and a heating tool (heating means) U2
The semiconductor element IC with solder is mounted on the first substrate 1 by thermocompression bonding via the anisotropic conductive film 6. After the thermocompression bonding, the heating tool U2 is removed.

In this embodiment, the bumps B1 (including B2) of the bumped semiconductor element IC are connected to the pressing means U1, U
When pressing and contacting the first substrate (substrate for mounting a semiconductor) 1 via the second 2, the stress applied to the inner bumps Bo1 does not become larger than that of the outer bumps Bo2. A situation in which the outer output bump Bo1 has a conduction failure with respect to the semiconductor mounting substrate 1 (schematically, only the inner output bump Bo1 is connected and the outer output bump Bo2 rises as shown in FIG. 6B). Situation) is prevented. In addition, the stress applied to the bumps Bi in the input-side row does not become smaller than the stress applied to the inner and outer output bumps Bo1 and Bo2 as in the related art (the stress applied to the bumps Bi in the input-side row is large. ), Each bump B
Uniform stress (pressing force) is applied to i, Bo1, and Bo2 as a whole. Therefore, according to the present embodiment, unlike the conventional case, there is no difference in how the conductive particles 6b of the anisotropic conductive film 6 are crushed, and there is no difference in bump deformation due to thermocompression bonding (original bump surface). Have irregularities and are deformed by about 1 to 2 μm in height by thermocompression bonding), and connection ends 11 and 12 between the bumps Bi, Bo1 and Bo2 of the semiconductor element IC and the first substrate (substrate for mounting semiconductor) 1. And the electrical continuity with the device becomes good. In the liquid crystal display panel, since the number of the input-side bumps Bi is smaller than that of the output-side bumps Bo1 and Bo2, the pitch and the shape of the input-side bumps Bi are easier to change.

(Second Embodiment) In this embodiment,
As shown in FIG. 4, each of the rectangular bumps Bi, Bo
Unlike the first embodiment in which the lengths and widths of Bo1, Bo2 are different, the lengths and widths of the rectangular bumps Bi, Bo1, Bo2 are the same. However, as in the first embodiment, the total area S of the mounting surface of the input bumps Bi, the total area T1 of the mounting surface of the inner output bumps Bo1, and the total area T2 of the mounting surface of the outer output bumps Bo2. Is S ≧ T1
+ T2, and T1> T2. That is, the surfaces of the input-side bumps Bi and the output-side bumps Bo are both formed in a rectangular shape, and the widths of the respective bumps Bi, Bo1, Bo2 in the longitudinal direction N of the semiconductor element are denoted by a,
b, c, each bump B in the short side direction Y of the semiconductor element
i, the lengths of the bumps Bo1 and Bo2 are d, e, and f, the number of bumps Bi on the input side is N1, and the output bumps Bo1 on the inner side.
Is N2 and the number of outer output bumps Bo2 is N3, a × d × N1 ≧ b × e × N2 + c × f × N3, and b × e × N2> c × f × N3. Has become.

Further, each of the bumps Bi, Bo1, Bo2
Since the length and width are the same, a = b = c, and
d = e = f. However, since the interval H1 between the inner output bumps Bo1 and the interval H2 between the outer output bumps Bo2 are set to be larger than those in the first embodiment, the numbers N2 and N3 are reduced. Has become. That is, the interval H between the inner output bumps Bo1
1 and the interval H2 between the outer output bumps Bo2 is set to be larger than the interval H3 between the input-side bumps Bi, and the above relational expression (S ≧ T1> T2, and S ≦ T1 + T2). Specifically, in the present embodiment, the width a of the input bump Bi is 30 μm, the length d is 40 μm, and the number N1 is 20. Therefore, the total area S of the mounting surface of the input bump Bi is 24000 μm ² . On the other hand, the width a of the inner output bump Bo1 is 30 μm and the length d is 40 μm.
And the number N1 is 15, so that the output bump B
The total area T1 of the mounting surface of o1 is 18000 μm ² .
In addition, the width a of the outer output bump Bo2 is 30 μm, the length d is 40 μm, and the number N3 is 5, so that
The total area T2 of the mounting surface of the output bump Bo2 is 6000 μm
² As a result, S (24000 μm ² ) ≧ T1 (1
^{8000μm 2)> T2 (6000μm 2} ) and, S (2
4000 μm ² ) ≦ T1 (18000 μm ² ) + T2 (6
000 μm ² ).

Therefore, according to the present embodiment, the first
When the bumps Bi, Bo1 and Bo2 of the bumped semiconductor element IC are pressed and brought into contact with the semiconductor mounting substrate (first substrate) 1 via the pressing tool U1 and the heating tool U2, similarly to the embodiment. Since the stress applied to the inner output bump Bo1 is smaller than that of the outer bump Bo2, contact failure is eliminated, and the stress applied to the inner and outer output bumps Bo1 and Bo2 is larger than the input bump Bi. Eliminates poor contact,
The electrical connection between the bumps Bi, Bo1 and Bo2 of the semiconductor element IC and the connection terminals 11 and 12 of the first substrate (substrate for mounting semiconductor) 1 is stabilized. In both the present embodiment and the first embodiment, in order to satisfy the above relational expression, some of the bumps Bi, Bo1, Bo2 are dummy bumps (bumps not actually used for inputting and outputting signals and the like).
May be used.

As described above, in the present embodiment, COG mounting has been described as an example, but a conductive adhesive (anisotropic conductive film)
TAB (tape)
The present invention is also applicable to an automated bonding method and a method for mounting a semiconductor element on a circuit board in general. Also, the size of each of the bumps Bi, Bo1, Bo2 in the present embodiment is an example, and it goes without saying that the present invention is not limited to the size described in this specification.

[0032]

According to the semiconductor device with bumps according to the first aspect of the present invention, the relationship between the total area T1 of the inner bump mounting surface on the other side and the total area T2 of the outer bump mounting surface is T.
Since 1> T2, when the bump is pressed against the semiconductor mounting substrate via the anisotropic conductive film, the stress applied to the other outer bump may be smaller than that of the inner bump. As a result, connection failures are eliminated, and the electrical connection between the bumps of the semiconductor element and the connection terminals of the semiconductor mounting substrate is stabilized.

According to the semiconductor device with bumps according to claim 2 of the present invention, when the shape of the mounting surface of the bumps is rectangular and the length in one direction is constant in each bump, Since the relationship between the length b of the other bump in the other direction and the length c of the outer bump in the other direction is b> c, it is only necessary to adjust the other length in a square having the same shape. The relationship between the total area T1 of the mounting surfaces of the bumps in the inner row and the total area T2 of the mounting surfaces of the bumps in the outer row described in 1 can be easily satisfied as T1> T2.

According to the semiconductor device with bumps according to the third aspect of the present invention, the total area S of the bump mounting surface on one side is:
The relationship between the total area T1 of the mounting surface of the inner bumps on the counter electrode side and the total area T2 of the mounting surface of the outer bumps is S> T1 ≧ T2.
In addition, since S ≦ T1 + T2, the stress applied to any of the bumps becomes uniform, and it is possible to provide a semiconductor device with bumps having extremely high stability after connection.

[0035]

[Brief description of the drawings]

FIG. 1 is a plan view showing a semiconductor device according to a first embodiment of the present invention.

FIG. 2 is a perspective view showing a mounting example of the semiconductor element according to the first embodiment;

FIG. 3 is a sectional view showing a mounting example of the semiconductor device with bumps according to the first embodiment;

FIG. 4 is a plan view showing a semiconductor device with bumps according to a second embodiment of the present invention.

FIG. 5 is a perspective view illustrating the mounting of the semiconductor device with bumps according to each of the embodiments.

FIG. 6 is a diagram showing a conventional semiconductor device with bumps;
(A) is a plan view thereof, and (b) is a cross-sectional view for explaining its mounting.

[Explanation of symbols]

Reference Signs List 1 semiconductor mounting substrate (first substrate), 11, 12 electrodes (terminal electrodes), 25 mounting area, 26 anisotropic conductive film, 26b conductive particles, 26c insulating film, 26d adhesive, B, B1, B2 Bump (protruding electrode), Bi input bump (one side bump), Bo1 inner output bump (bump in inner row), Bo2 outer output bump (bump in outer row), IC semiconductor element

Claims (3)

[Claims] 1. A semiconductor device with bumps, wherein a plurality of bumps, which are protruding electrodes, are formed on a semiconductor element, and at least a part of the arrangement of the bumps is formed in a plurality of rows along the periphery of the semiconductor element. The relationship between the total area T1 of the bump mounting surface in the inner row and the total area T2 of the bump mounting face in the outer row of the plurality of rows of bumps is T1> T.
2. A semiconductor device with bumps according to item 2. 2. When the shape of the mounting surface of the bump is quadrangular and the length in one direction is constant for each bump, the length b of the inner bump in the other direction and the length of the outer bump in the other direction are different. 2. The semiconductor device with bumps according to claim 1, wherein the relationship with the length c in the direction is b> c. 3. The arrangement of the bumps is arranged in one line along the edge of one side of the semiconductor element, and arranged in two lines along the edge on the counter electrode side. Total area S
And the relationship between the total area T1 of the mounting surface of the inner bumps on the counter electrode side and the total area T2 of the mounting surface of the outer bumps is S ≧ T1> T2.
3. The bumped semiconductor device according to claim 1, wherein S ≦ T1 + T2.