JP6564261B2 - 半田ジョイントを有する半導体素子 - Google Patents

半田ジョイントを有する半導体素子 Download PDF

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Publication number
JP6564261B2
JP6564261B2 JP2015136846A JP2015136846A JP6564261B2 JP 6564261 B2 JP6564261 B2 JP 6564261B2 JP 2015136846 A JP2015136846 A JP 2015136846A JP 2015136846 A JP2015136846 A JP 2015136846A JP 6564261 B2 JP6564261 B2 JP 6564261B2
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Prior art keywords
temperature solder
barrier layer
conductive pad
high temperature
low
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JP2015136846A
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Japanese (ja)
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JP2016032104A (ja
JP2016032104A5 (enExample
Inventor
淳 範 金
淳 範 金
兌 垠 金
兌 垠 金
恩 惠 朴
恩 惠 朴
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Samsung Electronics Co Ltd
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Samsung Electronics Co Ltd
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Publication of JP2016032104A publication Critical patent/JP2016032104A/ja
Publication of JP2016032104A5 publication Critical patent/JP2016032104A5/ja
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    • H10W72/20—
    • H10W72/012—
    • H10W72/01204—
    • H10W72/01212—
    • H10W72/01225—
    • H10W72/01257—
    • H10W72/072—
    • H10W72/07236—
    • H10W72/07253—
    • H10W72/07255—
    • H10W72/221—
    • H10W72/222—
    • H10W72/224—
    • H10W72/234—
    • H10W72/241—
    • H10W72/242—
    • H10W72/245—
    • H10W72/252—
    • H10W72/2528—
    • H10W72/255—
    • H10W72/90—
    • H10W72/9223—
    • H10W72/923—
    • H10W72/9415—
    • H10W72/952—

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  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)
  • Manufacturing & Machinery (AREA)
JP2015136846A 2014-07-28 2015-07-08 半田ジョイントを有する半導体素子 Active JP6564261B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR10-2014-0095964 2014-07-28
KR1020140095964A KR102192195B1 (ko) 2014-07-28 2014-07-28 솔더 조인트를 갖는 반도체 소자 및 그 형성 방법

Publications (3)

Publication Number Publication Date
JP2016032104A JP2016032104A (ja) 2016-03-07
JP2016032104A5 JP2016032104A5 (enExample) 2018-08-09
JP6564261B2 true JP6564261B2 (ja) 2019-08-21

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ID=55167330

Family Applications (1)

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JP2015136846A Active JP6564261B2 (ja) 2014-07-28 2015-07-08 半田ジョイントを有する半導体素子

Country Status (3)

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US (1) US9646945B2 (enExample)
JP (1) JP6564261B2 (enExample)
KR (1) KR102192195B1 (enExample)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102601553B1 (ko) * 2016-12-08 2023-11-15 삼성전자주식회사 반도체 발광 소자
DE102017104276B4 (de) * 2017-03-01 2020-01-16 Osram Opto Semiconductors Gmbh Verfahren zum Befestigen eines Halbleiterchips auf einem Leiterrahmen und elektronisches Bauelement
US10593638B2 (en) * 2017-03-29 2020-03-17 Xilinx, Inc. Methods of interconnect for high density 2.5D and 3D integration
DE102017108422A1 (de) 2017-04-20 2018-10-25 Osram Opto Semiconductors Gmbh Verfahren zum Befestigen eines Halbleiterchips auf einem Leiterrahmen und elektronisches Bauelement
US10403591B2 (en) * 2017-10-31 2019-09-03 Xilinx, Inc. Chip package assembly with enhanced interconnects and method for fabricating the same
US10811377B2 (en) * 2017-12-14 2020-10-20 Taiwan Semiconductor Manufacturing Co., Ltd. Package structure with a barrier layer and method for forming the same
US10453817B1 (en) * 2018-06-18 2019-10-22 Texas Instruments Incorporated Zinc-cobalt barrier for interface in solder bond applications
KR102902359B1 (ko) * 2020-09-22 2025-12-22 삼성전자주식회사 반도체 패키지
US20250149486A1 (en) * 2023-11-03 2025-05-08 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor package and method of forming the same

Family Cites Families (26)

* Cited by examiner, † Cited by third party
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US4739917A (en) * 1987-01-12 1988-04-26 Ford Motor Company Dual solder process for connecting electrically conducting terminals of electrical components to printed circuit conductors
US5251806A (en) * 1990-06-19 1993-10-12 International Business Machines Corporation Method of forming dual height solder interconnections
US5542174A (en) * 1994-09-15 1996-08-06 Intel Corporation Method and apparatus for forming solder balls and solder columns
US5803343A (en) * 1995-10-30 1998-09-08 Delco Electronics Corp. Solder process for enhancing reliability of multilayer hybrid circuits
US5803344A (en) * 1996-09-09 1998-09-08 Delco Electronics Corp. Dual-solder process for enhancing reliability of thick-film hybrid circuits
US5953623A (en) * 1997-04-10 1999-09-14 International Business Machines Corporation Ball limiting metal mask and tin enrichment of high melting point solder for low temperature interconnection
US5937320A (en) * 1998-04-08 1999-08-10 International Business Machines Corporation Barrier layers for electroplated SnPb eutectic solder joints
US6483195B1 (en) * 1999-03-16 2002-11-19 Sumitomo Bakelite Company Limited Transfer bump street, semiconductor flip chip and method of producing same
US6281106B1 (en) * 1999-11-25 2001-08-28 Delphi Technologies, Inc. Method of solder bumping a circuit component
US6492197B1 (en) * 2000-05-23 2002-12-10 Unitive Electronics Inc. Trilayer/bilayer solder bumps and fabrication methods therefor
US20030234276A1 (en) * 2002-06-20 2003-12-25 Ultratera Corporation Strengthened bonding mechanism for semiconductor package
JP2004260157A (ja) * 2003-02-07 2004-09-16 Toshiba Corp 半導体装置、半導体装置の製造方法及び組立方法
US6893799B2 (en) 2003-03-06 2005-05-17 International Business Machines Corporation Dual-solder flip-chip solder bump
JP2005011838A (ja) * 2003-06-16 2005-01-13 Toshiba Corp 半導体装置及びその組立方法
US7112524B2 (en) * 2003-09-29 2006-09-26 Phoenix Precision Technology Corporation Substrate for pre-soldering material and fabrication method thereof
US20050199996A1 (en) 2004-03-10 2005-09-15 Ho Tony H. Two solder array structure with two high melting solder joints
US20070036670A1 (en) 2005-08-12 2007-02-15 John Pereira Solder composition
US20080248610A1 (en) 2007-04-03 2008-10-09 Advanpack Solutions Pte Ltd Thermal bonding process for chip packaging
US8348139B2 (en) 2010-03-09 2013-01-08 Indium Corporation Composite solder alloy preform
US8671560B2 (en) * 2010-03-30 2014-03-18 Research Triangle Institute In system reflow of low temperature eutectic bond balls
KR101119839B1 (ko) * 2010-05-23 2012-02-28 주식회사 네패스 범프 구조물 및 그 제조 방법
CN103053228B (zh) 2010-08-02 2016-10-05 安美特德国有限公司 用于在衬底上形成焊料沉积和非熔融凸块结构的方法
JP6024079B2 (ja) * 2011-08-18 2016-11-09 富士通株式会社 半導体装置およびその製造方法並びに電子装置
TWI440518B (zh) 2011-08-26 2014-06-11 Univ Nat Taiwan Science Tech 多層結構之高溫焊料及其製造方法
US9368429B2 (en) * 2011-10-25 2016-06-14 Intel Corporation Interposer for hermetic sealing of sensor chips and for their integration with integrated circuit chips
KR102007780B1 (ko) * 2012-07-31 2019-10-21 삼성전자주식회사 멀티 범프 구조의 전기적 연결부를 포함하는 반도체 소자의 제조방법

Also Published As

Publication number Publication date
KR102192195B1 (ko) 2020-12-17
US20160027751A1 (en) 2016-01-28
KR20160013737A (ko) 2016-02-05
US9646945B2 (en) 2017-05-09
JP2016032104A (ja) 2016-03-07

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