JP6466592B2 - 積層体の製造方法、半導体デバイスの製造方法、および積層体 - Google Patents

積層体の製造方法、半導体デバイスの製造方法、および積層体

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Publication number
JP6466592B2
JP6466592B2 JP2017550343A JP2017550343A JP6466592B2 JP 6466592 B2 JP6466592 B2 JP 6466592B2 JP 2017550343 A JP2017550343 A JP 2017550343A JP 2017550343 A JP2017550343 A JP 2017550343A JP 6466592 B2 JP6466592 B2 JP 6466592B2
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Japan
Prior art keywords
temporary adhesive
group
adhesive layer
temperature
preferable
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Active
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JP2017550343A
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English (en)
Japanese (ja)
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JPWO2017082269A1 (ja
Inventor
義貴 加持
義貴 加持
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujifilm Corp
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Fujifilm Corp
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Publication of JPWO2017082269A1 publication Critical patent/JPWO2017082269A1/ja
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Publication of JP6466592B2 publication Critical patent/JP6466592B2/ja
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/185—Joining of semiconductor bodies for junction formation
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B32—LAYERED PRODUCTS
    • B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B7/00—Layered products characterised by the relation between layers; Layered products characterised by the relative orientation of features between layers, or by the relative values of a measurable parameter between layers, i.e. products comprising layers having different physical, chemical or physicochemical properties; Layered products characterised by the interconnection of layers
    • B32B7/04—Interconnection of layers
    • B32B7/12—Interconnection of layers using interposed adhesives or interposed materials with bonding properties
    • C—CHEMISTRY; METALLURGY
    • C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09J—ADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J201/00—Adhesives based on unspecified macromolecular compounds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Organic Chemistry (AREA)
  • Adhesives Or Adhesive Processes (AREA)
  • Laminated Bodies (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
JP2017550343A 2015-11-13 2016-11-09 積層体の製造方法、半導体デバイスの製造方法、および積層体 Active JP6466592B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2015222738 2015-11-13
JP2015222738 2015-11-13
PCT/JP2016/083169 WO2017082269A1 (ja) 2015-11-13 2016-11-09 積層体の製造方法、半導体デバイスの製造方法、および積層体

Publications (2)

Publication Number Publication Date
JPWO2017082269A1 JPWO2017082269A1 (ja) 2018-09-27
JP6466592B2 true JP6466592B2 (ja) 2019-02-06

Family

ID=58695409

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2017550343A Active JP6466592B2 (ja) 2015-11-13 2016-11-09 積層体の製造方法、半導体デバイスの製造方法、および積層体

Country Status (4)

Country Link
JP (1) JP6466592B2 (zh)
KR (1) KR102090497B1 (zh)
TW (1) TWI701149B (zh)
WO (1) WO2017082269A1 (zh)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6998838B2 (ja) * 2018-06-04 2022-01-18 信越化学工業株式会社 薄型基板の製造方法
KR102555721B1 (ko) * 2018-08-20 2023-07-17 삼성전자주식회사 플립 칩 본딩 방법
WO2020080328A1 (ja) * 2018-10-18 2020-04-23 富士フイルム株式会社 仮接着用組成物、キットおよび積層体
WO2020111154A1 (ja) * 2018-11-29 2020-06-04 日立化成株式会社 半導体装置の製造方法及び仮固定材用積層フィルム
TWI718923B (zh) * 2020-04-08 2021-02-11 台灣愛司帝科技股份有限公司 發光二極體晶片結構以及晶片移轉系統與方法

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002332458A (ja) 2001-05-11 2002-11-22 Nitto Denko Corp 両面粘着シートの貼り合わせ方法
JP2008121017A (ja) * 2001-08-27 2008-05-29 Hitachi Chem Co Ltd 接着シートならびに半導体装置およびその製造法
JP4993402B2 (ja) * 2006-05-22 2012-08-08 住友ベークライト株式会社 接着剤層付き半導体ウエハ、半導体素子および半導体パッケージ
JP6218354B2 (ja) * 2012-01-06 2017-10-25 積水化学工業株式会社 絶縁材料、多層フィルムの製造方法、積層体の製造方法、接続構造体及び接続構造体の製造方法
US9096032B2 (en) * 2012-04-24 2015-08-04 Shin-Etsu Chemical Co., Ltd. Wafer processing laminate, wafer processing member, temporary bonding arrangement, and thin wafer manufacturing method
JP6188495B2 (ja) * 2013-08-30 2017-08-30 富士フイルム株式会社 積層体及びその応用
JP6374680B2 (ja) 2013-12-13 2018-08-15 東京応化工業株式会社 貼付方法
JP6188614B2 (ja) * 2014-03-27 2017-08-30 富士フイルム株式会社 積層体、保護層形成用組成物、キット、および、半導体デバイスの製造方法

Also Published As

Publication number Publication date
JPWO2017082269A1 (ja) 2018-09-27
TWI701149B (zh) 2020-08-11
WO2017082269A1 (ja) 2017-05-18
KR102090497B1 (ko) 2020-03-18
KR20180059901A (ko) 2018-06-05
TW201728442A (zh) 2017-08-16

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