JP6374698B2 - 信号処理装置 - Google Patents
信号処理装置 Download PDFInfo
- Publication number
- JP6374698B2 JP6374698B2 JP2014101072A JP2014101072A JP6374698B2 JP 6374698 B2 JP6374698 B2 JP 6374698B2 JP 2014101072 A JP2014101072 A JP 2014101072A JP 2014101072 A JP2014101072 A JP 2014101072A JP 6374698 B2 JP6374698 B2 JP 6374698B2
- Authority
- JP
- Japan
- Prior art keywords
- transistor
- oxide semiconductor
- gate
- potential
- drain
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
- H03K19/1733—Controllable logic circuits
- H03K19/1737—Controllable logic circuits using multiplexers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
- H10D86/421—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs having a particular composition, shape or crystalline structure of the active layer
- H10D86/423—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs having a particular composition, shape or crystalline structure of the active layer comprising semiconductor materials not belonging to the Group IV, e.g. InGaZnO
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
- H10D86/60—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices
Landscapes
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Thin Film Transistor (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
- Logic Circuits (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2014101072A JP6374698B2 (ja) | 2013-05-16 | 2014-05-15 | 信号処理装置 |
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2013104129 | 2013-05-16 | ||
| JP2013104129 | 2013-05-16 | ||
| JP2014101072A JP6374698B2 (ja) | 2013-05-16 | 2014-05-15 | 信号処理装置 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2014241407A JP2014241407A (ja) | 2014-12-25 |
| JP2014241407A5 JP2014241407A5 (enExample) | 2017-06-29 |
| JP6374698B2 true JP6374698B2 (ja) | 2018-08-15 |
Family
ID=51895088
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2014101072A Expired - Fee Related JP6374698B2 (ja) | 2013-05-16 | 2014-05-15 | 信号処理装置 |
Country Status (2)
| Country | Link |
|---|---|
| US (1) | US9704886B2 (enExample) |
| JP (1) | JP6374698B2 (enExample) |
Families Citing this family (17)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9853053B2 (en) | 2012-09-10 | 2017-12-26 | 3B Technologies, Inc. | Three dimension integrated circuits employing thin film transistors |
| WO2016099580A2 (en) | 2014-12-23 | 2016-06-23 | Lupino James John | Three dimensional integrated circuits employing thin film transistors |
| JP6489216B2 (ja) * | 2015-01-21 | 2019-03-27 | 日本電気株式会社 | 再構成可能回路およびその利用方法 |
| US9812587B2 (en) | 2015-01-26 | 2017-11-07 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and manufacturing method thereof |
| JP2016154225A (ja) | 2015-02-12 | 2016-08-25 | 株式会社半導体エネルギー研究所 | 半導体装置およびその作製方法 |
| TWI718125B (zh) | 2015-03-03 | 2021-02-11 | 日商半導體能源研究所股份有限公司 | 半導體裝置及其製造方法 |
| JP6705663B2 (ja) | 2015-03-06 | 2020-06-03 | 株式会社半導体エネルギー研究所 | 半導体装置およびその作製方法 |
| US9882061B2 (en) | 2015-03-17 | 2018-01-30 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and manufacturing method thereof |
| TWI777164B (zh) | 2015-03-30 | 2022-09-11 | 日商半導體能源研究所股份有限公司 | 半導體裝置的製造方法 |
| US10460984B2 (en) | 2015-04-15 | 2019-10-29 | Semiconductor Energy Laboratory Co., Ltd. | Method for fabricating electrode and semiconductor device |
| US10192995B2 (en) | 2015-04-28 | 2019-01-29 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and manufacturing method thereof |
| US10164120B2 (en) | 2015-05-28 | 2018-12-25 | Semiconductor Energy Laboratory Co., Ltd. | Method for manufacturing semiconductor device |
| KR102548001B1 (ko) | 2015-07-08 | 2023-06-28 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | 반도체 장치 및 그 제작 방법 |
| US11189736B2 (en) | 2015-07-24 | 2021-11-30 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and manufacturing method thereof |
| US9825177B2 (en) | 2015-07-30 | 2017-11-21 | Semiconductor Energy Laboratory Co., Ltd. | Manufacturing method of a semiconductor device using multiple etching mask |
| US9773919B2 (en) | 2015-08-26 | 2017-09-26 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and manufacturing method thereof |
| TWI721026B (zh) | 2015-10-30 | 2021-03-11 | 日商半導體能源研究所股份有限公司 | 電容器、半導體裝置、模組以及電子裝置的製造方法 |
Family Cites Families (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7064973B2 (en) | 2004-02-03 | 2006-06-20 | Klp International, Ltd. | Combination field programmable gate array allowing dynamic reprogrammability |
| EP2526622B1 (en) | 2010-01-20 | 2015-09-23 | Semiconductor Energy Laboratory Co. Ltd. | Semiconductor device |
| KR101840797B1 (ko) | 2010-03-19 | 2018-03-21 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | 반도체 메모리 장치 |
| KR101884031B1 (ko) | 2010-04-07 | 2018-07-31 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | 반도체 기억 장치 |
| WO2012014786A1 (en) | 2010-07-30 | 2012-02-02 | Semiconductor Energy Laboratory Co., Ltd. | Semicondcutor device and manufacturing method thereof |
| KR101899880B1 (ko) | 2011-02-17 | 2018-09-18 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | 프로그래머블 lsi |
| JP2012204896A (ja) | 2011-03-24 | 2012-10-22 | Toshiba Corp | 不揮発プログラマブルロジックスイッチ |
| US8476927B2 (en) | 2011-04-29 | 2013-07-02 | Semiconductor Energy Laboratory Co., Ltd. | Programmable logic device |
| KR101889383B1 (ko) | 2011-05-16 | 2018-08-17 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | 프로그래머블 로직 디바이스 |
| TWI571058B (zh) | 2011-05-18 | 2017-02-11 | 半導體能源研究所股份有限公司 | 半導體裝置與驅動半導體裝置之方法 |
| US8581625B2 (en) | 2011-05-19 | 2013-11-12 | Semiconductor Energy Laboratory Co., Ltd. | Programmable logic device |
| US8779799B2 (en) | 2011-05-19 | 2014-07-15 | Semiconductor Energy Laboratory Co., Ltd. | Logic circuit |
| JP5892852B2 (ja) * | 2011-05-20 | 2016-03-23 | 株式会社半導体エネルギー研究所 | プログラマブルロジックデバイス |
| US9106223B2 (en) * | 2013-05-20 | 2015-08-11 | Semiconductor Energy Laboratory Co., Ltd. | Signal processing device |
-
2014
- 2014-05-08 US US14/272,824 patent/US9704886B2/en not_active Expired - Fee Related
- 2014-05-15 JP JP2014101072A patent/JP6374698B2/ja not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| US20140339540A1 (en) | 2014-11-20 |
| US9704886B2 (en) | 2017-07-11 |
| JP2014241407A (ja) | 2014-12-25 |
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