JP6181689B2 - 論理アドレス変換 - Google Patents
論理アドレス変換 Download PDFInfo
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- JP6181689B2 JP6181689B2 JP2015055721A JP2015055721A JP6181689B2 JP 6181689 B2 JP6181689 B2 JP 6181689B2 JP 2015055721 A JP2015055721 A JP 2015055721A JP 2015055721 A JP2015055721 A JP 2015055721A JP 6181689 B2 JP6181689 B2 JP 6181689B2
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- memory
- encryption key
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Classifications
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
- G06F3/0662—Virtualisation aspects
- G06F3/0665—Virtualisation aspects at area level, e.g. provisioning of virtual or logical volumes
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
- G06F12/023—Free address space management
- G06F12/0238—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
- G06F12/0246—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory in block erasable memory, e.g. flash memory
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/04—Addressing variable-length words or parts of words
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/10—Address translation
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/10—Address translation
- G06F12/1027—Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB]
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/14—Protection against unauthorised use of memory or access to memory
- G06F12/1408—Protection against unauthorised use of memory or access to memory by using cryptography
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/14—Protection against unauthorised use of memory or access to memory
- G06F12/1458—Protection against unauthorised use of memory or access to memory by checking the subject access rights
- G06F12/1466—Key-lock mechanism
- G06F12/1475—Key-lock mechanism in a virtual system, e.g. with translation means
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
- G06F12/0292—User address space allocation, e.g. contiguous or non contiguous base addressing using tables or multilevel address translation means
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
- G06F2212/72—Details relating to flash memory management
- G06F2212/7201—Logical to physical mapping or translation of blocks or pages
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
- G06F2212/72—Details relating to flash memory management
- G06F2212/7202—Allocation control and policies
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Computer Security & Cryptography (AREA)
- Human Computer Interaction (AREA)
- Storage Device Security (AREA)
- Read Only Memory (AREA)
- Memory System (AREA)
- Memory System Of A Hierarchy Structure (AREA)
- Executing Machine-Instructions (AREA)
Description
本開示は、論理ブロックアドレス変換のための方法を含む。1つのこのような方法は、LAと関連付けられたコマンドを受信することを含む。LAは、特定のLA範囲内にある。このような方法はまた、この特定の範囲以外の範囲のLAと関連付けられたデータを書き込む際にスキップされる幾つかの物理的位置に対応するオフセットを用いて、LAをメモリ内の物理的位置へと変換することを含む。
102 ホストシステム
104 メモリシステム
108 コントローラ
110−1〜110−N ソリッドステートメモリデバイス
112 フラッシュ変換層(FTL)
114 鍵範囲テーブル
242、244 鍵ゾーン
246 ページ
248、250 物理的セクター
254、256 ページ
360、370、380 列
362−1〜362−5 暗号鍵
372−1〜372−5 LBA範囲
382−1〜382−5 累積LBAオフセット
Claims (2)
- 第1、第2の暗号鍵を用いて暗号化されたデータが格納された不揮発性メモリと、前記不揮発性メモリと接続されたコントローラとを含むメモリシステムであって、
前記コントローラは、
第1の論理アドレス(LA)のグループを前記第1の暗号鍵と関連付けることと、
第2のLAのグループを前記第2の暗号鍵と関連付けることと、
前記第1の暗号鍵を用いて前記第1のLAのグループに関連付けられたデータを暗号化した第1のデータを前記不揮発性メモリの第1のゾーンに書き込むことと、
前記第2の暗号鍵を用いて前記第2のLAのグループに関連付けられたデータを暗号化した第2のデータを前記不揮発性メモリの第2のゾーンに書き込むことを実行し、
前記コントローラは、前記第1のデータ及び前記第2のデータを異なる物理的ページ上に書き込む場合に、前記第1のゾーンの最後の物理的ページに前記第1のデータが書き込まれていない部分が存在するように前記第1のデータを書き込んだとき、前記第2のデータを前記第1のゾーンの前記最後の物理的ページに存在する前記第1のデータが書き込まれていない部分をスキップして、前記第2のゾーンに書き込むように構成される、メモリシステム。 - 暗号化された前記第1のデータは前記不揮発性メモリ中の複数の物理的ページにわたり書き込まれる請求項1に記載のメモリシステム。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US13/041,402 US8732431B2 (en) | 2011-03-06 | 2011-03-06 | Logical address translation |
US13/041,402 | 2011-03-06 |
Related Parent Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2013557761A Division JP5719041B2 (ja) | 2011-03-06 | 2012-03-01 | 論理アドレス変換 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2015164044A JP2015164044A (ja) | 2015-09-10 |
JP6181689B2 true JP6181689B2 (ja) | 2017-08-16 |
Family
ID=46754039
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2013557761A Active JP5719041B2 (ja) | 2011-03-06 | 2012-03-01 | 論理アドレス変換 |
JP2015055721A Active JP6181689B2 (ja) | 2011-03-06 | 2015-03-19 | 論理アドレス変換 |
Family Applications Before (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2013557761A Active JP5719041B2 (ja) | 2011-03-06 | 2012-03-01 | 論理アドレス変換 |
Country Status (7)
Country | Link |
---|---|
US (2) | US8732431B2 (ja) |
EP (1) | EP2684132B1 (ja) |
JP (2) | JP5719041B2 (ja) |
KR (1) | KR101554084B1 (ja) |
CN (1) | CN103502958B (ja) |
TW (1) | TWI459200B (ja) |
WO (1) | WO2012121968A2 (ja) |
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US9460290B2 (en) | 2011-07-19 | 2016-10-04 | Elwha Llc | Conditional security response using taint vector monitoring |
US9298918B2 (en) | 2011-11-30 | 2016-03-29 | Elwha Llc | Taint injection and tracking |
US9798873B2 (en) | 2011-08-04 | 2017-10-24 | Elwha Llc | Processor operable to ensure code integrity |
US9465657B2 (en) | 2011-07-19 | 2016-10-11 | Elwha Llc | Entitlement vector for library usage in managing resource allocation and scheduling based on usage and priority |
US9575903B2 (en) * | 2011-08-04 | 2017-02-21 | Elwha Llc | Security perimeter |
US9471373B2 (en) | 2011-09-24 | 2016-10-18 | Elwha Llc | Entitlement vector for library usage in managing resource allocation and scheduling based on usage and priority |
US9558034B2 (en) | 2011-07-19 | 2017-01-31 | Elwha Llc | Entitlement vector for managing resource allocation |
KR101979392B1 (ko) * | 2012-05-17 | 2019-05-16 | 삼성전자주식회사 | 불휘발성 메모리 장치 및 그것의 프로그램 방법 |
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TWI595356B (zh) * | 2016-08-19 | 2017-08-11 | 大心電子(英屬維京群島)股份有限公司 | 資料傳輸方法及使用所述方法的儲存控制器與清單管理電路 |
KR102458312B1 (ko) | 2017-06-09 | 2022-10-24 | 삼성전자주식회사 | 스토리지 장치 및 이의 동작 방법 |
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2011
- 2011-03-06 US US13/041,402 patent/US8732431B2/en active Active
-
2012
- 2012-03-01 JP JP2013557761A patent/JP5719041B2/ja active Active
- 2012-03-01 KR KR1020137023450A patent/KR101554084B1/ko active IP Right Grant
- 2012-03-01 CN CN201280012166.4A patent/CN103502958B/zh active Active
- 2012-03-01 WO PCT/US2012/027265 patent/WO2012121968A2/en unknown
- 2012-03-01 EP EP12754482.3A patent/EP2684132B1/en active Active
- 2012-03-06 TW TW101107521A patent/TWI459200B/zh active
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2014
- 2014-04-17 US US14/255,525 patent/US9164701B2/en active Active
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2015
- 2015-03-19 JP JP2015055721A patent/JP6181689B2/ja active Active
Also Published As
Publication number | Publication date |
---|---|
JP2014507738A (ja) | 2014-03-27 |
CN103502958A (zh) | 2014-01-08 |
WO2012121968A3 (en) | 2012-11-22 |
US9164701B2 (en) | 2015-10-20 |
US20120226887A1 (en) | 2012-09-06 |
JP5719041B2 (ja) | 2015-05-13 |
WO2012121968A2 (en) | 2012-09-13 |
EP2684132A2 (en) | 2014-01-15 |
TWI459200B (zh) | 2014-11-01 |
US8732431B2 (en) | 2014-05-20 |
KR20130120541A (ko) | 2013-11-04 |
TW201250470A (en) | 2012-12-16 |
CN103502958B (zh) | 2016-08-17 |
EP2684132A4 (en) | 2014-12-10 |
JP2015164044A (ja) | 2015-09-10 |
EP2684132B1 (en) | 2019-04-24 |
US20140317374A1 (en) | 2014-10-23 |
KR101554084B1 (ko) | 2015-09-17 |
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