JP6139857B2 - データ処理装置、入力制御装置、及び制御方法 - Google Patents

データ処理装置、入力制御装置、及び制御方法 Download PDF

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Publication number
JP6139857B2
JP6139857B2 JP2012238359A JP2012238359A JP6139857B2 JP 6139857 B2 JP6139857 B2 JP 6139857B2 JP 2012238359 A JP2012238359 A JP 2012238359A JP 2012238359 A JP2012238359 A JP 2012238359A JP 6139857 B2 JP6139857 B2 JP 6139857B2
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data
output
input
bus
outside
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JP2012238359A
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Japanese (ja)
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JP2013175156A (ja
JP2013175156A5 (https=
Inventor
裕司 原
裕司 原
石川　尚
尚 石川
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Canon Inc
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Canon Inc
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Priority to JP2012238359A priority Critical patent/JP6139857B2/ja
Priority to US13/742,092 priority patent/US9690740B2/en
Priority to CN201310022120.7A priority patent/CN103227741B/zh
Publication of JP2013175156A publication Critical patent/JP2013175156A/ja
Publication of JP2013175156A5 publication Critical patent/JP2013175156A5/ja
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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4063—Device-to-bus coupling

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  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Multi Processors (AREA)
  • Bus Control (AREA)
JP2012238359A 2012-01-26 2012-10-29 データ処理装置、入力制御装置、及び制御方法 Expired - Fee Related JP6139857B2 (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP2012238359A JP6139857B2 (ja) 2012-01-26 2012-10-29 データ処理装置、入力制御装置、及び制御方法
US13/742,092 US9690740B2 (en) 2012-01-26 2013-01-15 Data processing apparatus, input control apparatus, and control method
CN201310022120.7A CN103227741B (zh) 2012-01-26 2013-01-22 数据处理装置、输入控制装置和控制方法

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2012014576 2012-01-26
JP2012014576 2012-01-26
JP2012238359A JP6139857B2 (ja) 2012-01-26 2012-10-29 データ処理装置、入力制御装置、及び制御方法

Publications (3)

Publication Number Publication Date
JP2013175156A JP2013175156A (ja) 2013-09-05
JP2013175156A5 JP2013175156A5 (https=) 2016-05-26
JP6139857B2 true JP6139857B2 (ja) 2017-05-31

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JP2012238359A Expired - Fee Related JP6139857B2 (ja) 2012-01-26 2012-10-29 データ処理装置、入力制御装置、及び制御方法

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US (1) US9690740B2 (https=)
JP (1) JP6139857B2 (https=)
CN (1) CN103227741B (https=)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6882681B2 (ja) * 2017-07-12 2021-06-02 富士通株式会社 情報処理システム、情報処理装置、及び情報処理システムの制御方法
US20190020586A1 (en) * 2017-07-14 2019-01-17 Qualcomm Incorporated Selective insertion of a deadlock recovery buffer in a bus interconnect for deadlock recovery
CN113590356B (zh) * 2021-07-29 2023-08-11 网易（杭州）网络有限公司 数据通信方法、装置和电子设备

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5613069A (en) * 1994-12-16 1997-03-18 Tony Walker Non-blocking packet switching network with dynamic routing codes having incoming packets diverted and temporarily stored in processor inputs when network ouput is not available
JP2006245790A (ja) * 2005-03-01 2006-09-14 Fujitsu Ltd リング型伝送システム
JP4869369B2 (ja) * 2009-03-13 2012-02-08 キヤノン株式会社 情報処理装置、情報処理方法およびプログラム
JP5538798B2 (ja) 2009-03-17 2014-07-02 キヤノン株式会社 データ処理装置およびデータ処理方法またはプログラム
JP5550261B2 (ja) 2009-05-29 2014-07-16 キヤノン株式会社 リングバスを用いたデータ処理装置、データ処理方法およびプログラム
JP5460156B2 (ja) 2009-07-14 2014-04-02 キヤノン株式会社 データ処理装置
JP5932242B2 (ja) 2011-05-20 2016-06-08 キヤノン株式会社 情報処理装置、通信方法、及びプログラム

Also Published As

Publication number Publication date
JP2013175156A (ja) 2013-09-05
CN103227741B (zh) 2016-09-28
US9690740B2 (en) 2017-06-27
US20130198431A1 (en) 2013-08-01
CN103227741A (zh) 2013-07-31

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