JP6081600B2 - ノイズ減衰壁 - Google Patents
ノイズ減衰壁 Download PDFInfo
- Publication number
- JP6081600B2 JP6081600B2 JP2015533073A JP2015533073A JP6081600B2 JP 6081600 B2 JP6081600 B2 JP 6081600B2 JP 2015533073 A JP2015533073 A JP 2015533073A JP 2015533073 A JP2015533073 A JP 2015533073A JP 6081600 B2 JP6081600 B2 JP 6081600B2
- Authority
- JP
- Japan
- Prior art keywords
- vias
- interconnects
- noise
- coupled
- interposer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49827—Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/552—Protection against radiation, e.g. light or electromagnetic waves
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
- H01L23/64—Impedance arrangements
- H01L23/66—High-frequency adaptations
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
- H01L2223/58—Structural electrical arrangements for semiconductor devices not otherwise provided for
- H01L2223/64—Impedance arrangements
- H01L2223/66—High-frequency adaptations
- H01L2223/6605—High-frequency electrical connections
- H01L2223/6616—Vertical connections, e.g. vias
- H01L2223/6622—Coaxial feed-throughs in active or passive substrates
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
- H01L23/5382—Adaptable interconnections, e.g. for engineering changes
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
- H01L23/5384—Conductive vias through the substrate with or without pins, e.g. buried coaxial conductors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L24/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of semiconductor or other solid state devices
- H01L25/03—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/065—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H10D89/00
- H01L25/0655—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H10D89/00 the devices being arranged next to each other
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
- H01L2924/143—Digital devices
- H01L2924/1431—Logic devices
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
- H01L2924/143—Digital devices
- H01L2924/1434—Memory
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
Landscapes
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Health & Medical Sciences (AREA)
- Electromagnetism (AREA)
- Toxicology (AREA)
- Semiconductor Integrated Circuits (AREA)
- Building Environments (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US13/626,829 US9054096B2 (en) | 2012-09-25 | 2012-09-25 | Noise attenuation wall |
| US13/626,829 | 2012-09-25 | ||
| PCT/US2013/055993 WO2014051894A2 (en) | 2012-09-25 | 2013-08-21 | Noise attenuation wall |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2016500198A JP2016500198A (ja) | 2016-01-07 |
| JP2016500198A5 JP2016500198A5 (enExample) | 2016-09-15 |
| JP6081600B2 true JP6081600B2 (ja) | 2017-02-15 |
Family
ID=49054941
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2015533073A Active JP6081600B2 (ja) | 2012-09-25 | 2013-08-21 | ノイズ減衰壁 |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US9054096B2 (enExample) |
| EP (1) | EP2901478B1 (enExample) |
| JP (1) | JP6081600B2 (enExample) |
| KR (1) | KR102132046B1 (enExample) |
| CN (1) | CN104704630B (enExample) |
| WO (1) | WO2014051894A2 (enExample) |
Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9343418B2 (en) * | 2013-11-05 | 2016-05-17 | Xilinx, Inc. | Solder bump arrangements for large area analog circuitry |
| US10057976B1 (en) | 2017-08-31 | 2018-08-21 | Xilinx, Inc. | Power-ground co-reference transceiver structure to deliver ultra-low crosstalk |
| US10665554B2 (en) * | 2017-10-30 | 2020-05-26 | Taiwan Semiconductor Manufacturing Company Ltd. | Magnetic structure for transmission lines in a package system |
| CN111312692A (zh) * | 2018-12-11 | 2020-06-19 | 创意电子股份有限公司 | 集成电路封装元件及其载板 |
| KR20250073153A (ko) * | 2022-09-22 | 2025-05-27 | 소니 세미컨덕터 솔루션즈 가부시키가이샤 | 반도체 패키지, 반도체 모듈, 전자 장치 및 반도체 패키지의 제조 방법 |
Family Cites Families (19)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH03165058A (ja) | 1989-11-24 | 1991-07-17 | Mitsubishi Electric Corp | 半導体装置 |
| JPH11121643A (ja) * | 1997-10-09 | 1999-04-30 | Hitachi Ltd | 半導体装置 |
| JP3451038B2 (ja) * | 1999-08-27 | 2003-09-29 | シャープ株式会社 | 誘電体回路基板およびそれを含むミリ波半導体装置 |
| US6362525B1 (en) * | 1999-11-09 | 2002-03-26 | Cypress Semiconductor Corp. | Circuit structure including a passive element formed within a grid array substrate and method for making the same |
| US6486534B1 (en) | 2001-02-16 | 2002-11-26 | Ashvattha Semiconductor, Inc. | Integrated circuit die having an interference shield |
| US6686649B1 (en) | 2001-05-14 | 2004-02-03 | Amkor Technology, Inc. | Multi-chip semiconductor package with integral shield and antenna |
| JP4057921B2 (ja) * | 2003-01-07 | 2008-03-05 | 株式会社東芝 | 半導体装置およびそのアセンブリ方法 |
| WO2006004128A1 (ja) * | 2004-07-06 | 2006-01-12 | Tokyo Electron Limited | 貫通基板およびインターポーザ、ならびに貫通基板の製造方法 |
| DE102006022360B4 (de) | 2006-05-12 | 2009-07-09 | Infineon Technologies Ag | Abschirmvorrichtung |
| KR100817070B1 (ko) * | 2006-10-30 | 2008-03-26 | 삼성전자주식회사 | 다중 그라운드 쉴딩 반도체 패키지, 그 패키지의 제조방법 및 그 그라운드 쉴딩을 이용한 노이즈 방지방법 |
| TWI337399B (en) * | 2007-01-26 | 2011-02-11 | Advanced Semiconductor Eng | Semiconductor package for electromagnetic shielding |
| EP2019427B1 (en) | 2007-07-27 | 2010-09-22 | Fujitsu Semiconductor Limited | Low-noise flip-chip packages and flip chips thereof |
| JP2009147150A (ja) * | 2007-12-14 | 2009-07-02 | Nec Electronics Corp | 半導体装置 |
| US8169059B2 (en) | 2008-09-30 | 2012-05-01 | Infineon Technologies Ag | On-chip RF shields with through substrate conductors |
| JP5189032B2 (ja) * | 2009-06-16 | 2013-04-24 | 新光電気工業株式会社 | 半導体装置および多層配線基板 |
| CN102104033A (zh) * | 2009-12-18 | 2011-06-22 | 中国科学院微电子研究所 | 三维混合信号芯片堆叠封装体及其制备方法 |
| JP2011146519A (ja) * | 2010-01-14 | 2011-07-28 | Panasonic Corp | 半導体装置及びその製造方法 |
| KR101719636B1 (ko) * | 2011-01-28 | 2017-04-05 | 삼성전자 주식회사 | 반도체 장치 및 그 제조 방법 |
| US8835226B2 (en) | 2011-02-25 | 2014-09-16 | Rf Micro Devices, Inc. | Connection using conductive vias |
-
2012
- 2012-09-25 US US13/626,829 patent/US9054096B2/en active Active
-
2013
- 2013-08-21 KR KR1020157006502A patent/KR102132046B1/ko active Active
- 2013-08-21 WO PCT/US2013/055993 patent/WO2014051894A2/en not_active Ceased
- 2013-08-21 JP JP2015533073A patent/JP6081600B2/ja active Active
- 2013-08-21 EP EP13753504.3A patent/EP2901478B1/en active Active
- 2013-08-21 CN CN201380049912.1A patent/CN104704630B/zh active Active
Also Published As
| Publication number | Publication date |
|---|---|
| WO2014051894A2 (en) | 2014-04-03 |
| WO2014051894A3 (en) | 2014-09-18 |
| EP2901478A2 (en) | 2015-08-05 |
| EP2901478B1 (en) | 2018-10-10 |
| KR102132046B1 (ko) | 2020-07-08 |
| US9054096B2 (en) | 2015-06-09 |
| CN104704630B (zh) | 2017-03-29 |
| JP2016500198A (ja) | 2016-01-07 |
| KR20150058201A (ko) | 2015-05-28 |
| US20140084477A1 (en) | 2014-03-27 |
| CN104704630A (zh) | 2015-06-10 |
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