JP6048050B2 - Semiconductor package and semiconductor device - Google Patents

Description

  The present invention relates to a semiconductor package and a semiconductor device.

  In recent years, with the demand for higher functionality and lighter, thinner and smaller electronic devices, high-density integration and further high-density mounting of electronic components have progressed. Semiconductor packages used in these electronic devices have been In addition, the size and number of pins are increasing.

  With the miniaturization of semiconductor packages, the conventional package using a lead frame has a limit on miniaturization. Therefore, recently, it is assumed that a chip is mounted on a circuit board, and BGA (Ball Grid) is used. Array) and a new area mounting type package system such as CSP (Chip Scale Package) have been proposed.

  A wiring board (for example, an interposer) used in a new package such as BGA or CSP is generally formed by forming a conductor pattern or a conductor post on a substrate obtained by impregnating a fiber base material with a resin composition.

JP 2009-81261 A JP 2003-142617 A JP 2004-311598 A JP-A-9-266231

Such an interposer has a large difference in thermal expansion coefficient from the chip. Further, since the interposer usually has a larger area than the chip, the area of the portion not in contact with the chip is large. Such a portion not in contact with the chip has extremely low rigidity, and due to the difference in thermal expansion between the chip and the interposer as described above, it tends to warp to the chip side at a high temperature, thereby reducing the reliability of electrical connection. There was a problem.
Further, since the chip generates heat, a wiring board such as an interposer is required to have excellent heat dissipation.

According to the present invention,
A substrate including a fiber base; a first conductor pattern provided on one surface of the substrate; and a second conductor provided on the other surface of the substrate and electrically connected to the first conductor pattern. A wiring board comprising a conductor pattern;
A semiconductor element bonded to the one surface of the substrate and electrically connected to the first conductor pattern;
A metal reinforcing member bonded to the wiring board and having a smaller coefficient of thermal expansion than the wiring board;
An insulating layer provided to cover at least part of the surface of the reinforcing member;
Have
A semiconductor package in which the insulating layer is an insulating resin layer or a ceramic layer is provided.

According to the invention of this configuration, since the thermal expansion coefficient of the reinforcing member is smaller than the thermal expansion coefficient of the wiring board, the wiring board is hardly warped by joining the reinforcing member to the wiring board. Therefore, the connection reliability between the semiconductor element and the wiring board can be improved.
Here, the thermal expansion coefficient means an average linear expansion coefficient in the plane direction at 50 ° C. to 150 ° C.
Furthermore, in the present invention, an insulating layer is provided on the surface of the metal reinforcing member. The insulating layer is a resin layer or a ceramic layer, and is excellent in thermal radiation as compared with a metal reinforcing member. Therefore, heat transmitted to the reinforcing member can be efficiently radiated through the insulating layer. The heat of the wiring board can be radiated through the reinforcing member and the insulating layer, and the warpage generated in the wiring board can be suppressed. Thereby, it can be set as the semiconductor package excellent in connection reliability.

  Furthermore, according to the present invention, a semiconductor device having the above-described semiconductor package can also be provided.

  According to the present invention, a highly reliable semiconductor package and a semiconductor device including the semiconductor package can be provided.

  The above-described object and other objects, features, and advantages will become more apparent from the preferred embodiments described below and the accompanying drawings.

1 is a cross-sectional view schematically showing a semiconductor package according to a first embodiment of the present invention. It is a top view which shows the semiconductor package shown in FIG. It is a bottom view which shows the semiconductor package shown in FIG. It is a figure which shows an example of the manufacturing method of the semiconductor package shown in FIG. It is sectional drawing which shows typically the semiconductor package which concerns on 2nd Embodiment of this invention. It is a figure which shows an example of the manufacturing method of the semiconductor package shown in FIG. It is sectional drawing which shows typically an example of embodiment of the semiconductor device of this invention. It is sectional drawing which shows the manufacturing process of the manufacturing method of the semiconductor package of this invention.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. In all the drawings, the same components are denoted by the same reference numerals, and detailed description thereof is appropriately omitted so as not to overlap.

<First embodiment>
(Semiconductor package)
First, a semiconductor package will be described.

The semiconductor package of the present embodiment will be described with reference to FIGS.
1 is a cross-sectional view schematically showing a semiconductor package according to a first embodiment of the present invention, FIG. 2 is a top view showing the semiconductor package shown in FIG. 1, and FIG. 3 shows the semiconductor package shown in FIG. FIG. 4 is a bottom view and FIG. 4 is a view showing an example of a method for manufacturing the semiconductor package shown in FIG. In the following description, for convenience of description, the upper side in FIG. 1 is referred to as “upper” and the lower side is referred to as “lower”. Further, in FIGS. 1 to 4, each part of the semiconductor package is exaggerated for convenience of explanation.

First, an outline of the semiconductor package 1 will be described.
As shown in FIG. 1, the semiconductor package 1 of the present embodiment is provided with a substrate 21, a first conductor pattern 221 provided on one surface side of the substrate 21, and the other surface side of the substrate 21. A wiring board 2 having a second conductor pattern 224 electrically connected to the first conductor pattern 221, and a semiconductor element 3 bonded to one surface of the board 21 and electrically connected to the first conductor pattern 221; The metal reinforcing members 4 and 5 bonded to the wiring board 2 and having a smaller thermal expansion coefficient than the wiring board 2 and an insulating resin layer provided so as to cover at least a part of the surface of the reinforcing member 4 (Insulating layer) 61 and an insulating resin layer (insulating layer) 62 provided so as to cover at least a part of the surface of the reinforcing member 5.
Here, in this specification, a thermal expansion coefficient means the average linear expansion coefficient of the surface direction in 50 to 150 degreeC.

Next, the semiconductor package 1 will be described in detail.
As described above, as shown in FIG. 1, the semiconductor package 1 includes a wiring board 2, a semiconductor element 3 mounted on the wiring board 2, a first reinforcing member 4, a second reinforcing member 5, The insulating layer 61 provided on the first reinforcing member 4 and the insulating layer 62 provided on the second reinforcing member 5 are included.

  According to such a semiconductor package 1, a portion of the wiring board 2 other than the portion joined to the semiconductor element 3 is reinforced by the first reinforcing member 4 and the second reinforcing member 5. Increased rigidity. In particular, since the thermal expansion coefficients of the first reinforcing member 4 and the second reinforcing member 5 are smaller than that of the wiring substrate 2 (and also the substrate 21), respectively, this is caused by the difference in thermal expansion coefficient between the wiring substrate 2 and the semiconductor element 3. Warping of the wiring board 2 can be suppressed or prevented.

  Further, an insulating layer 61 made of resin is provided on the first reinforcing member 4 made of metal. Similarly, a resin insulating layer 62 is provided on the metal second reinforcing member 5. The insulating layers 61 and 62 are excellent in heat radiation compared to the metal reinforcing members 4 and 5. For example, the thermal emissivity of a metal is about 0.1 when a black body is 1, but the thermal emissivity of a resin is larger than the emissivity of a metal and is generally 0.8 or more. . Therefore, the heat transmitted to the reinforcing members 4 and 5 can be efficiently radiated through the insulating layers 61 and 62. Thereby, the heat of the wiring board 2 can be radiated from the insulating layers 61 and 62 via the reinforcing members 4 and 5. For this reason, it is possible to suppress the warpage generated in the wiring substrate 2 and to obtain a semiconductor package having excellent connection reliability.

Hereinafter, each part of the semiconductor package 1 will be sequentially described in detail.
[Wiring board]
The wiring board 2 is a board (first wiring board) that supports the semiconductor element 3, and is, for example, a relay board (interposer) that relays electrical connection between the mounted semiconductor element 3 and a mother board 200 as will be described later. is there. In addition, the wiring substrate 2 is usually a quadrangle such as a square or a rectangle in plan view.

  The wiring board 2 includes a substrate 21, conductor patterns 221, 222, 223, 224, conductor posts 231, 232, 233, a heat transfer portion including the heat transfer post 24 that is a heat transfer portion, and insulating layers 251, 261. And have.

  In this embodiment, the conductor pattern 221 constitutes a first conductor pattern provided on one surface side of the substrate 21, and the conductor pattern 224 is provided on the other surface side of the substrate 21. A second conductor pattern electrically connected to the conductor pattern is formed.

  The substrate 21 is composed of a plurality (three layers in this embodiment) of insulating layers 211, 212, and 213. More specifically, the substrate 21 is configured by laminating an insulating layer 211, an insulating layer 212, and an insulating layer 213 in this order. In addition, the number of the insulating layers which comprise the board | substrate 21 is not limited to this, One layer or two layers may be sufficient, and four or more layers may be sufficient.

  Each of the insulating layers 211, 212, and 213 is made of an insulating material.

  Specifically, each insulating layer 211, 212, 213 is composed of a base material (fiber base material) and a resin composition impregnated in the base material. Note that at least one of the insulating layers 211, 212, and 213 may include a base material, and the other layers may include only the resin composition without including the base material.

  The base material is used as a core material for the insulating layers 211, 212, and 213. By having such a base material, the rigidity of the substrate 21 can be increased.

  Examples of the base material include glass fiber base materials composed of glass fibers such as glass woven fabrics and glass nonwoven fabrics, polyamide resin fibers such as polyamide resin fibers, aromatic polyamide resin fibers, wholly aromatic polyamide resin fibers, and polyesters. Synthesis composed of woven or non-woven fabric mainly composed of at least one of resin fiber, aromatic polyester resin fiber, polyester resin fiber such as wholly aromatic polyester resin fiber, polyimide resin fiber, fluororesin fiber, etc. Examples thereof include a fiber base material, or a paper base material mainly containing any one of craft paper, cotton linter paper, mixed paper of linter and kraft pulp, and the like. Among these, as such a base material, a glass fiber base material is preferable. Thereby, the rigidity of the substrate 21 can be increased and the substrate 21 can be thinned. Furthermore, the thermal expansion coefficient of the substrate 21 can be reduced.

  As glass which comprises such a glass fiber base material, any 1 or more types, such as E glass, C glass, A glass, S glass, D glass, NE glass, T glass, H glass, Q glass, are mentioned, for example. Can be mentioned. Among these, T glass is preferable. Thereby, the thermal expansion coefficient of a glass fiber base material can be made small, and, thereby, the thermal expansion coefficient of the board | substrate 21 can be made small.

  Moreover, when the insulating layers 211, 212, and 213 include a base material, the content of the base material in the insulating layers 211, 212, and 213 is preferably 30 to 70 wt%, and 40 to 60 wt%, respectively. Is more preferable. Thereby, the electric insulation and thermal expansion coefficient of each insulating layer can be made sufficiently low while reliably preventing damage such as cracks of these insulating layers.

  The resin composition impregnated in such a base material contains a resin material. As such a resin material, a thermosetting resin is preferably used.

  Examples of the thermosetting resin include an oil-modified resole modified with a novolak-type phenol resin such as a phenol novolak resin, a cresol novolak resin, a bisphenol A novolak resin, an unmodified resole phenol resin, tung oil, linseed oil, walnut oil, and the like. Phenol resin such as phenolic resin, bisphenol type epoxy resin such as bisphenol A epoxy resin, bisphenol F epoxy resin, novolac epoxy resin, novolac epoxy resin such as cresol novolac epoxy resin, biphenyl type epoxy resin, etc. Epoxy resin, cyanate resin, urea (urea) resin, resin having triazine ring such as melamine resin, unsaturated polyester resin, bismaleimide resin, polyurethane resin, diallyl phthalate DOO resins, silicone resins, resins having a benzoxazine ring, cyanate ester resins. Any one or more of these can be used.

  Among these, a cyanate resin is particularly preferable. Thereby, the thermal expansion coefficient of the board | substrate 21 can be made small enough. Furthermore, the electrical characteristics (low dielectric constant, low dielectric loss tangent, etc.) of the substrate 21 can be made excellent.

  Moreover, it is preferable that the said resin composition contains a filler. That is, each of the insulating layers 211, 212, and 213 preferably contains a filler. Thereby, the thermal expansion coefficient of the insulating layers 211, 212, and 213 can be lowered.

Examples of the filler include various inorganic fillers or organic fillers.
Examples of the inorganic filler (inorganic filler) include oxides such as silica, alumina, diatomaceous earth, titanium oxide, iron oxide, zinc oxide, magnesium oxide and metal ferrite, and hydroxide such as aluminum hydroxide and magnesium hydroxide. , Calcium carbonate (light, heavy), carbonates such as magnesium carbonate, dolomite, and dawsonite, sulfates or sulfites such as calcium sulfate, barium sulfate, ammonium sulfate, calcium sulfite, talc, mica, clay, glass fiber, silica Silicates such as calcium oxide, montmorillonite, bentonite, borate such as zinc borate, barium metaborate, aluminum borate, calcium borate, sodium borate, carbon black, graphite, carbon fiber and other iron Powder, copper powder, aluminum powder, zinc white, sulfide Ribuden, boron fiber, potassium titanate, and a lead zirconate titanate. Any one or more of these can be used.

  Moreover, synthetic resin powder is mentioned as an organic filler. Examples of the synthetic resin powder include alkyd resin, epoxy resin, silicone resin, phenol resin, polyester, acrylic resin, acetal resin, polyethylene, polyether, polycarbonate, polyamide, polysulfone, polystyrene, polyvinyl chloride, fluororesin, and polypropylene. And various thermosetting resins such as ethylene-vinyl acetate copolymers or powders of thermoplastic resins, or powders of copolymers of these resins. Other examples of organic fillers include aromatic or aliphatic polyamide fibers, polypropylene fibers, polyester fibers, and aramid fibers. Any one or more of these can be used.

  Among the fillers as described above, it is preferable to use an inorganic filler. Thereby, the thermal expansion coefficient of the insulating layers 211, 212, and 213 can be effectively lowered. In addition, the heat transfer properties of the insulating layers 211, 212, and 213 can be increased.

  In particular, among inorganic fillers, silica is preferable, and fused silica (particularly spherical fused silica) is preferable in terms of excellent low thermal expansion.

  Although the average particle diameter of an inorganic filler is not specifically limited, 0.05-2.0 micrometers is preferable and especially 0.1-1.0 micrometer is preferable. Accordingly, the inorganic filler can be more uniformly dispersed in the insulating layers 211, 212, and 213, and the physical strength and insulating properties of the insulating layers 211, 212, and 213 can be made particularly excellent. .

  In addition, the average particle diameter of the said inorganic filler can be measured with a particle size distribution meter (product made from HORIBA, LA-500), for example. Moreover, in this specification, an average particle diameter refers to the average particle diameter on a volume basis.

  The content of the inorganic filler in the insulating layers 211, 212, and 213 is not particularly limited, but is preferably 30 to 80 wt%, particularly 45 to 75 wt%, when the resin composition excluding the substrate is 100 wt%. Is preferred. When the content is within the above range, the insulating layers 211, 212, and 213 have sufficiently low thermal expansion coefficients and particularly low hygroscopicity.

  Moreover, the said resin composition may contain thermoplastic resins, such as a phenoxy resin, a polyimide resin, a polyamideimide resin, a polyphenylene oxide resin, a polyether sulfone resin other than the thermosetting resin mentioned above. Any one or more of these can be used as the thermoplastic resin.

  Moreover, the said resin composition may contain additives other than the said components, such as a pigment and antioxidant, as needed.

  The insulating layers 211, 212, and 213 may be made of the same material as each other or may be made of different materials.

  The average thickness of the substrate 21 composed of a plurality of layers as described above is not particularly limited, but is preferably 30 μm or more and 800 μm or less, and more preferably 30 μm or more and 400 μm or less.

  A conductor pattern 221 is provided on the upper surface of the insulating layer 211 of the substrate 21. A conductor pattern 222 is interposed between the insulating layer 211 and the insulating layer 212. A conductor pattern 223 is interposed between the insulating layer 212 and the insulating layer 213. A conductor pattern 224 is provided on the lower surface of the insulating layer 213.

In the present embodiment, an insulating layer 251 that is, for example, a solder resist is provided on the upper surface of the insulating layer 211, and the conductor pattern 221 is interposed between the insulating layer 211 and the insulating layer 251. An insulating layer 252 that is, for example, a solder resist is provided on the lower surface of the insulating layer 213, and the conductor pattern 224 is interposed between the insulating layer 213 and the insulating layer 252.
As the insulating layers 251 and 252, for example, a thermosetting resist whose main material is an epoxy resin can be used. Moreover, what is marketed by the brand name of PSR4000 / AUS308, AUS703 (made by Taiyo Ink Manufacturing) and SR-7200G (made by Hitachi Chemical Co., Ltd.) can also be used, for example. Further, the insulating layers 251 and 252 can be made of the same material as the insulating layers 61 and 62 described later.

  The conductor patterns 221, 222, 223, and 224 each function as a circuit having a plurality of wirings.

  The conductor pattern 221 has a plurality of terminals 221 a that are electrically connected to the semiconductor element 3.

  The constituent material of the conductor patterns 221, 222, 223, and 224 is not particularly limited as long as it has conductivity, and examples thereof include various metals such as copper, copper-based alloys, aluminum, and aluminum-based alloys, and various alloys. One of them. Among these, it is preferable to use copper or a copper-based alloy as the constituent material. Copper and copper-based alloys have relatively high electrical conductivity. Therefore, the electrical characteristics of the wiring board 2 can be improved. Moreover, since copper and a copper-type alloy are excellent also in heat conductivity, the heat dissipation of the wiring board 2 can also be improved.

  In addition, the average thickness of the conductor patterns 221, 222, 223, and 224 is not particularly limited, but is preferably 5 μm or more and 30 μm or less.

  The insulating layer 211 has a via hole penetrating in the thickness direction, and a conductor post (via post) 231 is provided in the via hole. The conductor post 231 passes through the insulating layer 211 in the thickness direction, and has an upper end connected to the conductor pattern 221 and a lower end connected to the conductor pattern 222. Thereby, the conductor pattern 221 and the conductor pattern 222 are electrically connected.

  The semiconductor element 3 is bonded to a plurality of terminals 221a of the conductor pattern 221 via a plurality of metal bumps (solder bumps) 31 described later. The plurality of metal bumps 31 penetrate the insulating layer 251 in the thickness direction.

  The insulating layer 212 is provided with a conductor post (via post) 232 that penetrates in the thickness direction. The conductor post 232 has an upper end connected to the conductor pattern 222 and a lower end connected to the conductor pattern 223. Thereby, the conductor pattern 222 and the conductor pattern 223 are electrically connected.

  The insulating layer 213 is provided with a conductor post (via post) 233 penetrating in the thickness direction. The conductor post 233 has an upper end connected to the conductor pattern 223 and a lower end connected to the conductor pattern 224. Thereby, the conductor pattern 223 and the conductor pattern 224 are electrically connected.

The insulating layer 251 is provided with a plurality of openings 251A penetrating in the thickness direction, and a part of the conductor pattern 221 (terminal 221a) is exposed from each opening 251A. A metal bump 31 is bonded onto each exposed terminal 221 a of the conductor pattern 221, as will be described later, and the semiconductor element 3 is electrically connected via the metal bump 31.
The plurality of openings 251 </ b> A of the insulating layer 251 are located inside the openings 40 of the reinforcing member 4.

The insulating layer 252 is provided with a plurality of openings 252A penetrating in the thickness direction, and a part (terminal) of the conductor pattern 224 is exposed from each opening. Metal bumps (solder bumps) 71 are bonded on the exposed portions (terminals) of the conductor pattern 224. That is, a plurality of metal bumps 71 are bonded to the surface of the conductor pattern 224 that is the second conductor pattern on the side opposite to the substrate 21.
Each opening 51 of the reinforcing member 5 is formed so as to surround the outer peripheral edge of each opening 252A formed in the insulating layer 252 in a plan view from the substrate surface side. The diameter of the opening 252A formed in the insulating layer 252 is smaller than the diameter of the opening 51 formed in the reinforcing member 5 (the inner diameter of the opening 51 covered with the insulating layer 62). Thereby, the contact of the conductor pattern 224 and the reinforcing member 5 can be suppressed. In addition, since the insulating layer 252 serves as a solder resist that covers and protects the conductor pattern 224, the reinforcing member 5 does not have to function as the solder resist, and the diameter of the opening 51 can be increased. Easy to place.

  The metal bump 71 is for electrically connecting the semiconductor package 1 to, for example, a mother board as will be described later.

  Here, the metal bumps 71 provided on the wiring board 2 will be described. In the present embodiment, the metal bump 71 has a substantially spherical shape. Specifically, the metal bump 71 has an arcuate curved surface that protrudes in a convex shape from the opening of the insulating layer 252 and the protruding portion is curved. The shape of the metal bump 71 is not limited to this.

  The constituent material of the metal bump 71 is not particularly limited. For example, tin-lead, tin-silver, tin-zinc, tin-bismuth, tin-antimony, tin-silver-bismuth, tin- Various brazing materials (solder) such as copper and tin-silver-copper can be used. Any one or more of these can be used as the metal bump 71.

  Moreover, the diameter of each metal bump 71 is not specifically limited, For example, it is about 100 micrometers or more and 1000 micrometers or less.

  Further, the distance (center-to-center distance) between the plurality of metal bumps 71 is not particularly limited, but is, for example, about 50 μm or more and 500 μm or less. Thus, the distance between the plurality of metal bumps 71 has become extremely small with the recent miniaturization of semiconductor packages and the increase in the number of pins. Therefore, as will be described in detail later, short-circuiting between the metal bumps 71 can be prevented by forming the insulating layer 62 on the surface of the second reinforcing member 5 having a portion located between the metal bumps 71. .

The wiring board 2 has a heat transfer portion including the heat transfer post 24.
The substrate 21 of the wiring board 2 is formed with a plurality of via holes penetrating over the entire region in the thickness direction, and the heat transfer post 24 is provided in each via hole.

Each heat transfer post 24 penetrates the entire substrate 21 in the thickness direction, and its upper end is exposed from the upper surface of the substrate 21 and its lower end is exposed from the lower surface of the substrate 21. The heat transfer post 24 has an upper end connected to the first reinforcing member 4 via the connecting portion 261 (first connecting portion) and a lower end connected to the second reinforcing member 5 via the connecting portion 262 (second connecting portion). Connected to. Thus, each heat transfer post 24 thermally connects the first reinforcing member 4 and the second reinforcing member 5.
The upper end surface of the heat transfer post 24 is flush with the upper surface of the substrate 21, and the lower end surface of the heat transfer post 24 is flush with the lower surface of the substrate 21.
The heat transfer post 24 and the connection portions 261 and 262 constitute a heat transfer portion.

The heat transfer section including the heat transfer post (heat conduction section) 24 has higher heat transfer performance than the substrate 21 (insulating layer) described above. Thereby, the heat generated in the semiconductor element 3 can be efficiently transferred from the first reinforcing member 4 to the second reinforcing member 5 through the heat transfer portion including the heat transfer post 24. As a result, the heat dissipation of the semiconductor package 1 can be improved.
Further, the heat accumulated in the wiring board 2 can be transmitted to the first reinforcing member 4 and the second reinforcing member 5 through the heat transfer post.

  Further, since each heat transfer post 24 penetrates the substrate 21 in the thickness direction, it can be formed easily and with high accuracy, similarly to a known conductor post.

  Each heat transfer post 24 may be hollow or solid. Moreover, it does not specifically limit as a cross-sectional shape of each heat-transfer post | mailbox 24, For example, circular, an ellipse, a polygon etc. are mentioned. Further, the number of heat transfer posts 24 is not particularly limited and is arbitrary, but is preferably as large as possible so as not to impair the mechanical strength of the wiring board 2.

  Further, each heat transfer post 24 does not contribute to the transmission of an electric signal, and is insulated from each conductor pattern 221, 222, 223, 224. Thereby, heat can be more efficiently transferred from the first reinforcing member 4 to the second reinforcing member 5 through the heat transfer post 24.

  In the present embodiment, the plurality of heat transfer posts 24 are arranged side by side along the outer peripheral portion of the wiring board 2 at intervals when the wiring board 2 is viewed in plan. In particular, the plurality of heat transfer posts 24 are preferably arranged side by side at equal intervals in the circumferential direction along the outer peripheral portion of the wiring board 2 when the wiring board 2 is viewed in plan. Thereby, the temperature distribution of the wiring board 2 can be made uniform.

  The plurality of heat transfer posts 24 are provided so as not to overlap the conductor patterns 221, 222, 223, and 224 described above when the wiring board 2 is viewed in plan. Thereby, formation of the heat transfer post 24 is simplified, and a short circuit of the conductor patterns 221, 222, 223, and 224 by the heat transfer post 24 can be prevented.

  The constituent material of each heat transfer post 24 is not particularly limited as long as it has a higher heat transfer property than the substrate 21 (insulating layer) described above, but a metal material is preferably used.

  Examples of such metal materials include various metals and various alloys such as copper, copper-based alloys, aluminum, and aluminum-based alloys, and any one or more of them can be used. Especially, as such a metal material, since it is excellent in heat conductivity, it is preferable to use any of copper, a copper alloy, aluminum, and an aluminum alloy.

  Further, the constituent material of the heat transfer post 24 may be different from the constituent material of the conductor posts 231 to 233 described above, but is preferably the same as the constituent material of the conductor posts 231 to 233. Thereby, the heat transfer post 24 can be formed together with the formation of the conductor posts 231 to 233. Therefore, the manufacturing of the semiconductor package 1 is simplified, and the semiconductor package 1 can be made inexpensive.

  The connecting portion 261 is provided between the heat transfer post 24 and the first reinforcing member 4 and is in direct contact with the first reinforcing member 4. The connecting portion 262 is provided between the heat transfer post 24 and the second reinforcing member 5 and is in direct contact with the second reinforcing member 5. Thereby, the thermal connection between the heat transfer post 24 and the first reinforcing member 4 and the thermal connection between the heat transfer post 24 and the second reinforcing member 5 are easily and reliably performed. However, the heat transfer post 24 and the reinforcing members 4 and 5 may be in indirect contact with each other via an adhesive or the like.

  Further, as the constituent materials of the connecting portions 261 and 262, for example, tin-lead, tin-silver, tin-zinc, tin-bismuth, tin-antimony, tin-silver-bismuth, tin, respectively. -Any of various solder materials (solder) such as copper-based, tin-silver-copper-based, or a resin composition including an inorganic filler and a resin material.

  When the connection parts 261 and 262 are made of a resin composition, examples of the inorganic filler (inorganic filler) used in the resin composition include metals such as Au, Ag, and Pt, silica, alumina, diatomaceous earth, and oxidation. Oxides such as titanium, iron oxide, zinc oxide, magnesium oxide and metal ferrite, nitrides such as boron nitride, silicon nitride, gallium nitride and titanium nitride, hydroxides such as aluminum hydroxide and magnesium hydroxide, calcium carbonate ( Light, heavy), carbonates such as magnesium carbonate, dolomite, dosonite, sulfates or sulfites such as calcium sulfate, barium sulfate, ammonium sulfate, calcium sulfite, talc, mica, clay, glass fiber, calcium silicate, montmorillonite, Silicates such as bentonite, zinc borate, barium metaborate, boric acid Borates such as minium, calcium borate, sodium borate, carbon such as carbon black, graphite, carbon fiber, other iron powder, copper powder, aluminum powder, zinc white, molybdenum sulfide, boron fiber, potassium titanate, titanium A lead acid zirconate is mentioned. Any one or more of these can be used. In addition, when the thing which has electroconductivity is used as an inorganic filler, an insulation process is performed as needed.

  Among these, as the inorganic filler, from the viewpoint of excellent insulation and thermal conductivity, oxides such as silica, alumina, diatomaceous earth, titanium oxide, iron oxide, zinc oxide, magnesium oxide, metal ferrite, boron nitride, Any one or more of nitrides such as silicon nitride, gallium nitride, and titanium nitride are preferable.

  Moreover, when the connection parts 261 and 262 are made of a resin composition, examples of the resin material used for the resin composition include various thermoplastic resins and various thermosetting resins.

  Examples of the thermoplastic resin used for the connecting portions 261 and 262 (resin composition) include polyolefins such as polyethylene, polypropylene, and ethylene-vinyl acetate copolymer, modified polyolefins, polyamides (eg, nylon 6, nylon 46, nylon 66). , Nylon 610, Nylon 612, Nylon 11, Nylon 12, Nylon 6-12, Nylon 6-66), liquid crystalline polymers such as thermoplastic polyimide, aromatic polyester, polyphenylene oxide, polyphenylene sulfide, polycarbonate, polymethyl methacrylate, polyether , Polyether ether ketone, polyether imide, polyacetal, styrene, polyolefin, polyvinyl chloride, polyurethane, polyester, polyamide, polybutadiene, Various thermoplastic elastomers such as Lance polyisoprene, fluororubber, chlorinated polyethylene, etc., or copolymers, blends, polymer alloys, etc. mainly composed of these are included, one or two of these The above can be mixed and used.

  Moreover, as a thermosetting resin used for the connection parts 261 and 262 (resin composition), for example, epoxy resin, phenol resin, urea resin, melamine resin, polyester (unsaturated polyester) resin, polyimide resin, silicone resin, polyurethane Resins etc. are mentioned, 1 type or 2 types or more of these can be mixed and used.

[Semiconductor element]
The semiconductor element (first semiconductor element) 3 is, for example, an integrated circuit element (IC), and more specifically, is any one of a logic IC, a memory, a light emitting / receiving element, and the like.

  The semiconductor element 3 is provided on the upper surface (one surface) side of the substrate 21 of the wiring substrate 2 described above, and is electrically connected to the conductor pattern 221 that is the first conductor pattern.

  Specifically, the semiconductor element 3 is provided with a plurality of terminals (not shown) on its lower surface, and each terminal is electrically connected to the plurality of terminals 221 a of the conductor pattern 221 through the metal bumps 31. It is connected.

  The constituent material of the metal bump 31 is not particularly limited. For example, as in the case of the metal bump 71 described above, for example, tin-lead, tin-silver, tin-zinc, tin-bismuth, tin-antimony, tin Any one or more of various brazing materials (solder) such as silver-bismuth, tin-copper, and tin-silver-copper can be used.

  Further, the semiconductor element 3 is bonded (bonded) to the upper surface of the wiring board 2 through the adhesive layer 32.

  The adhesive layer 32 is made of a material having adhesiveness and insulation, and is made of, for example, a cured product of an underfill material.

  The underfill material is not particularly limited, and a known underfill material can be used, but the same solder bonding resist as that for forming an insulating material 81 described later can also be used.

[First reinforcing member]
The first reinforcing member (stiffener) 4 is bonded to a portion of the upper surface (one surface) of the substrate 21 of the wiring substrate 2 described above where the semiconductor element 3 is not bonded.

  This 1st reinforcement member 4 and the board | substrate 21 can be joined through an adhesive agent, for example. Thereby, installation of the 1st reinforcement member 4 becomes easy.

  Such an adhesive is not particularly limited as long as it has an adhesive function, and various adhesives can be used, but those having excellent thermal conductivity are preferable, and include an inorganic filler and a resin material. Resin compositions can be used. As this resin composition, the thing similar to the resin composition used for the connection part 261,262 mentioned above can be used.

  Such an adhesive can constitute at least a part of the insulating layer 251 described above. In the present embodiment, the insulating layer 251 functions as an adhesive for the first reinforcing member 4.

  The first reinforcing member 4 has a smaller thermal expansion coefficient than the substrate 21 and the wiring substrate 2. Thereby, the thermal expansion of the substrate 21 can be suppressed.

  Moreover, the 1st reinforcement member 4 has comprised plate shape. Thereby, the structure of the 1st reinforcement member 4 can be made simple and small.

  In the present embodiment, the surface (that is, the upper surface) opposite to the substrate 21 of the first reinforcing member 4 is positioned closer to the substrate 21 than the surface (that is, the upper surface) opposite to the substrate 21 of the semiconductor element 3. Thereby, when the semiconductor element 3 is installed after the first reinforcing member 4 is installed in manufacturing the semiconductor package 1, the installation of the semiconductor element 3 is facilitated.

  Further, the first reinforcing member 4 has a shape surrounding the periphery of the semiconductor element 3. In the present embodiment, the first reinforcing member 4 is formed with an opening 40 in which the semiconductor element 3 is arranged at the center, and the first reinforcing member 4 is annular (more specifically, so as to surround the semiconductor element 3). In the form of a square ring). Thereby, the integrity of the 1st reinforcement member 4 and the semiconductor element 3 increases, and the effect which improves the rigidity of the wiring board 2 by the 1st reinforcement member 4 can be made excellent.

Further, as shown in FIG. 2, the first reinforcing member 4 is formed with a plurality of through holes 42 penetrating in the thickness direction. Specifically, a plurality of through holes (openings) 42 are formed so as to surround the opening 40 of the first reinforcing member 4. By forming the through hole 42, the heat of the first reinforcing member 4 can be radiated from the inside of the through hole 42, and the heat is suppressed from being accumulated in the first reinforcing member 4. Furthermore, if a plurality of through holes 42 having a small diameter are formed, the surface area of the first reinforcing member 4 is increased, so that the heat dissipation of the first reinforcing member 4 can be improved.
As will be described in detail later, the entire inner peripheral surface of the through hole 42 is covered with an insulating layer 61.

In the present embodiment, each through hole 42 is circular in plan view. In addition, the planar view shape of each through-hole 42 is not limited to a circle, For example, polygons, such as a quadrangle | tetragon, a pentagon, and a hexagon, may be sufficient.
In the present embodiment, the opening 40 has a quadrangular shape in plan view, but is not limited thereto.
However, it is preferable that the diameter of the through hole 42 and the opening 40 is uniform without changing the diameter along the through direction. By setting it as such a simple shape, the through-hole 42 and the opening part 40 can be formed easily.

  Further, the distance between the first reinforcing member 4 and the semiconductor element 3 (the distance between the inner peripheral surface 41 of the first reinforcing member 4 and the outer peripheral surface 33 of the semiconductor element 3) is on the entire circumference of the semiconductor element 3. It is formed so as to be constant throughout. Thereby, the integrity of the 1st reinforcement member 4 and the semiconductor element 3 increases, and the reinforcement effect of the wiring board 2 by these is exhibited suitably.

  The first reinforcing member 4 preferably has a difference in thermal expansion coefficient with the semiconductor element 3 of 7 ppm / ° C. or less. Thereby, the semiconductor element 3 and the 1st reinforcement member 4 can reinforce the wiring board 2 integrally, and can suppress the thermal expansion of the semiconductor package 1 whole.

  The constituent material of the first reinforcing member 4 is a metal material. When the 1st reinforcement member 4 is comprised with the metal material, the heat conductivity of the 1st reinforcement member 4 can be improved. As a result, it is possible to suppress heat from being accumulated in the wiring board 2 and the semiconductor element 3.

  Such a metal material is not particularly limited as long as it has a thermal expansion coefficient as described above, and various metal materials can be used. From the viewpoint of realizing heat dissipation and low thermal expansion, an alloy containing Fe is used. Is preferably used.

  Examples of such Fe-containing alloys include any of Fe—Ni alloys, Fe—Co—Cr alloys, Fe—Co alloys, Fe—Pt alloys, Fe—Pd alloys, and the like. It is preferable to use an Fe-Ni alloy.

  Such a metal material not only has excellent thermal conductivity, but also has a low thermal expansion coefficient and a thermal expansion coefficient close to that of a general semiconductor element 3. Therefore, the wiring board 2 can be integrally reinforced by the semiconductor element 3 and the first reinforcing member 4.

  The Fe—Ni-based alloy is not particularly limited as long as it contains Fe and Ni. In addition to Fe and Ni, the balance (M) is a metal such as Co, Ti, Mo, Cr, Pd, and Pt. Of these, one or more metals may be included.

  More specifically, examples of Fe-Ni alloys include Fe-Ni alloys such as Fe-36Ni alloy (Invar), Fe-32Ni-5Co alloy (Super Invar), and Fe-29Ni-17Co alloy (Kovar). Fe-Ni-Co alloys such as Fe-36Ni-12Co alloy (Erin bar), Ni-Mo-Fe alloys such as Fe-Ni-Cr-Ti alloy and Ni-28Mo-2Fe alloy. In addition, Fe-Ni-Co alloys are commercially available under trade names such as KV series (manufactured by NEOMAX Materials) such as KV-2, KV-4, KV-6, KV-15, and KV-25, and Nivarox. ing. Moreover, the Fe-Ni alloy is marketed with brand names, such as NS-5 and D-1 (made by NEOMAX material company), for example. Fe-Ni-Cr-Ti alloys are commercially available under trade names such as Ni-Span C-902 (manufactured by Daido Special Metal), EL-3 (manufactured by NEOMAX Material).

  The Fe—Co—Cr alloy is not particularly limited as long as it contains Fe, Co, and Cr. For example, an Fe—Co—Cr alloy such as Fe-54Co-9.5Cr (stainless invar) is used. Is mentioned. Note that the Fe—Co—Cr-based alloy may contain one or more metals of metals such as Ni, Ti, Mo, Pd, and Pt in addition to Fe, Co, and Cr.

  The Fe—Co alloy is not particularly limited as long as it contains Fe and Co. In addition to Fe and Co, one of metals such as Ni, Ti, Mo, Cr, Pd, and Pt is used. It may contain seeds or two or more metals.

  The Fe—Pt alloy is not particularly limited as long as it contains Fe and Pt. In addition to Fe and Pt, one of metals such as Co, Ni, Ti, Mo, Cr, and Pd is used. It may contain seeds or two or more metals.

  Further, the Fe—Pd alloy is not particularly limited as long as it contains Fe and Pd, and in addition to Fe and Pd, one of metals such as Co, Ni, Ti, Mo, Cr, and Pt. It may contain seeds or two or more metals.

  In particular, the thermal expansion coefficient of the first reinforcing member 4 is preferably 0.5 ppm / ° C. or more and 10 ppm / ° C. or less, more preferably 1 ppm / ° C. or more and 7 ppm / ° C. or less, and 1 ppm / ° C. or more and 5 ppm / ° C. or less. More preferably, it is not higher than ° C. Thereby, the difference in thermal expansion coefficient between the semiconductor element 3 and the first reinforcing member 4 can be reduced, and these can integrally reinforce the wiring board 2. Therefore, warping of the wiring board 2 can be effectively prevented.

  The absolute value of the difference in thermal expansion coefficient between the first reinforcing member 4 and the semiconductor element 3 is preferably 7 ppm / ° C. or less, more preferably 5 ppm / ° C. or less, and 2 ppm / ° C. or less. Is more preferable. Thereby, the difference in thermal expansion coefficient between the semiconductor element 3 and the first reinforcing member 4 can be reduced, and these can integrally reinforce the wiring board 2. Therefore, warping of the wiring board 2 can be effectively prevented.

  From the viewpoint of the thermal expansion coefficient as described above, when the metal material constituting the first reinforcing member 4 is an Fe—Ni alloy, the Fe—Ni alloy has a Ni content of 30 wt% or more and 50 wt% or less. It is preferable that the Ni content is 35 wt% or more and 45 wt% or less. Thereby, the thermal expansion coefficient of the first reinforcing member 4 can be brought close to the thermal expansion coefficient of the semiconductor element 3. In this case, the Fe—Ni-based alloy preferably has an Fe content of 50 wt% or more and 70 wt% or less, and more preferably an Fe content of 55 wt% or more and 65 wt% or less.

  Further, when the metal material constituting the first reinforcing member 4 is an Fe—Ni alloy, the Fe—Ni alloy preferably has a total content of Fe and Ni of 85 wt% or more and 100 wt% or less, The total content of Fe and Ni is more preferably 90 wt% or more and 100 wt% or less. That is, the content of the balance (M) is preferably 0 wt% or more and 15 wt% or less, and the content of the balance (M) is more preferably 0 wt% or more and 10 wt% or less. . Thereby, the thermal expansion coefficient of the first reinforcing member 4 can be brought close to the thermal expansion coefficient of the semiconductor element 3.

  The average thickness of the first reinforcing member 4 is determined according to the thermal expansion coefficient of the wiring board 2, the shape, size, constituent material, and the like of the first reinforcing member 4 and the second reinforcing member 5 of the wiring board 2. Although it is a thing and it does not specifically limit, For example, it is about 0.02 mm or more and 0.8 mm or less. In addition, although the thickness of the 1st reinforcement member 4 is uniform in this embodiment, you may have a part from which thickness differs. For example, the thickness may decrease or increase continuously or stepwise from the inside to the outside of the first reinforcing member 4.

  In the present embodiment, a gap is formed between the insulating layer 61 that covers the inner peripheral surface 41 of the opening 40 of the first reinforcing member 4 and the semiconductor element 3. May be filled with a functional material. Thereby, heat can be efficiently transmitted from the semiconductor element 3 to the first reinforcing member 4 through the thermally conductive material. As a result, the heat dissipation of the semiconductor package 1 can be improved.

  Such a heat conductive material is not particularly limited, and examples thereof include a resin composition including an inorganic filler and a resin material. As this resin composition, the thing similar to the resin composition used for the connection part 261,262 mentioned above can be used.

  The heat conductive material may be the same as that of the adhesive layer 32 (underfill material) described above. When the same material as the adhesive layer 32 is used as the heat conductive material, the heat conduction material may be used. The adhesive material and the adhesive layer 32 can also be formed collectively.

[Second reinforcing member]
The second reinforcing member (stiffener) 5 is joined to the lower surface (the other surface) of the substrate 21 of the wiring substrate 2.

  This 2nd reinforcement member 5 and the board | substrate 21 can be joined through an adhesive agent. Thereby, installation of the 2nd reinforcement member 5 becomes easy.

  Such an adhesive is not particularly limited as long as it has an adhesive function, and various adhesives can be used, but those having excellent thermal conductivity are preferable, and include an inorganic filler and a resin material. Resin compositions can be used. As this resin composition, the thing similar to the resin composition used for the connection part 261,262 mentioned above can be used.

  Such an adhesive can constitute at least a part of the insulating layer 252 described above. In the present embodiment, the insulating layer 252 functions as an adhesive for the second reinforcing member 5.

  The second reinforcing member 5 has a coefficient of thermal expansion smaller than that of the substrate 21 and the wiring substrate 2, similar to the first reinforcing member 4 described above.

  The second reinforcing member 5 has a plate shape. Thereby, the structure of the 2nd reinforcement member 5 can be made simple and small.

  Further, as shown in FIG. 3, the second reinforcing member 5 includes a portion (frame portion) 52 provided along the outer peripheral portion (outside the conductor pattern 224) of the wiring substrate 2 (substrate 21), and metal bumps. And a portion 53 provided between 71. By joining the portion 52 of the second reinforcing member 5 and the wiring substrate 2 (substrate 21), the second reinforcing member 5 can effectively reinforce the wiring substrate 2. Further, the rigidity of the second reinforcing member 5 is increased by joining the portion 53 of the second reinforcing member 5 and the wiring board 2.

  More specifically, the second reinforcing member 5 has a plurality of openings 51 formed so as to surround the metal bumps 71 without contacting the metal bumps 71 described above. One metal bump 71 is disposed in each opening 51. Thereby, the ratio of the area which the 2nd reinforcement member 5 occupies for the lower surface of the wiring board 2 can be enlarged. As a result, the effect of increasing the rigidity of the wiring board 2 by the second reinforcing member 5 can be made excellent.

  In the present embodiment, each opening 51 is circular in plan view. In addition, the planar view shape of each opening part 51 is not limited to this, For example, an ellipse, a polygon, etc. may be sufficient.

  Each opening 51 is provided corresponding to each metal bump 71 (one-to-one correspondence). Thereby, the rigidity of the second reinforcing member 5 can be made uniform. Moreover, the heat dissipation of the 2nd reinforcement member 5 can also be improved.

  In addition, the distance between the second reinforcing member 5 and each metal bump 71 (distance between the wall surface of the opening 51 and the outer peripheral surface of the metal bump 71 in plan view) extends over the entire circumference of the metal bump 71. It is formed to be constant. Thereby, the integrity of the 2nd reinforcement member 5 and each metal bump 71 increases, and the reinforcement effect of the wiring board 2 by these is exhibited suitably.

  Further, the diameter of the opening 51 is not particularly limited, but is, for example, about 20 μm or more and 470 μm or less.

Moreover, the distance (center-to-center distance) between the plurality of openings 51 is not particularly limited, and is, for example, about 50 μm to 500 μm.
Here, in the present embodiment, the openings 51 are arranged in a matrix in a plan view from the substrate surface side of the wiring board 2 as shown in FIG.

  Similarly to the first reinforcing member 4 described above, the second reinforcing member 5 preferably has a difference in thermal expansion coefficient from the semiconductor element 3 of 7 ppm / ° C. or less. Thereby, the 2nd reinforcement member 5 can reinforce the wiring board 2 effectively, and can suppress the thermal expansion of the semiconductor package 1 whole.

  Moreover, the 2nd reinforcement member 5 is comprised with the metal material. As the metal material, the same material as the first reinforcing member 4 can be used. Thereby, the heat dissipation of the 2nd reinforcement member 5 can be improved. As a result, the heat dissipation of the semiconductor package 1 can be improved.

  Although it does not specifically limit as this metal material, From a viewpoint of implement | achieving heat dissipation and low thermal expansion, it is preferable to use a Fe-Ni type alloy.

  As the Fe—Ni alloy, the same material as the first reinforcing member 4 described above can be used.

  In particular, the thermal expansion coefficient of the second reinforcing member 5 is preferably 0.5 ppm / ° C. or more and 10 ppm / ° C. or less, more preferably 1 ppm / ° C. or more and 7 ppm / ° C. or less, and 1 ppm / ° C. or more and 5 ppm / ° C. or less. More preferably, it is not higher than ° C. Thereby, the difference in thermal expansion coefficient between the semiconductor element 3 and the second reinforcing member 5 can be reduced, and the second reinforcing member 5 can effectively reinforce the wiring board 2. Therefore, warping of the wiring board 2 can be effectively prevented.

  The absolute value of the difference in thermal expansion coefficient between the second reinforcing member 5 and the semiconductor element 3 is preferably 7 ppm / ° C. or less, more preferably 5 ppm / ° C. or less, and 2 ppm / ° C. or less. Is more preferable. Thereby, the difference in thermal expansion coefficient between the semiconductor element 3 and the second reinforcing member 5 can be reduced, and the second reinforcing member 5 can effectively reinforce the wiring board 2. Therefore, warping of the wiring board 2 can be effectively prevented.

  The absolute value of the difference in thermal expansion coefficient between the second reinforcing member 5 and the first reinforcing member 4 is preferably 2 ppm / ° C. or less, more preferably 1 ppm / ° C. or less, and 0 ppm / ° C. Is more preferable. Thereby, the thermal expansion coefficient difference of the 1st reinforcement member 4 and the 2nd reinforcement member 5 can be made small, and the curvature of the wiring board 2 resulting from these thermal expansion differences can be prevented.

  From this point of view, the constituent material of the second reinforcing member 5 is preferably the same or the same as the constituent material of the first reinforcing member 4.

  The average thickness of the second reinforcing member 5 is determined according to the thermal expansion coefficient of the wiring board 2, the shape, size, constituent material, and the like of the first reinforcing member 4 and the second reinforcing member 5 of the wiring board 2. Although it is a thing and is not specifically limited, For example, it is about 0.02 mm or more and 0.8 mm or less.

  An insulating material 81 is provided (filled) between the second reinforcing member 5 and each metal bump 71. Thereby, the contact with the 2nd reinforcement member 5 and each metal bump 71 can be prevented.

The insulating material 81 has a shape surrounding the portion (upper part) of the metal bump 71 on the substrate 21 side, and is joined to each metal bump 71. Thereby, the insulating material 81 reinforces the metal bump 71.
The insulating material 81 surrounds the base side surface of the metal bump 71 on the conductor pattern 224 side and is in contact with the metal bump 71. Here, the metal bump 71 is substantially spherical and has a curved spherical surface. The metal bump 71 protrudes on the opposite side of the wiring board from the reinforcing member 5. The insulating material 81 is in contact with the metal bump 71 along a spherical surface (curved surface) constituting the peripheral surface of the metal bump 71, and a part of the metal bump 71 is embedded in the insulating material 81. ing. Further, the insulating material 81 has a shape that spreads from the peripheral surface side of the metal bump 71 toward the conductor pattern 224 side. That is, the insulating material 81 has a trapezoidal shape in a side view from a direction orthogonal to the wiring board thickness direction. Thereby, the metal bump 71 is reinforced by the insulating material 81. The insulating material 81 may be semi-cured in the semiconductor package or may be completely cured.
As the metal bump 71, the same material as that of the metal bump 31 described above can be used.
However, the shape of the insulating material 81 is not limited to this.

  The insulating material 81 preferably has a higher thermal conductivity than the substrate 21 of the wiring board 2 described above. Thereby, the thermal conductivity between the metal bump 71 and the second reinforcing member 5 can be made excellent, and the heat dissipation of the semiconductor package 1 can be improved. Such an insulating material 81 has an insulating property and includes a resin material.

  Such an insulating material 81 is not particularly limited, but is preferably made of a curable material, and is preferably formed of, for example, a thermosetting resin composition for solder bonding.

  Such a solder bonding resin composition (hereinafter also referred to as “curable flux”) is a thermosetting resin composition having a flux active compound, which acts as a flux during solder bonding and is then heated. It hardens and acts as a reinforcing material for the solder joint. In addition, the solder bonding resin composition removes harmful substances such as the solder bonding surface and the oxide of the solder material at the time of solder bonding, protects the solder bonding surface, and refines the solder material. Enables good bonding with high strength. Furthermore, the resin composition for solder bonding does not need to be removed by washing or the like after the solder bonding, and is heated as it is to become a three-dimensionally crosslinked resin, which acts as a reinforcing material for the solder bonding portion.

  Such a resin composition for solder bonding can be constituted by including, for example, a resin (A) having a phenolic hydroxyl group and a curing agent (B) of the resin.

  Although there is no restriction | limiting in particular as resin (A) which has a phenolic hydroxyl group, For example, a phenol novolak resin, an alkylphenol novolak resin, a polyhydric phenol novolak resin, a resole resin, a polyvinyl phenol resin etc. can be mentioned. Any one or more of these can be used.

  In the curable flux, the content of the resin (A) having a phenolic hydroxyl group is preferably 20 to 80% by weight, and more preferably 25 to 60% by weight of the entire curable flux. If the content of the resin (A) is less than 20% by weight, the effect of removing dirt such as solder and oxides on the metal surface may be reduced, and solder jointability may be deteriorated. When content of resin (A) exceeds 80 weight%, the hardened | cured material which has sufficient physical property cannot be obtained, and there exists a possibility that joining strength and reliability may fall.

  Further, the phenolic hydroxyl group of the resin (A) having a phenolic hydroxyl group effectively removes dirt such as oxides on the solder and the metal surface by its reducing action, and therefore effectively acts as a solder joint flux.

  Moreover, as a hardening | curing agent (B) of resin (A) which has a phenolic hydroxyl group, an epoxy compound, an isocyanate compound, etc. can be mentioned, for example. Examples of the epoxy compound and isocyanate compound include phenol-based epoxy compounds such as bisphenol, phenol novolak, alkylphenol novolak, biphenol, naphthol, and resorcinol, isocyanate compounds, saturated aliphatic, cycloaliphatic, Examples thereof include an epoxy compound and an isocyanate compound modified based on a skeleton such as a saturated aliphatic group. Any one or more of these can be used.

  The compounding amount of the curing agent (B) is such that the reactive functional group such as epoxy group and isocyanate group of the curing agent is 0.5 to 1.5 equivalent times the phenolic hydroxyl group of the resin (A). It is preferably 0.8 to 1.2 equivalent times. When the reactive functional group of the curing agent is less than 0.5 equivalents of the hydroxyl group, a cured product having sufficient physical properties cannot be obtained, and the reinforcing effect may be reduced, thereby reducing the bonding strength and reliability. There is. When the reactive functional group of the curing agent exceeds 1.5 equivalents of the hydroxyl group, the action of removing dirt such as oxides on the solder and the metal surface is lowered, and there is a possibility that the solderability is deteriorated.

  In such a solder bonding resin composition (curable flux), a cured product having good physical properties is formed by the reaction of the resin (A) having a phenolic hydroxyl group and the curing agent (B) of the resin. Therefore, it is not necessary to remove the flux by washing after soldering, the soldered part is protected by the cured product, electrical insulation is maintained even in high temperature and high humidity atmosphere, and soldering with high bonding strength and reliability is possible. It becomes.

  In addition to the resin (A) having a phenolic hydroxyl group and the curing agent (B) of the resin, the solder bonding resin as described above is dispersed in a microcrystalline state as a curable antioxidant (C). Compound (D) having phenolic hydroxyl group, curing agent (E), solvent (F), curing catalyst, silane coupling agent for improving adhesion and moisture resistance, and elimination for preventing voids It may contain a foaming agent or a liquid or powder flame retardant.

Moreover, the following can also be used as a resin composition for solder bonding.
For example, the resin composition for solder bonding may include a thermosetting resin, a flux active compound, and a curing accelerator such as imidazole.
Thermosetting resins include epoxy resin, phenoxy resin, silicone resin, oxetane resin, phenol resin, (meth) acrylate resin, polyester resin (unsaturated polyester resin), diallyl phthalate resin, maleimide resin, polyimide resin (polyimide precursor) Resin), bismaleimide-triazine resin, cyanate resin and the like. In particular, a thermosetting resin containing at least one selected from the group consisting of epoxy resins, (meth) acrylate resins, phenoxy resins, polyester resins, polyimide resins, silicone resins, maleimide resins, bismaleimide-triazine resins, and cyanate resins. It is preferable to use it. Among these, it is preferable to use an epoxy resin from the viewpoints of curability and storage stability and moisture resistance of the cured product.
Moreover, as a flux active compound, the compound which has a phenolic hydroxyl group and / or a carboxyl group is preferable. Examples of the compound having a phenolic hydroxyl group include phenol, o-cresol, 2,6-xylenol, p-cresol, m-cresol, o-ethylphenol, 2,4-xylenol, 2,5-xylenol, m- Ethylphenol, 2,3-xylenol, meditol, 3,5-xylenol, p-tert-butylphenol, catechol, p-tert-amylphenol, resorcinol, p-octylphenol, p-phenylphenol, bisphenol F, bisphenol AF, biphenol Monomers containing phenolic hydroxyl groups such as diallyl bisphenol F, diallyl bisphenol A, trisphenol, tetrakisphenol, phenol novolac resins, o-cresol novolac resins, bisphenols Nord F novolak resins, resins containing a phenolic hydroxyl group such as bisphenol A novolac resin.
Any one or more of these can be used.

Examples of the compound having a carboxyl group include an aliphatic acid anhydride, an alicyclic acid anhydride, an aromatic acid anhydride, an aliphatic carboxylic acid, and an aromatic carboxylic acid. Examples of the aliphatic acid anhydride include succinic anhydride, polyadipic acid anhydride, polyazeline acid anhydride, and polysebacic acid anhydride. Examples of the alicyclic acid anhydride include methyltetrahydrophthalic anhydride, methylhexahydrophthalic anhydride, methylhymic anhydride, hexahydrophthalic anhydride, tetrahydrophthalic anhydride, trialkyltetrahydrophthalic anhydride, methylcyclohexene dicarboxylic acid. An anhydride etc. are mentioned. Examples of the aromatic acid anhydride include phthalic anhydride, trimellitic anhydride, pyromellitic anhydride, benzophenone tetracarboxylic anhydride, ethylene glycol bistrimellitate, and glycerol tris trimellitate. Any one or more of these can be used.
Furthermore, examples of the compound having a carboxyl group and a phenolic hydroxyl group include salicylic acid, 2,3-dihydroxybenzoic acid, 2,4-dihydroxybenzoic acid, gentisic acid (2,5-dihydroxybenzoic acid), 2,6- Benzoic acid derivatives such as dihydroxybenzoic acid, 3,4-dihydroxybenzoic acid, gallic acid (3,4,5-trihydroxybenzoic acid); 1,4-dihydroxy-2-naphthoic acid, 3,5-dihydroxy- Naphthoic acid derivatives such as 2-naphthoic acid; phenolphthaline; diphenolic acid and the like. Of these, phenolphthaline, gentisic acid, 2,4-dihydroxybenzoic acid, and 2,6-dihydroxybenzoic acid are preferable, and phenolphthalin and gentisic acid are particularly preferable. Any one or more of these can be used.

  The insulating material 81 may include a heat conductive filler (filler). Examples of the filler include inorganic fillers, such as metals such as Au, Ag, and Pt, oxides such as silica, alumina, diatomaceous earth, titanium oxide, iron oxide, zinc oxide, magnesium oxide, and metal ferrite, boron nitride. , Nitrides such as silicon nitride, gallium nitride and titanium nitride, hydroxides such as aluminum hydroxide and magnesium hydroxide, carbonates such as calcium carbonate (light and heavy), magnesium carbonate, dolomite and dawsonite, calcium sulfate, Sulfates or sulfites such as barium sulfate, ammonium sulfate, calcium sulfite, talc, mica, clay, glass fiber, silicates such as calcium silicate, montmorillonite, bentonite, zinc borate, barium metaborate, aluminum borate, boron Borate such as calcium and sodium borate, car Down black, graphite, carbon, such as carbon fibers, other iron powder, copper powder, aluminum powder, zinc oxide, molybdenum sulfide, boron fiber, potassium titanate, and a lead zirconate titanate. Any one or more of these can be used. In addition, when the thing which has electroconductivity is used as an inorganic filler, an insulation process is performed as needed.

  Among these, as the inorganic filler, from the viewpoint of excellent insulation and thermal conductivity, oxides such as silica, alumina, diatomaceous earth, titanium oxide, iron oxide, zinc oxide, magnesium oxide, metal ferrite, boron nitride, Any one or more of nitrides such as silicon nitride, gallium nitride, and titanium nitride are preferable.

[Insulation layer]
The insulating layer 61 is provided on the first reinforcing member 4, and the insulating layer 62 is provided on the second reinforcing member 5.

More specifically, the insulating layer 61 is formed on the entire surface of the first reinforcing member 4 opposite to the substrate 21, on the inner peripheral surface 41 of the opening 40, and on the inner peripheral surface of each through hole 42. Is formed. The insulating layer 61 in the opening 40 is formed along the inner peripheral surface 41, and between the insulating layers 61 covering the opposing inner peripheral surface 41 in a cross-sectional view along the thickness direction of the substrate 21. A void is formed.
Similarly, in a cross-sectional view along the thickness direction of the substrate 21, a gap is formed between the insulating layers 61 covering the opposing inner peripheral surfaces of the through holes 42.
In general, since the thermal emissivity of the resin layer is higher than that of the metal layer, the heat transmitted to the first reinforcing member 4 can be efficiently radiated through the insulating layer 61. Thereby, the heat dissipation of a semiconductor package can be improved. In particular, as shown in FIG. 1, in the cross section along the thickness direction of the substrate 21 of the semiconductor package 1, in the region sandwiched between the opening 40 and the through hole 42 of the first reinforcing member 4, Since the three surfaces of the surface and both side surfaces (the inner peripheral surface of the opening 40 and the inner peripheral surface of the through hole 42) are covered with the insulating layer 61, the heat dissipation can be reliably improved.
The insulating layer 61 is not formed on the surface of the first reinforcing member 4 on the substrate 21 side. That is, in the present embodiment, the first reinforcing member 4 is in direct contact with the wiring board 2. Thereby, the heat from the wiring board 2 can be directly transferred to the first reinforcing member 4.
An adhesive may be provided on the surface of the first reinforcing member 4 on the substrate 21 side, and the first reinforcing member 4 and the solder resist of the wiring board may be bonded. In this case, the insulating layer 61 is not provided on the surface of the first reinforcing member 4 on the substrate 21 side, and an adhesive having a composition different from that of the insulating layer 61 is provided.
Furthermore, the surface of the first reinforcing member 4 opposite to the substrate 21, the inner peripheral surface 41, and the inner peripheral surface of each through hole 42 are covered with the insulating layer 61, so that the semiconductor package is incorporated into the semiconductor device. In this case, it is possible to prevent other members other than the semiconductor package and the first reinforcing member 4 from being unintentionally short-circuited.

The insulating layer 62 is provided on the entire surface of the second reinforcing member 5 on the side opposite to the substrate 21 and on the inner peripheral surface of each opening 51. In general, since the heat emissivity of the resin layer is higher than that of the metal layer, the heat transferred to the second reinforcing member 5 can be efficiently radiated through the insulating layer 62. Thereby, the heat dissipation of a semiconductor package can be improved. In particular, as shown in FIG. 1, in the cross section along the thickness direction of the substrate 21 of the semiconductor package 1, in the region sandwiched between the openings 51 of the second reinforcing member 5, the surface opposite to the substrate 21 and both sides Since the three surfaces of the surface (the inner peripheral surface of the opening 51) are covered with the insulating layer 61, the heat dissipation can be reliably improved.
The insulating layer 62 is not formed on the surface of the second reinforcing member 5 on the substrate 21 side. That is, in the present embodiment, the second reinforcing member 5 is in direct contact with the wiring board 2. Thereby, the heat from the wiring board 2 can be directly transferred to the second reinforcing member 5.
Note that an adhesive may be provided on the surface of the second reinforcing member 5 on the substrate 21 side, and the second reinforcing member 5 and the solder resist of the wiring substrate may be bonded. In this case, the insulating layer 61 is not provided on the surface of the second reinforcing member 5 on the substrate 21 side, and an adhesive having a composition different from that of the insulating layer 61 is provided.
Furthermore, by providing the insulating layer 62 on the inner peripheral surface of the opening 51, a short circuit between the inner peripheral surface of the opening 51 of the second reinforcing member 5 and the metal bump 71 can be prevented.
The insulating layer 62 only needs to be provided so as to cover at least a part of the second reinforcing member 5. Similarly, the insulating layer 61 should just be provided so that at least one part of the 1st reinforcement member 4 may be coat | covered.

  In the present embodiment, the insulating layer 61 is made of the same material as the insulating layer 251 of the wiring board 2 described above, and the insulating layer 62 is made of the same material as the insulating layer 252 of the wiring board described above. Yes.

  Specifically, as the constituent material of the insulating layers 61 and 62, a resin composition containing a resin material can be suitably used.

  Examples of the resin material used in such a resin composition include various thermoplastic resins and various thermosetting resins. The resin composition preferably contains a resin component as a main component, and the resin component is composed of a thermoplastic resin and / or a thermosetting resin.

  Examples of the thermoplastic resin used for the insulating layers 61 and 62 include polyolefins such as polyethylene, polypropylene, and ethylene-vinyl acetate copolymer, modified polyolefins, and polyamides (for example, nylon 6, nylon 46, nylon 66, nylon 610). , Nylon 612, Nylon 11, Nylon 12, Nylon 6-12, Nylon 6-66), Thermoplastic polyimide, aromatic polyester and other liquid crystal polymers, polyphenylene oxide, polyphenylene sulfide, polycarbonate, polymethyl methacrylate, polyether, polyether Ether ketone, polyether imide, polyacetal, styrene, polyolefin, polyvinyl chloride, polyurethane, polyester, polyamide, polybutadiene, transformer Various thermoplastic elastomers such as lysoprene, fluororubber, chlorinated polyethylene, etc., or copolymers, blends, polymer alloys, etc. mainly composed of these are included, one or more of these Can be mixed and used.

  Examples of the thermosetting resin used for the insulating layers 61 and 62 include epoxy resin, phenol resin, urea resin, melamine resin, polyester (unsaturated polyester) resin, polyimide resin, silicone resin, and polyurethane resin. These can be used alone or in combination of two or more.

The insulating layers 61 and 62 preferably have higher thermal conductivity than the substrate 21. Thereby, the heat from the first reinforcing member 4 can be efficiently transmitted to the insulating layer 61, and the heat from the first reinforcing member 4 can be efficiently radiated from the insulating layer 61. Similarly, heat from the second reinforcing member 5 can be efficiently transmitted to the insulating layer 62, and heat from the second reinforcing member 5 can be efficiently radiated from the insulating layer 62.
Moreover, in this embodiment, since both the 1st reinforcement member 4 and the 2nd reinforcement member 5 are coat | covered with the insulating layer, the heat dissipation of a semiconductor package can be improved reliably.

From such a viewpoint, it is preferable that the insulating layers 61 and 62 each include a resin material (resin component) and a heat conductive filler (particularly an inorganic filler). Thereby, the insulating properties and thermal conductivity of the insulating layers 61 and 62 can be made excellent. Further, the insulating layers 61 and 62 can be easily formed.
The insulating layers 61 and 62 preferably contain 10 wt% to 80 wt% of the resin component and 20 wt% to 90 wt% of the filler from the viewpoint of heat dissipation.

  Examples of the inorganic filler (inorganic filler) used for the insulating layers 61 and 62 include metals such as Au, Ag, and Pt, silica, alumina, diatomaceous earth, titanium oxide, iron oxide, zinc oxide, magnesium oxide, and metal ferrite. Oxides such as boron nitride, silicon nitride, gallium nitride, titanium nitride, hydroxides such as aluminum hydroxide and magnesium hydroxide, calcium carbonate (light and heavy), magnesium carbonate, dolomite, dosonite, etc. Carbonate, calcium sulfate, barium sulfate, ammonium sulfate, calcium sulfite and other sulfates or sulfites, talc, mica, clay, glass fiber, calcium silicate, montmorillonite, bentonite and other silicates, zinc borate, metaboric acid Barium, aluminum borate, calcium borate, sodium borate Borate, carbon black, graphite, carbon, such as carbon fibers, other iron powder, copper powder, aluminum powder, zinc oxide, molybdenum sulfide, boron fiber, potassium titanate, and a lead zirconate titanate. Any one or more of these can be used. In addition, when the thing which has electroconductivity is used as an inorganic filler, an insulation process is performed as needed.

  Among these, as the inorganic filler, from the viewpoint of excellent insulation and thermal conductivity, oxides such as silica, alumina, diatomaceous earth, titanium oxide, iron oxide, zinc oxide, magnesium oxide, metal ferrite, boron nitride, Nitride such as silicon nitride, gallium nitride and titanium nitride is preferable. Any one or more of these can be used.

  The insulating layers 61 and 62 can be formed of a solder resist in the same manner as the insulating layers 251 and 252 of the substrate 21 described above.

(Semiconductor package manufacturing method)
The semiconductor package 1 as described above can be manufactured as follows, for example. In addition, the manufacturing method of the semiconductor package 1 is not limited to this.

Hereinafter, an example of a method for manufacturing the semiconductor package 1 will be briefly described with reference to FIG.
[A1]
First, as shown in FIG. 4A, a substrate 21 provided with conductor patterns 221 to 224, conductor posts 231 to 233, and heat transfer posts 24 is prepared.
Specifically, an insulating layer 212 is prepared in which a metal layer to be a conductor pattern 223 is attached to one surface side and a metal layer to be a conductor pattern 222 is attached to the other surface side. Then, a through hole in which the conductor post 232 is formed is formed, and the conductor post 232 is filled by plating or the like. Then, the metal patterns described above are etched to form conductor patterns 222 and 223. Next, an insulating layer 211 to which a metal layer to be the conductor pattern 221 is attached is prepared. In addition, an insulating layer 213 to which a metal layer to be the conductor pattern 224 is attached is prepared.
Then, the insulating layer 211 is disposed on one surface side of the insulating layer 212 so as to cover the conductor pattern 222. Similarly, the insulating layer 213 is disposed on the other surface side of the insulating layer 212 so as to cover the conductor pattern 223. Next, a through hole for the conductor post 231 is formed in the insulating layer 211, and further, a through hole for the conductor post 233 is formed in the insulating layer 213. The conductor posts 231 and 233 are filled by plating or the like. Then, the metal layers are etched to form conductor patterns 221 and 224.
Thereafter, a through hole penetrating the insulating layers 211 to 213 is formed, and the heat transfer post 24 is filled.

[A2]
Next, as shown in FIG. 4B, a sheet-like member 104 for forming the first reinforcing member 4 is prepared, and the sheet-like member 104 is placed on the upper surface of the substrate 21 with an adhesive 106. Join.

  The sheet-like member 104 is a member that becomes the first reinforcing member 4 by processing described later, and is made of the same constituent material as the constituent material of the first reinforcing member 4 described above.

  The adhesive 106 includes a resin material and becomes the insulating layer 251. In a state where the adhesive 106 is applied to at least one of the sheet-like member 104 and the substrate 21, the sheet-like member 104 and the substrate 21 are bonded together via the adhesive 106. 21 is joined. Here, the adhesive 106 includes a thermosetting resin, and is in an uncured or semi-cured state.

  At the time of this joining, metal bumps to be the connection portions 261 are formed on the joining surface of the sheet-like member 104 with the substrate 21. Specifically, metal bumps to be the connection portions 261 are solder-bonded to the sheet-like member 104, and protrusions that protrude from the sheet-like member 104 are formed. When the sheet-like member 104 and the substrate 21 are bonded together, the metal bumps penetrate the adhesive 106 provided on the substrate 21 and are connected to the heat transfer post 24. As a result, the metal bumps constitute the connection portion 261. In the reflow process described later, the connection portion 261 and the heat transfer post 24 are solder-bonded by being heated to the melting point of the metal bump or higher.

  Similar to the joining of the sheet-like member 104 as described above, a sheet-like member 105 for forming the second reinforcing member 5 is joined to the lower surface of the substrate 21 with an adhesive 107.

  The sheet-like member 105 is a member that becomes the second reinforcing member 5 by processing described later, and is made of the same constituent material as the constituent material of the second reinforcing member 5 described above.

  The adhesive 107 includes a resin material and becomes the insulating layer 252. In a state where the adhesive 107 is applied to at least one of the sheet-like member 105 and the substrate 21, the sheet-like member 105 and the substrate 21 are bonded together via the adhesive 107. 21 is joined. Here, the adhesive 107 includes a thermosetting resin, and is in an uncured or semi-cured state.

At the time of this joining, metal bumps to be the connection portions 262 are formed on the joining surface of the sheet-like member 105 with the substrate 21. Specifically, metal bumps to be the connecting portions 262 are soldered to the sheet-like member 105. Specifically, metal bumps to be the connection portions 262 are soldered to the sheet-like member 105 to form protrusions that protrude from the sheet-like member 105. By bonding the sheet-like member 105 and the substrate 21 together, the metal bumps penetrate the adhesive 107 provided on the substrate 21 and are connected to the heat transfer post 24. As a result, the metal bumps constitute the connection part 262. In the reflow process described later, the connection portion 262 and the heat transfer post 24 are solder-bonded by being heated to the melting point of the metal bump or higher.
When the connection portion 261 (262) is made of a resin material, an opening is formed in a portion on the heat transfer post 24 of the insulating layer 251 (252), and the resin material is disposed in the opening. To do. Thereafter, the sheet-like member 104 (105) may be disposed on the resin material so that the resin material and the sheet-like member 104 (105) are in contact with each other.

[A3]
Next, the first reinforcing member 4 is formed by selectively removing a part of the sheet-like member 104 as shown in FIG. Similarly, the second reinforcing member 5 is formed by selectively removing a part of the sheet-like member 105.

  A method for removing a part of the sheet-like members 104 and 105 (that is, a method for forming the through-hole 42, the opening 40, the opening 51, etc.) is not particularly limited, but for example, it is removed by laser irradiation. Any of the method, the method of removing by etching, etc. is mentioned. These methods are excellent in processing accuracy. Therefore, even when the metal bumps 71 are arranged at a narrow pitch, the contact between the metal bumps 71 and the second reinforcing member 5 can be prevented.

As the laser, for example, a CO ₂ laser, a UV-YAG laser, or the like can be used.

  The etching may be dry etching or wet etching, but is preferably wet etching. Thereby, the 1st reinforcement member 4 and the 2nd reinforcement member 5 can be formed, preventing the damage of the board | substrate 21. FIG.

  Further, when removing part of the sheet-like members 104 and 105, it is preferable to determine the removal position based on the alignment marks provided on the sheet-like members 104 and 105 or the substrate 21.

[A4]
Next, as shown in FIG. 4D, the insulating layer 61 is formed on the first reinforcing member 4 and the insulating layer 62 is formed on the second reinforcing member 5.

The method for forming the insulating layers 61 and 62 is not particularly limited. For example, a method in which a liquid resin composition is applied and cured or solidified can be suitably used. In the present embodiment, since the insulating layers 61 and 62 are made of a thermosetting resin composition, a liquid resin composition is applied and cured as described later, so that the insulating layers 61 and 62 are cured. 62 is formed.
In the present embodiment, the insulating layer 61 is applied so as to cover the inner peripheral surface of the opening 40 of the first reinforcing member 4 and the inner peripheral surface of the through hole 42, but the inside of the opening 40, the through hole 42. Apply so that the inside of the is not completely embedded. However, the insulating layer 61 may cover the insulating layer 251 in the opening 40 and the through hole 42.
Similarly, the insulating layer 62 is applied so as to cover the inner peripheral surface of the opening 51 of the second reinforcing member 5, but is applied so as not to completely bury the inside of the opening 51. However, the insulating layer 62 may cover the insulating layer 252 in the opening 51.
As described above, the insulating layers 61 and 62 are made of a thermosetting resin composition like the insulating layers 251 and 252, and in this step, the insulating layers 61 and 62 are uncured and semi-cured. is there.

[A5]
Next, as shown in FIG. 8, an insulating material 81 is disposed in each opening 51. This insulating material 81 is in an uncured (or semi-cured) state. Thereafter, as shown in FIG. 4E, the metal bump 71 is disposed in the opening 51. By inserting the metal bump 71 into the opening 51, the insulating material 81 is pushed by the metal bump 71 and is disposed so as to surround the metal bump 71. At this time, the insulating material 81 forms a meniscus between the inner surface of the opening 51 and the metal bump 71.
Further, since the insulating layer 252 is uncured or semi-cured as described above, the metal bump 71 and the conductor pattern 224 are brought into contact with each other so that the metal bump 71 bites into the insulating layer 252. When the insulating layer 62 is applied on the insulating layer 252 in the opening 51, the metal bumps 71 are digged into the insulating layer 62 and the insulating layer 252. As a result, the opening 252A is formed. Thereafter, reflow is performed, and the metal bump 71 and the conductive pattern 224 are soldered.

  Such solder bonding is not particularly limited, but can be performed by placing each metal bump 71 in contact with the lower surface of the wiring board 2 and heating in that state, for example, 200 to 280 ° C. for 10 to 60 seconds. .

4E, after applying an underfill material to the upper surface of the wiring board 2, the semiconductor element 3 is bonded by solder reflow through the metal bumps 31. As shown in FIG. At this time, as described above, since the insulating layer 251 is uncured or semi-cured, the metal bumps 31 are arranged so as to bite into the insulating layer 251, and the metal bumps 31 are brought into contact with the conductor pattern 221. When the insulating layer 61 is applied on the insulating layer 251 in the opening 40, the metal bumps 31 are digged into the insulating layer 61 and the insulating layer 251. As a result, an opening 251A is formed in the insulating layer 251.
A resin having a flux activity similar to that of the insulating material 81 described above is used as the underfill material. Further, after mounting the semiconductor element 3 and bonding the semiconductor element 3 to the wiring board 2 by reflow using a flux or solder paste, a normal capillary underfill material is placed between the wiring board 2 and the semiconductor element 3. It can also be filled and cured.
Thereafter, the degree of cure of the insulating material 81, the insulating layers 251 and 252 and the insulating layers 61 and 62 is adjusted by appropriately performing a heating process as necessary.
The semiconductor package 1 is obtained as described above.

<Second Embodiment>
Next, a second embodiment of the present invention will be described.

  FIG. 5 is a cross-sectional view schematically showing a semiconductor package according to the second embodiment of the present invention, and FIG. 6 is a view showing an example of a method for manufacturing the semiconductor package shown in FIG. In the following description, for convenience of explanation, the upper side in FIG. 5 is referred to as “upper” and the lower side is referred to as “lower”. 5 and 6, each part of the semiconductor package is exaggerated for convenience of explanation.

  Hereinafter, the semiconductor package of the second embodiment will be described with a focus on differences from the above-described embodiments, and description of similar matters will be omitted. 5 and 6, the same reference numerals are given to the same configurations as those in the above-described embodiment.

  The semiconductor package 1 </ b> A of the second embodiment is different in the configuration of the insulating layer on the reinforcing member 5 and does not have the insulating material 81. Other points are the same as in the first embodiment.

  As shown in FIG. 5, the semiconductor package 1 </ b> A includes an insulating layer 61 </ b> A provided on the first reinforcing member 4 and an insulating layer 62 </ b> A provided on the second reinforcing member 5.

  More specifically, the insulating layer 61A is the same as the insulating layer 61 of the first embodiment, on the surface of the first reinforcing member 4 opposite to the substrate 21, on the inner peripheral surface 41, and each through hole 42. It is formed on the inner peripheral surface. As with the insulating layer 61, the insulating layer 61 </ b> A is not formed on the surface of the first reinforcing member 4 on the wiring board 2 side.

The insulating layer 62 </ b> A is provided on the surface of the second reinforcing member 5 on the side opposite to the substrate 21 and on the inner peripheral surface of each opening 51. The insulating layer 62 </ b> A is formed on the second reinforcing member 5 similarly to the insulating layer 62, and is not formed on the surface of the second reinforcing member 5 on the wiring board 2 side. In the present embodiment, the insulating material 81 is not disposed inside the opening 51.
The insulating layer 62 </ b> A surrounds the periphery of the metal bump 71 and is in contact with the metal bump 71 along the curved surface of the peripheral surface of the metal bump 71. In other words, the insulating layer 62 </ b> A fills a gap between the metal bump 71 in the opening 51 and the inner peripheral surface of the opening 51. In the present embodiment, the curable material for reinforcing the metal bump 71 and the insulating layer covering the second reinforcing member 5 are integrated to form the insulating layer 62A.
The metal bump 71 protrudes from the insulating layer 62A to the side opposite to the substrate 21.

  In the present embodiment, the insulating layers 61A and 62A are made of the same material as the insulating material 81 of the first embodiment described above.

  More specifically, the constituent material of the insulating layers 61A and 62A can be a thermosetting solder bonding resin.

(Semiconductor package manufacturing method)
The semiconductor package 1A as described above can be manufactured, for example, as follows. Note that the manufacturing method of the semiconductor package 1A is not limited to this.

Hereinafter, an example of a method for manufacturing the semiconductor package 1A will be briefly described with reference to FIG.
[B1]
First, as shown in FIG. 6A, the substrate 21 provided with the conductor patterns 221 to 224 and the heat transfer post 24 is prepared in the same manner as in the above embodiment.

[B2]
Next, as in the above embodiment, as shown in FIG. 6B, a sheet-like member 104 for forming the first reinforcing member 4 is prepared, and the sheet-like member 104 is formed on the upper surface of the substrate 21. Are bonded through an adhesive 106.
Further, similarly to the above-described embodiment, a sheet-like member for forming the second reinforcing member 5 is prepared and joined to the substrate 21 via the adhesive 107.

[B3]
Next, as in the above embodiment, by removing a part of the sheet-like member 104, the first reinforcing member 4 is formed as shown in FIG. Similarly, the second reinforcing member 5 is formed by removing a part of the sheet-like member 105.

[B4]
Next, as illustrated in FIG. 6D, the insulating layer 61 </ b> A is formed on the first reinforcing member 4, and the insulating layer 62 </ b> A is formed on the second reinforcing member 5.

The method for forming the insulating layers 61A and 62A is not particularly limited, but for example, a liquid resin composition is applied. Here, as in the above-described embodiment, the insulating layer 61A is configured so as to cover the inner peripheral surface of the opening 40 and the inner peripheral surface of the through hole 42, and not to embed the opening 40 and the through hole 42. Apply resin material.
On the other hand, the resin material constituting the insulating layer 62 </ b> A is applied so that the inside of the opening 51 of the second reinforcing member 5 is completely embedded. More specifically, the resin material is applied so that the inside of the opening 51 is embedded and the surface of the second reinforcing member 5 opposite to the substrate 21 is covered with the resin material constituting the insulating layer 62A. To do.

[B5]
Next, as shown in FIG. 6 (e), metal bumps 71 are arranged inside the openings 51. Since the insulating layer 62A is in an uncured or semi-cured state, the metal bump 71 is disposed inside the opening 51 by causing the metal bump 71 to bite into the insulating layer 62A.
Further, as described above, since the insulating layer 252 is uncured or semi-cured, the metal bump 71 is arranged so that the metal bump 71 bites into the insulating layer 252, and the metal bump 71 and the conductor pattern 224 are brought into contact with each other. . As a result, the opening 252A is formed. Thereafter, reflow is performed, and the metal bump 71 and the conductive pattern 224 are soldered.
As shown in FIG. 6E, as in the first embodiment, after applying an underfill material to the upper surface of the wiring board 2, the semiconductor element 3 is bonded by solder reflow via the metal bumps 31. .
Thereafter, the degree of cure of the insulating layers 251 and 252 and the insulating layers 61A and 62A is adjusted by appropriately performing a heating step as necessary.
The semiconductor package 1A is obtained as described above.

  Also with the semiconductor package 1A of the second embodiment as described above, it is possible to prevent the occurrence of problems due to heat.

(Semiconductor device)
Next, the semiconductor device of the present invention will be described based on a preferred embodiment.
Although the semiconductor device 100 having the semiconductor package 1 of the first embodiment will be described here, the semiconductor package 1A of the second embodiment may be used instead of the semiconductor package 1.

FIG. 7 is a cross-sectional view schematically showing an example of the embodiment of the semiconductor device of the present invention.
As shown in FIG. 7, the semiconductor device 100 includes a mother board (substrate) 200 and a semiconductor package 1 mounted on the mother board 200.

  In such a semiconductor device 100, the metal bumps 71 of the semiconductor package 1 are joined to the terminals 201 of the mother board 200. As a result, the semiconductor package 1 and the mother board 200 are electrically connected, and electrical signals are transmitted between them. In addition, the heat of the semiconductor package 1 can be released to the mother board 200 through this joint.

  According to the semiconductor device 100 as described above, since the semiconductor package 1 having excellent heat dissipation and reliability as described above is provided, the reliability is excellent.

  As mentioned above, although the semiconductor package and semiconductor device of this invention were demonstrated based on embodiment of illustration, this invention is not limited to these.

  For example, in the above-described embodiment, the first reinforcing member 4 is provided so as to surround the entire circumference of the semiconductor element 3. However, the present invention is not limited to this. A cut-out portion (notch) may be formed.

  Moreover, the opening part formed in the 2nd reinforcement member 5 does not need to respond | correspond one-to-one with each metal bump 71. FIG. That is, an opening may be formed in the second reinforcing member 5 so that one corresponds to the plurality of metal bumps 71.

In the above-described embodiment, the case where the insulating layer provided on the reinforcing member is made of a resin composition has been described as an example. However, the present invention is not limited to this. For example, the insulating layer provided on the reinforcing member is a metal. You may be comprised with inorganic compounds (ceramics), such as an oxide, metal nitride, and metal fluoride. In this case, for example, the insulating layer can be formed on the reinforcing member by thermal oxidation, vapor phase film formation, or the like.
Moreover, in the said embodiment, after attaching the reinforcement members 4 and 5 to the board | substrate 21, the opening part 40 and the opening part 51 are each formed in the reinforcement members 4 and 5, and it insulates each reinforcement member 4 and 5 after that. Although the layers 61 and 62 are provided, the semiconductor package manufacturing method is not limited to this. The opening 40 may be formed in the reinforcing member 4 in advance, and the opening 51 may be formed in the reinforcing member 5 and then attached to the substrate 21. However, as in the above-described embodiment, after the reinforcing members 4 and 5 are attached to the substrate 21, the openings 40 and the opening 51 are formed in the reinforcing members 4 and 5. And the opening 51 and the conductor pattern 224 are easily aligned.

The present invention includes the following configurations.
(1) A substrate, a first conductor pattern provided on one surface side of the substrate, and a second conductor pattern provided on the other surface side of the substrate and electrically connected to the first conductor pattern A wiring board comprising:
A semiconductor element bonded to the one surface of the substrate and electrically connected to the first conductor pattern;
A reinforcing member bonded to at least one of the one surface and the other surface of the substrate and having a smaller coefficient of thermal expansion than the substrate;
A semiconductor package having an insulating layer provided to cover at least a part of the surface of the reinforcing member.
(2) A plurality of metal bumps are bonded to the surface of the second conductor pattern opposite to the substrate,
The said reinforcement member is a semiconductor package as described in (1) which has a part joined to the said other surface of the said board | substrate, and having a non-contact and located between said metal bumps.
(3) The semiconductor package according to (2), wherein the reinforcing member has a plurality of openings, and a portion between the openings of the reinforcing member is located between the metal bumps.
(4) The semiconductor package according to (3), wherein the insulating layer is provided on at least a portion between the openings.
(5) The semiconductor package according to any one of (1) to (4), wherein the insulating layer has higher thermal conductivity than the substrate.
(6) The semiconductor package according to any one of (1) to (5), wherein the insulating layer includes a resin material and a heat conductive filler.
(7) The semiconductor package according to any one of (1) to (6), wherein the reinforcing member is made of a metal material.
(8) The semiconductor package according to (7), wherein the metal material is an Fe—Ni alloy.
(9) A semiconductor device comprising the semiconductor package according to any one of (1) to (8).
In addition, examples of reference forms will be added below.
1.
A substrate including a fiber base; a first conductor pattern provided on one surface of the substrate; and a second conductor provided on the other surface of the substrate and electrically connected to the first conductor pattern. A wiring board comprising a conductor pattern;
A semiconductor element bonded to the one surface of the substrate and electrically connected to the first conductor pattern;
A metal reinforcing member bonded to the wiring board and having a smaller coefficient of thermal expansion than the wiring board;
An insulating layer provided to cover at least part of the surface of the reinforcing member;
Have
The semiconductor package, wherein the insulating layer is an insulating resin layer or a ceramic layer.
2.
1. In the semiconductor package described in
The semiconductor package includes, as the reinforcing member, a first reinforcing member arranged on the first conductor pattern side of the wiring board and a second reinforcing member arranged on the second conductor pattern side of the wiring board,
The first reinforcing member and the second reinforcing member are each covered with the insulating layer,
The first reinforcing member has an opening for arranging the semiconductor element,
The second reinforcing member is a semiconductor package in which an opening for arranging metal bumps is formed.
3.
2. In the semiconductor package described in
A plurality of the metal bumps are spaced apart from each other;
The second reinforcing member is formed with a plurality of openings for arranging the metal bumps.
A semiconductor package in which an inner peripheral surface of each opening and a surface opposite to the wiring board and a portion located between adjacent openings are covered with the insulating layer.
4).
1. To 3. In the semiconductor package according to any one of
A plurality of metal bumps, which are bonded to the second conductor pattern and curved in a convex shape toward the opposite side of the second conductor pattern, are spaced apart,
As the reinforcing member, comprising a second reinforcing member disposed on the second conductor pattern side of the wiring board,
In the second reinforcing member, a plurality of openings for respectively arranging the plurality of metal bumps are formed,
Of the inner peripheral surface of each opening and the surface opposite to the wiring board, the portion located between adjacent openings is covered with the insulating layer,
A semiconductor package in which an insulating curable material that surrounds the periphery of the metal bump and contacts the metal bump along a curved surface that forms the periphery of the metal bump is disposed inside the opening.
5.
4). In the semiconductor package described in
The curable material is composed of the same resin composition as the resin composition constituting the insulating layer,
A semiconductor package in which the curable material and the insulating layer are integrally formed.
6).
5. In the semiconductor package described in
The curable material and the insulating layer are semiconductor packages obtained by curing a resin composition containing a flux active compound.
7). 1. To 6. In the semiconductor package according to any one of
The said insulating layer is a semiconductor package comprised including the resin material and the heat conductive filler.
8). 1. To 7. In the semiconductor package according to any one of
The wiring board has a solder resist layer that covers the second conductor pattern and has a through hole that exposes a part of the second conductor pattern.
The reinforcing member has an opening for arranging metal bumps,
The semiconductor package by which the said metal bump joined to the said 2nd conductor pattern is arrange | positioned in the through-hole of the said soldering resist layer, and the opening part of the said reinforcement member.
9. 8). In the semiconductor package described in
A semiconductor package in which a periphery of a through hole of the solder resist layer is positioned inside a periphery of an opening of the reinforcing member.
10. 1. Thru 9. In the semiconductor package according to any one of
The insulating layer is an insulating resin layer, and covers the inner peripheral surface of the opening of the reinforcing member and the surface of the reinforcing member opposite to the wiring board,
The wiring board side surface of the reinforcing member is not covered with the insulating layer, and is in direct contact with the wiring board.
11.
1. To 10. In the semiconductor package according to any one of
In the wiring board, a heat conductive heat transfer portion that penetrates the wiring board is formed,
The surface of the reinforcing member on the wiring board side is a semiconductor package that is in contact with the heat transfer portion of the wiring board.
12
1. To 11. In the semiconductor package according to any one of
As the reinforcing member, comprising a first reinforcing member disposed on the first conductor pattern side of the wiring board,
In the first reinforcing member, an opening for arranging the semiconductor element and another opening different from the opening are formed,
The said insulating layer is a semiconductor package which has coat | covered the surface on the opposite side to the said wiring board of the said 1st reinforcement member, the internal peripheral surface of the said opening part, and the internal peripheral surface of the said other opening part.
13.
The insulating layer has higher thermal conductivity than the substrate. To 12. The semiconductor package in any one of.
14 The metal material constituting the reinforcing member is an Fe—Ni alloy. Thru 13. The semiconductor package in any one of.
15. 1. To 14. A semiconductor device comprising the semiconductor package according to any one of the above.
This application claims the priority on the basis of the JP Patent application 2011-226022 for which it applied on October 13, 2011, and takes in those the indications of all here.

DESCRIPTION OF SYMBOLS 1 Semiconductor package 1A Semiconductor package 2 Wiring board 3 Semiconductor element 4 and 5 Reinforcement member 21 Substrate 24 Heat-transfer post 31 Metal bump 32 Adhesion layer 33 Outer peripheral surface 40 Opening part 41 Inner peripheral surface 42 Through-hole 51 Opening part 52 Part 53 Part 61 , 62 Insulating layer 61A, 62A Insulating layer 71 Metal bump 81 Insulating material 100 Semiconductor device 104 Sheet-like member 105 Sheet-like member 106 Adhesive 107 Adhesive 200 Motherboard 201 Terminal 211 Insulating layer 212 Insulating layer 213 Insulating layers 221, 222, 223 , 224 Conductor pattern 221a Terminal 231 Conductor post 232 Conductor post 233 Conductor post 251A Opening 251 252 Insulating layer 252A Opening 261 262 Connection

Claims (14)

A substrate including a fiber base; a first conductor pattern provided on one surface of the substrate; and a second conductor provided on the other surface of the substrate and electrically connected to the first conductor pattern. A wiring board comprising a conductor pattern;
A semiconductor element bonded to the one surface of the substrate and electrically connected to the first conductor pattern;
A metal reinforcing member bonded to the wiring board and having a smaller coefficient of thermal expansion than the wiring board;
An insulating layer provided to cover at least part of the surface of the reinforcing member;
Have
The insulating layer, the insulating resin layer or Ri ceramic layer der,
A plurality of metal bumps bonded to the second conductor pattern and curved in a convex shape toward the opposite side of the second conductor pattern are spaced apart,
As the reinforcing member, comprising a second reinforcing member disposed on the second conductor pattern side of the wiring board,
In the second reinforcing member, a plurality of openings for respectively arranging the plurality of metal bumps are formed,
Of the inner peripheral surface of each opening and the surface opposite to the wiring board, the portion located between adjacent openings is covered with the insulating layer,
A semiconductor package in which an insulating curable material that surrounds the periphery of the metal bump and contacts the metal bump along a curved surface that forms the periphery of the metal bump is disposed inside the opening . The semiconductor package according to claim 1,
The semiconductor package includes, as the reinforcing member, a first reinforcing member arranged on the first conductor pattern side of the wiring board and a second reinforcing member arranged on the second conductor pattern side of the wiring board,
The first reinforcing member and the second reinforcing member are each covered with the insulating layer,
The first reinforcing member has an opening for arranging the semiconductor element,
The second reinforcing member is a semiconductor package in which an opening for arranging metal bumps is formed. The semiconductor package according to claim 2,
A plurality of the metal bumps are spaced apart from each other;
The second reinforcing member is formed with a plurality of openings for arranging the metal bumps.
A semiconductor package in which an inner peripheral surface of each opening and a surface opposite to the wiring board and a portion located between adjacent openings are covered with the insulating layer. The semiconductor package according to any one of claims 1 to 3 ,
The curable material is composed of the same resin composition as the resin composition constituting the insulating layer,
A semiconductor package in which the curable material and the insulating layer are integrally formed. The semiconductor package according to any one of claims 1 to 4 ,
The curable material and the insulating layer are semiconductor packages obtained by curing a resin composition containing a flux active compound. The semiconductor package according to any one of claims 1 to 5 ,
The said insulating layer is a semiconductor package comprised including the resin material and the heat conductive filler. The semiconductor package according to any one of claims 1 to 6 ,
The wiring board has a solder resist layer that covers the second conductor pattern and has a through hole that exposes a part of the second conductor pattern.
The reinforcing member has an opening for arranging metal bumps,
The semiconductor package by which the said metal bump joined to the said 2nd conductor pattern is arrange | positioned in the through-hole of the said soldering resist layer, and the opening part of the said reinforcement member. The semiconductor package according to claim 7 .
A semiconductor package in which a periphery of a through hole of the solder resist layer is positioned inside a periphery of an opening of the reinforcing member. The semiconductor package according to any one of claims 1 to 8 ,
The insulating layer is an insulating resin layer, and covers the inner peripheral surface of the opening of the reinforcing member and the surface of the reinforcing member opposite to the wiring board,
The wiring board side surface of the reinforcing member is not covered with the insulating layer, and is in direct contact with the wiring board. The semiconductor package according to any one of claims 1 to 9 ,
In the wiring board, a heat conductive heat transfer portion that penetrates the wiring board is formed,
The surface of the reinforcing member on the wiring board side is a semiconductor package that is in contact with the heat transfer portion of the wiring board. The semiconductor package according to any one of claims 1 to 10 ,
As the reinforcing member, comprising a first reinforcing member disposed on the first conductor pattern side of the wiring board,
In the first reinforcing member, an opening for arranging the semiconductor element and another opening different from the opening are formed,
The said insulating layer is a semiconductor package which has coat | covered the surface on the opposite side to the said wiring board of the said 1st reinforcement member, the internal peripheral surface of the said opening part, and the internal peripheral surface of the said other opening part. The insulating layer, a semiconductor package according to any one of claims 1 to 11 having a higher thermal conductivity than the substrate. The metallic material constituting the reinforcing member, semiconductor package according to any one of claims 1 to 12, which is a Fe-Ni based alloy. A semiconductor device comprising: a semiconductor package according to any one of claims 1 to 13.

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