JP2013080803A - Manufacturing method of reinforcing member - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a manufacturing method of a reinforcing member capable of suppressing the warpage of a wiring board, preventing the occurrence of troubles due to heat, and easily bonding the reinforcing member to the wiring board.SOLUTION: A manufacturing method of a reinforcing member comprises: a first step of preparing a plate-like body 41A and processing the body 41A into a desired shape by removing an unnecessary part of the body 41A; a second step of preparing a pair of sheet materials 9 having a sheet-like support base material 91 and an adhesion layer 42A and sticking the adhesion layers 42A of the pair of sheet materials 9 while positioning a body 41 between the pair of sheet materials 9; and a third step of obtaining an adhesion layer 42 by processing the adhesion layers 42A into a desired shape by removing an unnecessary part of the adhesion layers 42A. A reinforcing member 4 is composed of a body 41 and each adhesion layer 42. The third step processes each adhesion layer 42A into a desired shape while keeping a state in which the body 41 is covered by a pair of adhesion layers 42A.

Description

  The present invention relates to a method for manufacturing a reinforcing member.

  In recent years, with the demand for higher functionality and lighter, thinner and smaller electronic devices, high-density integration and further high-density mounting of electronic components have progressed. Semiconductor packages used in these electronic devices have been In addition, the size and number of pins are increasing.

  With the miniaturization of semiconductor packages, the conventional package using a lead frame has a limit on miniaturization. Therefore, recently, it is assumed that a chip is mounted on a circuit board, and BGA (Ball Grid) is used. Array) and a new area mounting type package system such as CSP (Chip Scale Package) have been proposed.

  In general, an interposer used for a new package such as BGA or CSP is formed by forming a conductor pattern or a conductor post on a substrate obtained by impregnating a fiber base material with a resin composition.

  Such an interposer has a large difference in thermal expansion coefficient from the chip. Further, since the interposer usually has a larger area than the chip, the area of the portion not in contact with the chip is large. Such a portion not in contact with the chip is extremely low in rigidity, and due to the difference in thermal expansion between the chip and the interposer as described above, the chip side tends to warp outward at room temperature, and the reliability of electrical connection There was a problem of lowering.

JP 2002-270716 A

  An object of the present invention is to provide a method for manufacturing an auxiliary member that can suppress warping of a wiring board, prevent occurrence of a malfunction due to heat, and can be easily joined to the wiring board.

Such an object is achieved by the present inventions (1) to (8) below.
(1) A substrate, a first conductor pattern provided on one surface side of the substrate, and a second conductor pattern provided on the other surface side of the substrate and electrically connected to the first conductor pattern. A method of manufacturing a reinforcing member bonded to at least one of the one surface and the other surface of a wiring board comprising:
Preparing a plate-like main body having a smaller coefficient of thermal expansion than the substrate, and removing the unnecessary portion of the main body to process the main body into a desired shape; and
A pair of sheet materials having a sheet-like support base material and an adhesive layer provided on one surface side of the support base material and made of an adhesive are prepared, and the first sheet material is provided between the pair of sheet materials. A second step of bonding the adhesive layers of the pair of sheet materials together and burying the main body in the pair of adhesive layers, while positioning the main body processed into a desired shape in one step;
A third step of processing each adhesive layer into a desired shape by removing unnecessary portions of the adhesive layer of each sheet material,
In the third step, each adhesive layer is processed into a desired shape while maintaining the state where the main body is covered with the pair of adhesive layers,
The reinforcing member is configured by the main body and each of the adhesive layers.

  (2) In the first step, the reinforcing member manufacturing method according to (1), wherein the main body is processed into a desired shape by wet etching.

(3) The adhesive is a photosensitive adhesive,
In the third step, the method for manufacturing a reinforcing member according to the above (1) or (2), wherein each of the adhesive layers is exposed and developed to be processed into a desired shape.

  (4) The said adhesive agent is a manufacturing method of the reinforcement member as described in said (3) which is a negative photosensitive adhesive from which an exposure part becomes hardly soluble.

  (5) The method for manufacturing a reinforcing member according to any one of (1) to (4), wherein the adhesive includes a heat conductive material that transmits heat of the wiring board to the main body.

  (6) The said adhesive agent is a manufacturing method of the reinforcement member as described in said (5) comprised by the resin composition containing the resin material and the inorganic filler as the said heat conductive material.

  (7) The method for manufacturing a reinforcing member according to any one of (1) to (6), wherein the adhesive layer has insulating properties.

  (8) The method for manufacturing a reinforcing member according to any one of (1) to (7), wherein the main body is made of a metal material.

  According to the reinforcing member manufacturing method of the present invention, the reinforcing member can be easily manufactured. Further, since the reinforcing member has the adhesive layer, it can be easily attached to the wiring board. Since the wiring board is reinforced by the reinforcing member, the overall rigidity is increased.

  In particular, when the main body of the reinforcing member is formed of a member having excellent thermal conductivity (for example, a metal material), heat generated in the wiring board or the like can be efficiently radiated from the main body. Thus, since it is excellent in heat dissipation, it can suppress the temperature rise of a wiring board, Therefore The curvature of a wiring board can be suppressed or prevented also in this point.

It is sectional drawing which shows typically the semiconductor package using the reinforcement member manufactured by the manufacturing method of the reinforcement member which concerns on 1st Embodiment of this invention. It is a top view which shows the semiconductor package shown in FIG. It is a bottom view which shows the semiconductor package shown in FIG. It is a figure which shows an example of the manufacturing method of the semiconductor package shown in FIG. It is a figure which shows an example of the manufacturing method of the semiconductor package shown in FIG. It is a figure which shows an example of the manufacturing method of the semiconductor package shown in FIG. It is a figure which shows an example of the manufacturing method of the semiconductor package shown in FIG. It is sectional drawing which shows typically a semiconductor device provided with the semiconductor package shown in FIG. It is sectional drawing which shows the semiconductor package of 2nd Embodiment typically.

  Hereinafter, preferred embodiments of a method for manufacturing a reinforcing member of the present invention will be described with reference to the accompanying drawings.

<First Embodiment>
(Semiconductor package)
First, a semiconductor package using a reinforcing member manufactured by the method for manufacturing a reinforcing member of the present invention will be described.

  FIG. 1 is a cross-sectional view schematically showing a semiconductor package using a reinforcing member manufactured by the method for manufacturing a reinforcing member according to the first embodiment of the present invention, and FIG. 2 is a top view showing the semiconductor package shown in FIG. 3 is a bottom view showing the semiconductor package shown in FIG. 1, and FIGS. 4 to 7 are views showing an example of a method for manufacturing the semiconductor package shown in FIG. Hereinafter, for convenience of explanation, the upper side in FIGS. 1 to 7 is referred to as “upper” and the lower side is referred to as “lower”. 1 to 7, each part of the semiconductor package is exaggerated for convenience of explanation. In FIG. 3, the illustration of the adhesive layer 52 is omitted for convenience of explanation.

  As shown in FIG. 1, a semiconductor package 1 includes a wiring board 2, a semiconductor element 3 mounted on the wiring board 2, a first reinforcing member (reinforcing member) 4, and a second reinforcing member (reinforcing member). And 5.

  According to such a semiconductor package 1, both surfaces of the wiring board 2 are reinforced by the first reinforcing member 4 and the second reinforcing member 5 even in a portion other than the portion joined to the semiconductor element 3. Increases overall rigidity. In particular, since the thermal expansion coefficient of the first reinforcing member 4 and the second reinforcing member 5 is smaller than that of the wiring substrate 2 (specifically, a substrate 21 described later), the semiconductor element 3 is provided over the entire surface of the wiring substrate 2. In the same manner, warping of the wiring board 2 due to the difference in thermal expansion coefficient between the wiring board 2 and the semiconductor element 3 can be suppressed or prevented.

  Further, it is not necessary to increase the rigidity of the wiring board 2 itself, and the thickness of the wiring board 2 can be reduced, so that the thermal conductivity in the thickness direction of the wiring board 2 can be increased. Therefore, the semiconductor package 1 can release heat from the semiconductor element 3 through the wiring board 2. Therefore, the semiconductor package 1 can exhibit excellent heat dissipation. Moreover, the heat dissipation of the semiconductor package 1 can be enhanced by appropriately selecting the constituent materials of the first reinforcing member 4 and the second reinforcing member 5.

  For this reason, the temperature rise of the semiconductor element 3 and the wiring board 2 can be suppressed. Also in this respect, the warping of the wiring board 2 due to the difference in thermal expansion coefficient between the wiring board 2 and the semiconductor element 3 can be suppressed. It can be suppressed or prevented.

Hereinafter, each part of the semiconductor package 1 will be sequentially described in detail.
[Wiring board]
The wiring board 2 is a board that supports the semiconductor element 3, and is, for example, a relay board (interposer) that relays electrical connection between the mounted semiconductor element 3 and a mother board 200 as will be described later. In addition, the wiring substrate 2 is usually a quadrangle such as a square or a rectangle in plan view.

  The wiring board 2 includes a substrate 21, conductor patterns 221, 222, 223, 224, conductor posts 231, 232, 233, a heat transfer post 24, and solder resists 25, 26.

  In this embodiment, the conductor pattern 221 constitutes a first conductor pattern provided on one surface side of the substrate 21, and the conductor pattern 224 is provided on the other surface side of the substrate 21. A second conductor pattern electrically connected to the conductor pattern is formed.

  The substrate 21 is composed of a plurality (three layers in this embodiment) of insulating layers 211, 212, and 213. More specifically, the substrate 21 is configured by laminating an insulating layer 211, an insulating layer 212, and an insulating layer 213 in this order. In addition, the number of the insulating layers which comprise the board | substrate 21 is not limited to this, One or two layers may be sufficient, and four or more layers may be sufficient.

  Each of the insulating layers 211, 212, and 213 is made of an insulating material. Specifically, each insulating layer 211, 212, 213 is composed of a base material (fiber base material) and a resin composition impregnated in the base material.

  The base material is used as a core material for the insulating layers 211, 212, and 213. By having such a base material, the rigidity of the substrate 21 can be increased.

  Examples of the base material include glass fiber base materials composed of glass fibers such as glass woven fabrics and glass nonwoven fabrics, polyamide resin fibers such as polyamide resin fibers, aromatic polyamide resin fibers, wholly aromatic polyamide resin fibers, and polyesters. Synthesis composed of woven or non-woven fabric mainly composed of resin fiber, aromatic polyester resin fiber, polyester resin fiber such as wholly aromatic polyester resin fiber, polyimide resin fiber, fluororesin fiber, polybenzoxazole resin fiber, etc. Examples thereof include fiber base materials, kraft paper, cotton linter paper, and paper base materials mainly composed of linter and kraft pulp mixed paper. Among these, as such a base material, a glass fiber base material is preferable. Thereby, the rigidity of the substrate 21 can be increased and the substrate 21 can be thinned. Furthermore, the thermal expansion coefficient of the substrate 21 can be reduced.

  Examples of the glass constituting such a glass fiber substrate include E glass, C glass, A glass, S glass, D glass, NE glass, T glass, H glass, and quartz glass (Q glass). . Among these, T glass is preferable. Thereby, the thermal expansion coefficient of a glass fiber base material can be made small, and, thereby, the thermal expansion coefficient of the board | substrate 21 can be made small.

  Moreover, when the insulating layers 211, 212, and 213 include a base material, the content of the base material in the insulating layers 211, 212, and 213 is preferably 30 to 70 wt%, and 40 to 60 wt%, respectively. Is more preferable. Thereby, the electric insulation and thermal expansion coefficient of each insulating layer can be made sufficiently low while reliably preventing damage such as cracks of these insulating layers. In addition, at least 1 layer of the insulating layers 211, 212, and 213 may be comprised only with the resin composition, without including a base material.

  The resin composition impregnated in such a base material contains a resin material. As such a resin material, a thermosetting resin is preferably used.

  Examples of the thermosetting resin include an oil-modified resole modified with a novolak-type phenol resin such as a phenol novolak resin, a cresol novolak resin, a bisphenol A novolak resin, an unmodified resole phenol resin, tung oil, linseed oil, walnut oil, and the like. Phenolic resins such as phenolic resins, phenolic resins such as resol type phenolic resins, bisphenol type epoxy resins such as bisphenol A epoxy resin and bisphenol F epoxy resin, novolac type epoxy resins such as novolac epoxy resin and cresol novolac epoxy resin, biphenyl type epoxy resin, di Epoxy resins such as cyclopentadiene-type epoxy resins, naphthol-type epoxy resins, naphthylene ether-type epoxy resins, and other epoxy resins having a naphthalene skeleton, cyanate resins, lily (Urea) resins, resins having a triazine ring such as melamine resins, unsaturated polyester resins, bismaleimide resins, polyurethane resins, diallyl phthalate resins, silicone resins, resins having a benzoxazine ring.

  Among these, a cyanate resin is particularly preferable. Thereby, the thermal expansion coefficient of the board | substrate 21 can be made small enough. Furthermore, the electrical characteristics (low dielectric constant, low dielectric loss tangent, etc.) of the substrate 21 can be made excellent.

Moreover, it is preferable that the said resin composition contains a filler. That is, each of the insulating layers 211, 212, and 213 preferably contains a filler. Thereby, the thermal expansion coefficient of the insulating layers 211, 212, and 213 can be lowered.
Examples of the filler include various inorganic fillers or organic fillers.

  Examples of the inorganic filler (inorganic filler) include silica, alumina, boehmite, diatomaceous earth, titanium oxide, iron oxide, zinc oxide, magnesium oxide, metal ferrite and other oxides, aluminum hydroxide, magnesium hydroxide and the like. Hydroxides, calcium carbonate (light, heavy), carbonates such as magnesium carbonate, dolomite, dawsonite, sulfates or sulfites such as calcium sulfate, barium sulfate, ammonium sulfate, calcium sulfite, talc, mica, clay, glass fiber Silicates such as calcium silicate, montmorillonite, bentonite, zinc borate, barium metaborate, borate such as aluminum borate, calcium borate, sodium borate, carbon black, graphite, carbon fiber, etc. Other iron powder, copper powder, aluminum powder, Namarihana, molybdenum sulfide, boron fiber, potassium titanate, and a lead zirconate titanate.

  Moreover, synthetic resin powder is mentioned as an organic filler. Examples of the synthetic resin powder include alkyd resin, epoxy resin, silicone resin, phenol resin, polyester, acrylic resin, acetal resin, polyethylene, polyether, polycarbonate, polyamide, polysulfone, polystyrene, polyvinyl chloride, fluororesin, and polypropylene. And various thermosetting resins such as ethylene-vinyl acetate copolymers or powders of thermoplastic resins, or powders of copolymers of these resins. Other examples of organic fillers include aromatic or aliphatic polyamide fibers, polypropylene fibers, polyester fibers, and aramid fibers.

  Among the fillers as described above, it is preferable to use an inorganic filler. Thereby, the thermal expansion coefficient of the insulating layers 211, 212, and 213 can be effectively lowered. In addition, the heat transfer properties of the insulating layers 211, 212, and 213 can be increased.

  In particular, among inorganic fillers, silica is preferable, and fused silica (particularly spherical fused silica) is preferable in terms of excellent low thermal expansion.

  Although the average particle diameter of an inorganic filler is not specifically limited, 0.05-2.0 micrometers is preferable and especially 0.1-1.0 micrometer is preferable. Accordingly, the inorganic filler can be more uniformly dispersed in the insulating layers 211, 212, and 213, and the physical strength and insulating properties of the insulating layers 211, 212, and 213 can be made particularly excellent. .

  In addition, the average particle diameter of the said inorganic filler can be measured with a particle size distribution meter (product made from HORIBA, LA-500), for example. Moreover, in this specification, an average particle diameter refers to the average particle diameter on a volume basis.

  The content of the inorganic filler in the insulating layers 211, 212, and 213 is not particularly limited, but is preferably 30 to 80 wt%, particularly 45 to 75 wt%, when the resin composition excluding the substrate is 100 wt%. Is preferred. When the content is within the above range, the insulating layers 211, 212, and 213 have sufficiently low thermal expansion coefficients and particularly low hygroscopicity.

  In addition to the thermosetting resin described above, the resin composition may contain a thermoplastic resin such as a phenoxy resin, a polyimide resin, a polyamideimide resin, a polyphenylene oxide resin, or a polyethersulfone resin.

  Moreover, the said resin composition may contain additives other than the said components, such as a pigment, dye, and antioxidant, as needed.

  The insulating layers 211, 212, and 213 may be made of the same material as each other or may be made of different materials.

  The average thickness of the substrate 21 composed of a plurality of layers as described above is not particularly limited, but is preferably 30 μm or more and 800 μm or less, and more preferably 30 μm or more and 400 μm or less.

  A conductor pattern 221 is formed on the upper surface of the insulating layer 211 of the substrate 21. A conductor pattern 222 is interposed between the insulating layer 211 and the insulating layer 212. A conductor pattern 223 is interposed between the insulating layer 212 and the insulating layer 213. A conductor pattern 224 is formed on the lower surface of the insulating layer 213.

  Each of the conductor patterns 221, 222, 223, and 224 functions as a circuit having a plurality of wirings.

  The constituent material of the conductor patterns 221, 222, 223, and 224 is not particularly limited as long as it has conductivity, and examples thereof include various metals and various alloys such as copper, a copper-based alloy, aluminum, and an aluminum-based alloy. Can be mentioned. Among these, it is preferable to use copper and a copper-based alloy as the constituent material. Copper and copper-based alloys have relatively high electrical conductivity. Therefore, the electrical characteristics of the wiring board 2 can be improved. Moreover, since copper and a copper-type alloy are excellent also in heat conductivity, the heat dissipation of the wiring board 2 can also be improved.

  In addition, the average thickness of the conductor patterns 221, 222, 223, and 224 is not particularly limited, but is preferably 5 μm or more and 30 μm or less.

  The insulating layer 211 has a via hole penetrating in the thickness direction, and a conductor post (via post) 231 is provided in the via hole. The conductor post 231 penetrates the insulating layer 211 in the thickness direction, and the conductor pattern 221 and the conductor pattern 222 are electrically connected via the conductor post 231.

  Similarly, the insulating layer 212 is provided with a conductor post (via post) 232 that penetrates in the thickness direction. The conductor post 232 penetrates the insulating layer 212 in the thickness direction, and the conductor pattern 222 and the conductor pattern 223 are electrically connected via the conductor post 232.

  The insulating layer 213 is provided with a conductor post (via post) 233 penetrating in the thickness direction. The conductor post 233 penetrates the insulating layer 213 in the thickness direction, and the conductor pattern 223 and the conductor pattern 224 are electrically connected via the conductor post 233.

  Further, a solder resist 25 having a through hole at a predetermined portion is formed on the upper surface of the insulating layer 211, and the connection electrode portion of the conductor pattern 221 is exposed from the through hole. A metal bump 31 is bonded to the exposed portion, and the semiconductor element 3 and the conductor pattern 221 are electrically connected through the metal bump 31.

  The solder resist 25 has insulating properties, prevents solder from adhering to unnecessary portions of the conductor pattern 221, protects the conductor pattern 221 from dust, heat, moisture, etc. It is formed for the purpose of maintaining insulation. The constituent material of the solder resist 25 is not particularly limited as long as it has insulating properties, and for example, a thermosetting resist mainly composed of an epoxy resin can be used. Moreover, what is marketed by the brand name of PSR4000 / AUS308, AUS703 (made by Taiyo Ink Manufacturing) and SR-7200G (made by Hitachi Chemical Co., Ltd.) can also be used, for example.

  The method for forming the solder resist 25 is not particularly limited. For example, after applying and curing a thermosetting resist, a through hole may be formed by irradiating a laser, or a photosensitive liquid resist is screened. A method of printing, exposing and curing may be used.

  Further, a solder resist 26 having a through hole at a predetermined portion is formed on the lower surface of the insulating layer 213, and the connection electrode portion of the conductor pattern 224 is exposed from the through hole. Metal bumps 71 are joined to the exposed portions. The metal bump 71 is for electrically connecting the semiconductor package 1 to, for example, a mother board as will be described later.

  In the present embodiment, the metal bump 71 has a substantially spherical shape. The shape of the metal bump 71 is not limited to this.

  The constituent material of the metal bump 71 is not particularly limited. For example, tin-lead, tin-silver, tin-zinc, tin-bismuth, tin-antimony, tin-silver-bismuth, tin- Various brazing materials (solder) such as copper and tin-silver-copper can be used.

  The substrate 21 is formed with a plurality of via holes penetrating in the thickness direction, and a heat transfer post 24 is provided in each via hole.

  Each heat transfer post 24 penetrates the entire substrate 21 in the thickness direction, and its upper end is exposed from the upper surface of the solder resist 25 and its lower end is exposed from the lower surface of the solder resist 26. The heat transfer post 24 has an upper end in contact with the first reinforcing member 4 and a lower end in contact with the second reinforcing member 5.

  Each of the heat transfer posts (heat conduction portions) 24 has higher heat transfer properties than the substrate 21 (insulating layer) described above. Thereby, heat can be efficiently transferred from the first reinforcing member 4 to the second reinforcing member 5 via the heat transfer post 24. As a result, the heat dissipation of the semiconductor package 1 can be improved.

  Further, since each heat transfer post 24 penetrates the substrate 21 in the thickness direction, it can be formed easily and with high accuracy, similarly to a known conductor post.

  Each heat transfer post 24 may be hollow or solid. Moreover, it does not specifically limit as a cross-sectional shape of each conductor post 24, For example, circular, an ellipse, a polygon etc. are mentioned. Further, the number of heat transfer posts 24 is not particularly limited and is arbitrary, but is preferably as large as possible so as not to impair the mechanical strength of the wiring board 2.

  Each heat transfer post 24 does not contribute to transmission of an electrical signal. Thereby, heat can be more efficiently transferred from the first reinforcing member 4 to the second reinforcing member 5 through the heat transfer post 24.

  In the present embodiment, the plurality of heat transfer posts 24 are arranged side by side along the outer peripheral portion of the wiring board 2 at intervals when the wiring board 2 is viewed in plan. In particular, the plurality of heat transfer posts 24 are preferably arranged side by side at equal intervals in the circumferential direction along the outer peripheral portion of the wiring board 2 when the wiring board 2 is viewed in plan. Thereby, the temperature distribution of the wiring board 2 can be made more uniform.

  The plurality of heat transfer posts 24 are provided so as not to overlap the conductor patterns 221, 222, 223, and 224 described above when the wiring board 2 is viewed in plan. Thereby, formation of the heat transfer post 24 is simplified, and a short circuit between the heat transfer post 24 and the conductor patterns 221, 222, 223, and 224 can be prevented.

  The constituent material of each heat transfer post 24 is not particularly limited as long as it has a higher heat transfer property than the substrate 21 (insulating layer) described above, but a metal material is preferably used.

  Examples of the metal material include various metals and various alloys such as copper, a copper-based alloy, aluminum, and an aluminum-based alloy. Among these, copper, copper-based alloy, aluminum, and aluminum-based alloy are preferably used as the metal material from the viewpoint of excellent heat conductivity. Thereby, the heat dissipation of the wiring board 2 can also be improved.

  Further, the constituent material of the heat transfer post 24 may be different from the constituent material of the conductor posts 231 to 233 described above, but is preferably the same as the constituent material of the conductor posts 231 to 233.

[Semiconductor element]
The semiconductor element 3 is, for example, an integrated circuit element (IC), and more specifically, for example, a logic IC, a memory, and a light receiving / emitting element.

  The semiconductor element 3 is bonded to the upper surface (one surface) of the substrate 21 of the wiring substrate 2 described above, and is electrically connected to the conductor pattern 221 that is the first conductor pattern.

  Specifically, the semiconductor element 3 is provided with a plurality of terminals (not shown) on the lower surface thereof, and each of the terminals is connected to the connection electrode portion (on the conductor pattern 221 of the wiring board 2 via the metal bump 31 ( Terminal). Thereby, the semiconductor element 3 and the conductor pattern 221 of the wiring board 2 are electrically connected.

  The constituent material of the metal bump 31 is not particularly limited. For example, as in the case of the metal bump 71 described above, for example, tin-lead, tin-silver, tin-zinc, tin-bismuth, tin-antimony, tin -Various brazing materials (solder) such as silver-bismuth, tin-copper, and tin-silver-copper can be used.

  Further, the semiconductor element 3 is bonded (bonded) to the upper surface of the wiring board 2 through the adhesive layer 32. The adhesive layer 32 is made of a material having adhesiveness and insulation, and is made of, for example, a cured product of an underfill material. The underfill material is not particularly limited, and a known underfill material can be used, but the same solder bonding resist as that for forming an insulating material 81 described later can also be used.

[First reinforcing member]
The first reinforcing member (stiffener) 4 is bonded to a portion of the upper surface (one surface) of the substrate 21 of the wiring substrate 2 described above where the semiconductor element 3 is not bonded. The first reinforcing member 4 includes a main body 41 and an adhesive layer 42 that is provided on substantially the entire surface of the main body 41 and joins the main body 41 and the wiring board 2.

  The main body 41 has a smaller thermal expansion coefficient than the substrate 21. Thereby, the thermal expansion of the substrate 21 can be suppressed. The main body 41 has a plate shape. Thereby, the structure of the 1st reinforcement member 4 can be made simple and small.

  The surface (that is, the upper surface) opposite to the substrate 21 of the main body 41 is located on the same surface as the surface (that is, the upper surface) opposite to the substrate 21 of the semiconductor element 3 or on the substrate 21 side (that is, the lower side). It is preferable. Thereby, when the semiconductor element 3 is installed after the first reinforcing member 4 is installed in manufacturing the semiconductor package 1, the installation of the semiconductor element 3 is facilitated.

  In addition, as shown in FIG. 2, the main body 41 is provided so as to surround the periphery of the semiconductor element 3. In the present embodiment, the main body 41 has an annular shape (more specifically, a rectangular annular shape) so as to surround the semiconductor element 3. Thereby, the effect which raises the rigidity of the wiring board 2 by the 1st reinforcement member 4 can be made excellent.

  Further, the distance between the main body 41 and the semiconductor element 3 (the distance between the inner peripheral surface 411 of the main body 41 and the outer peripheral surface 33 of the semiconductor element 3) is constant over the entire circumference of the semiconductor element 3. Is formed. Thereby, the integrity of the main body 41 and the semiconductor element 3 is increased, and the reinforcing effect of the wiring board 2 by these is suitably exhibited. In addition, heat transfer from the semiconductor element 3 to the main body 41 via the adhesive layer 32 described later can be generated efficiently and uniformly.

  The main body 41 preferably has a difference in thermal expansion coefficient from the semiconductor element 3 of 7 ppm / ° C. or less. Thereby, the semiconductor element 3 and the main body 41 can integrally reinforce the wiring board 2 and suppress the thermal expansion of the entire semiconductor package 1.

  In addition, the constituent material of the main body 41 is not particularly limited as long as it has a thermal expansion coefficient as described above. For example, a metal material, a ceramic material, or the like can be used, but a metal material is used. preferable. When the main body 41 is made of a metal material, the heat dissipation of the main body 41 can be improved. As a result, the heat dissipation of the semiconductor package 1 can be improved.

  Such a metal material is not particularly limited as long as it has a thermal expansion coefficient as described above, and various metal materials can be used. From the viewpoint of realizing heat dissipation and low thermal expansion, an alloy containing Fe is used. Is preferably used.

  Examples of such Fe-containing alloys include Fe-Ni alloys, Fe-Co-Cr alloys, Fe-Co alloys, Fe-Pt alloys, Fe-Pd alloys, and the like. It is preferable to use a base alloy.

  Such a metal material not only has excellent heat dissipation, but also has a low thermal expansion coefficient and a thermal expansion coefficient close to that of a general semiconductor element 3. Therefore, the semiconductor element 3 and the main body 41 can integrally reinforce the wiring board 2.

  The Fe—Ni-based alloy is not particularly limited as long as it contains Fe and Ni. In addition to Fe and Ni, the balance (M) is a metal such as Co, Ti, Mo, Cr, Pd, and Pt. Of these, one or more metals may be included.

  More specifically, examples of the Fe-Ni alloy include Fe-Ni alloys such as Fe-36Ni alloy (Invar), Fe-42Ni alloy (42 alloy), Fe-32Ni-5Co alloy (Super Invar), Ni-Mo-Fe such as Fe-Ni-Co alloy such as Fe-29Ni-17Co alloy (Kovar), Fe-36Ni-12Co alloy (Erin bar), Fe-Ni-Cr-Ti alloy, Ni-28Mo-2Fe alloy An alloy etc. are mentioned. In addition, Fe-Ni-Co alloys are commercially available under trade names such as KV series (manufactured by NEOMAX Materials) such as KV-2, KV-4, KV-6, KV-15, and KV-25, and Nivarox. ing. Moreover, the Fe-Ni alloy is marketed with brand names, such as NS-5 and D-1 (made by NEOMAX material company), for example. Moreover, the Fe-Ni-Cr-Ti alloy is marketed by brand names, such as Ni-Span C-902 (made by Daido Special Metal), EL-3 (made by NEOMAX material company), for example.

  The Fe—Co—Cr alloy is not particularly limited as long as it contains Fe, Co, and Cr. For example, an Fe—Co—Cr alloy such as Fe-54Co-9.5Cr (stainless invar) is used. Can be mentioned. Note that the Fe—Co—Cr-based alloy may contain one or more metals of metals such as Ni, Ti, Mo, Pd, and Pt in addition to Fe, Co, and Cr.

  The Fe—Co alloy is not particularly limited as long as it contains Fe and Co. In addition to Fe and Co, one of metals such as Ni, Ti, Mo, Cr, Pd, and Pt is used. Or 2 or more types of metals may be included.

  The Fe—Pt alloy is not particularly limited as long as it contains Fe and Pt. In addition to Fe and Pt, one of metals such as Co, Ni, Ti, Mo, Cr, and Pd is used. Or 2 or more types of metals may be included.

  Further, the Fe—Pd alloy is not particularly limited as long as it contains Fe and Pd, and in addition to Fe and Pd, one of metals such as Co, Ni, Ti, Mo, Cr, and Pt. It may contain seeds or two or more metals.

  In particular, the thermal expansion coefficient of the main body 41 is preferably 0.5 ppm / ° C. or more and 10 ppm / ° C. or less, more preferably 1 ppm / ° C. or more and 7 ppm / ° C. or less, and 1 ppm / ° C. or more and 5 ppm / ° C. or less. More preferably. Thereby, the difference in thermal expansion coefficient between the semiconductor element 3 and the main body 41 can be reduced, and these can integrally reinforce the wiring board 2. Therefore, warping of the wiring board 2 can be effectively prevented.

  Further, the absolute value of the difference in thermal expansion coefficient between the main body 41 and the semiconductor element 3 is preferably 7 ppm / ° C. or less, more preferably 5 ppm / ° C. or less, and further preferably 2 ppm / ° C. or less. . Thereby, the difference in thermal expansion coefficient between the semiconductor element 3 and the main body 41 can be reduced, and these can integrally reinforce the wiring board 2. Therefore, warping of the wiring board 2 can be effectively prevented.

  From the viewpoint of the thermal expansion coefficient as described above, when the metal material constituting the main body 41 is an Fe—Ni alloy, the Fe—Ni alloy has a Ni content of 30 wt% or more and 50 wt% or less. It is preferable that the Ni content is 35 wt% or more and 45 wt% or less. Thereby, the thermal expansion coefficient of the main body 41 can be brought close to the thermal expansion coefficient of the semiconductor element 3. In this case, the Fe—Ni-based alloy preferably has an Fe content of 50 wt% or more and 70 wt% or less, and more preferably an Fe content of 55 wt% or more and 65 wt% or less.

  When the metal material constituting the main body 41 is an Fe—Ni alloy, the Fe—Ni alloy preferably has a total content of Fe and Ni of 85 wt% or more and 100 wt% or less, and Fe and Ni The total content of is more preferably 90 wt% or more and 100 wt% or less. That is, the content of the balance (M) is preferably 0 wt% or more and 15 wt% or less, and the content of the balance (M) is more preferably 0 wt% or more and 10 wt% or less. . Thereby, the thermal expansion coefficient of the main body 41 can be brought close to the thermal expansion coefficient of the semiconductor element 3.

  The average thickness of the main body 41 is determined according to the thermal expansion coefficient of the wiring board 2, the shape, size, constituent material, etc. of the wiring board 2, and is not particularly limited. It is about 0.8 mm or less.

  The adhesive layer 42 is provided so as to cover almost the entire region of the main body 41 (specifically, the entire region excluding the outer peripheral surface), and has an opening corresponding to the opening formed in the main body 41. That is, it can be said that the main body 41 is almost entirely covered with a thin film composed of the adhesive layer 42.

  The adhesive layer 42 has a function of joining the main body 41 to the wiring board 2 and is made of an adhesive containing a heat conductive material. Thereby, it is possible to obtain the adhesive layer 42 that exhibits a sufficient function as the adhesive layer and is excellent in thermal conductivity. Therefore, the heat from the wiring board 2 can be efficiently transmitted to the main body 41, and the heat dissipation of the semiconductor package 1 can be improved. The adhesive layer 42 has an insulating property. Thereby, the short circuit with the conductor pattern 221 and the main body 41 can be prevented, and the reliability of the semiconductor package 1 improves.

  The adhesive is not particularly limited as long as it can exhibit adhesiveness, but is preferably a photosensitive adhesive. In addition, the photosensitive adhesive includes a negative type in which an exposed portion is hardly soluble and a positive type in which an exposed portion is easily soluble, but a negative type is preferable. As a result, the first reinforcing member 4 can be easily manufactured as will be described later.

  The negative photosensitive adhesive is not particularly limited. For example, a material in which the exposed portion is hardly soluble by a photocrosslinking reaction such as polyvinyl cinnamate and polyvinyl azide benzal, or a photopolymerization reaction such as acrylamide. The material by which an exposed part becomes hardly soluble by is mentioned.

  Although it does not specifically limit as a heat conductive material contained in the said adhesive agent, It is preferable that it is an inorganic filler (inorganic filler). Thereby, the thermal conductivity of the adhesive layer 42 can be further increased.

  Examples of such inorganic fillers include metals such as Au, Ag, and Pt, oxides such as silica, alumina, boehmite, diatomaceous earth, titanium oxide, iron oxide, zinc oxide, magnesium oxide, and metal ferrite, and boron nitride. , Nitrides such as silicon nitride, gallium nitride and titanium nitride, hydroxides such as aluminum hydroxide and magnesium hydroxide, carbonates such as calcium carbonate (light and heavy), magnesium carbonate, dolomite and dawsonite, calcium sulfate, Sulfates or sulfites such as barium sulfate, ammonium sulfate, calcium sulfite, talc, mica, clay, glass fiber, silicates such as calcium silicate, montmorillonite, bentonite, zinc borate, barium metaborate, aluminum borate, boron Borate such as calcium and sodium borate, potassium Carbon black, graphite, carbon, such as carbon fibers, other iron powder, copper powder, aluminum powder, zinc oxide, molybdenum sulfide, boron fiber, potassium titanate, and a lead zirconate titanate. In addition, when what has electroconductivity as an inorganic filler is used, the insulation process is performed to the site | part which the contact bonding layer 42 contacts as needed.

  Among them, as inorganic fillers, oxides such as silica, alumina, diatomaceous earth, titanium oxide, iron oxide, zinc oxide, magnesium oxide, and metal ferrite, boron nitride, and nitridation from the viewpoint of excellent insulation and thermal conductivity. Nitride such as silicon, gallium nitride and titanium nitride is preferable.

  Moreover, although the average thickness of the contact bonding layer 42 is not specifically limited, For example, it is about 0.01 mm or more and 0.2 mm or less.

[Second reinforcing member]
The second reinforcing member (stiffener) 5 is joined to the lower surface (the other surface) of the substrate 21 of the wiring substrate 2. Similar to the first reinforcing member 4 described above, the second reinforcing member 5 includes a main body 51 having a smaller coefficient of thermal expansion than the substrate 21 and an adhesive layer 52 provided on the upper surface of the main body 51.

  The main body 51 has a plate shape. Thereby, the structure of the 2nd reinforcement member 5 can be made simple and small.

  As shown in FIG. 3, the main body 51 includes a portion (frame portion) 511 provided along the outer peripheral portion (outside the conductor pattern 224) of the wiring substrate 2 (substrate 21) and the metal bumps 71. And a portion 512 provided therebetween. The main body 51 can effectively reinforce the wiring board 2 by joining the portion 511 of the main body 51 and the wiring board 2 (board 21). In addition, the rigidity of the main body 51 is increased by joining the portion 512 of the main body 51 and the wiring board 2.

  More specifically, the main body 51 has a plurality of openings 513 formed so as to surround the metal bumps 71 without contacting the metal bumps 71 described above. Thereby, the ratio of the area which the main body 51 occupies in the lower surface of the wiring board 2 can be enlarged. As a result, the effect of increasing the rigidity of the wiring board 2 by the main body 51 can be made excellent.

  Here, in the present embodiment, each opening 513 has a circular shape in plan view. In addition, the planar view shape of each opening part 513 is not limited to this, For example, an ellipse, a polygon, etc. may be sufficient.

  Each opening 513 is provided corresponding to each metal bump 71 (one-to-one correspondence). Thereby, the rigidity of the main body 51 can be made uniform. Moreover, the heat dissipation of the main body 51 can also be improved.

  Further, the distance between the main body 51 and each metal bump 71 (that is, the distance between the wall surface of the opening 513 and the outer peripheral surface of the metal bump 71 in plan view) is constant over the entire circumference of the metal bump 71. It is formed to become. Thereby, the integrity of the main body 51 and each metal bump 71 increases, and the reinforcing effect of the wiring board 2 by these is suitably exhibited.

  Further, like the main body 41 described above, the main body 51 preferably has a difference in thermal expansion coefficient from the semiconductor element 3 of 7 ppm / ° C. or less. Thereby, the main body 51 can effectively reinforce the wiring board 2 and suppress the thermal expansion of the entire semiconductor package 1.

  Further, the constituent material of the main body 51 is not particularly limited as long as it has a thermal expansion coefficient as described above, and the same constituent material as that of the main body 41 described above can be used. A ceramic material or the like can be used, but a metal material is preferably used. If the main body 51 is comprised with the metal material, the heat dissipation of the main body 51 can be improved. As a result, the heat dissipation of the semiconductor package 1 can be improved.

  Although it does not specifically limit as this metal material, From a viewpoint of implement | achieving heat dissipation and low thermal expansion, it is preferable to use a Fe-Ni type alloy. As the Fe—Ni alloy, the same material as the main body 41 described above can be used.

  In particular, the thermal expansion coefficient of the main body 51 is preferably 0.5 ppm / ° C. or more and 10 ppm / ° C. or less, more preferably 1 ppm / ° C. or more and 7 ppm / ° C. or less, and 1 ppm / ° C. or more and 5 ppm / ° C. or less. More preferably. Thereby, the difference in thermal expansion coefficient between the semiconductor element 3 and the main body 51 can be reduced, and the main body 51 can effectively reinforce the wiring board 2. Therefore, warping of the wiring board 2 can be effectively prevented.

  The absolute value of the difference in thermal expansion coefficient between the main body 51 and the semiconductor element 3 is preferably 7 ppm / ° C. or less, more preferably 5 ppm / ° C. or less, and further preferably 2 ppm / ° C. or less. . Thereby, the difference in thermal expansion coefficient between the semiconductor element 3 and the main body 51 can be reduced, and the main body 51 can effectively reinforce the wiring board 2. Therefore, warping of the wiring board 2 can be effectively prevented.

  The absolute value of the difference in thermal expansion coefficient between the main body 51 and the main body 41 is preferably 2 ppm / ° C. or less, more preferably 1 ppm / ° C. or less, and further preferably 0 ppm / ° C. Thereby, the thermal expansion coefficient difference between the main body 51 and the main body 41 can be reduced, and the warp of the wiring board 2 due to these thermal expansion differences can be prevented.

  From such a viewpoint, the constituent material of the main body 51 is preferably the same as or the same as the constituent material of the main body 41.

  The average thickness of the main body 51 is determined according to the thermal expansion coefficient of the wiring board 2, the shape, size, constituent material, etc. of the wiring board 2, and is not particularly limited. It is about 0.8 mm or less.

  The adhesive layer 52 is provided so as to cover almost the entire area of the main body 51 (specifically, the entire area excluding the outer peripheral surface), and has an opening corresponding to the opening formed in the main body 51. That is, it can be said that the main body 51 is almost entirely covered with a thin film formed of the adhesive layer 52.

  The adhesive layer 52 has a function of joining the main body 51 to the wiring board 2 and is made of an adhesive containing a heat conductive material. Thereby, the adhesive layer 52 excellent in thermal conductivity can be obtained while sufficiently exhibiting the function as the adhesive layer. Therefore, the heat from the wiring board 2 can be efficiently transmitted to the main body 51, and the heat dissipation of the semiconductor package 1 can be improved. The adhesive layer 52 has an insulating property. Thereby, a short circuit between the conductor pattern 224 and the main body 51 can be prevented, and the reliability of the semiconductor package 1 is improved.

  In particular, the metal bumps 71 are disposed in the openings 513 of the main body 51. By covering the main body 51 with the insulating adhesive layer 52, the metal bumps 71 and the main body 51 can be prevented from contacting each other. Can be effectively prevented.

  As the adhesive constituting the adhesive layer 52, the same material as that of the adhesive layer 42 can be used.

  An insulating material 81 is provided between the second reinforcing member 5 and each metal bump 71. Thereby, the contact with the 2nd reinforcement member 5 (especially main body 51) and each metal bump 71 can be prevented. Therefore, the rigidity and heat dissipation of the second reinforcing member 5 can be enhanced while improving the reliability of the semiconductor package 1.

  Further, the insulating material 81 is formed so as to surround the metal bump 71 and is bonded to each metal bump 71. Thereby, the insulating material 81 reinforces the metal bump 71. Such an insulating material 81 has an insulating property and includes a resin material. Such an insulating material 81 is not particularly limited, but is preferably formed of, for example, a solder bonding resin having thermosetting properties.

  Such a solder bonding resin (hereinafter also referred to as “curing flux”) acts as a flux at the time of solder bonding, and then cures by heating to act as a reinforcing material for the solder bonding portion. In addition, the solder bonding resin removes harmful substances such as solder joint surfaces and oxides of the solder material at the time of solder joint, protects the solder joint surface, and refines the solder material to improve the strength. Allows large good joints. Furthermore, the solder bonding resin does not need to be removed by washing or the like after the solder bonding, and is heated as it is to become a three-dimensionally crosslinked resin, which acts as a reinforcing material for the solder bonding portion.

  Such a solder bonding resin can be configured to include, for example, a resin (A) having a phenolic hydroxyl group and a curing agent (B) of the resin.

  Although there is no restriction | limiting in particular as resin (A) which has a phenolic hydroxyl group, For example, a phenol novolak resin, an alkylphenol novolak resin, a polyhydric phenol novolak resin, a resole resin, a polyvinyl phenol resin etc. can be mentioned.

  In the curable flux, the content of the resin (A) having a phenolic hydroxyl group is preferably 20 to 80% by weight, and more preferably 25 to 60% by weight of the entire curable flux. If the content of the resin (A) is less than 20% by weight, the effect of removing dirt such as solder and oxides on the metal surface may be reduced, and solder jointability may be deteriorated. When content of resin (A) exceeds 80 weight%, the hardened | cured material which has sufficient physical property cannot be obtained, and there exists a possibility that joining strength and reliability may fall.

  Further, the phenolic hydroxyl group of the resin (A) having a phenolic hydroxyl group effectively removes dirt such as oxides on the solder and the metal surface by its reducing action, and therefore effectively acts as a solder joint flux.

  Moreover, as a hardening | curing agent (B) of resin (A) which has a phenolic hydroxyl group, an epoxy compound, an isocyanate compound, etc. can be mentioned, for example. Examples of the epoxy compound and isocyanate compound include phenol-based epoxy compounds such as bisphenol, phenol novolak, alkylphenol novolak, biphenol, naphthol, and resorcinol, isocyanate compounds, saturated aliphatic, cycloaliphatic, Examples thereof include an epoxy compound and an isocyanate compound modified based on a skeleton such as a saturated aliphatic group.

  The compounding amount of the curing agent (B) is such that the reactive functional group such as epoxy group and isocyanate group of the curing agent is 0.5 to 1.5 equivalent times the phenolic hydroxyl group of the resin (A). It is preferably 0.8 to 1.2 equivalent times. When the reactive functional group of the curing agent is less than 0.5 equivalents of the hydroxyl group, a cured product having sufficient physical properties cannot be obtained, and the reinforcing effect may be reduced, thereby reducing the bonding strength and reliability. There is. When the reactive functional group of the curing agent exceeds 1.5 equivalents of the hydroxyl group, the action of removing dirt such as oxides on the solder and the metal surface is lowered, and there is a possibility that the solderability is deteriorated.

  Such a solder bonding resin (curable flux) is formed because a cured product having good physical properties is formed by the reaction of the resin (A) having a phenolic hydroxyl group and the curing agent (B) of the resin. It is not necessary to remove the flux by washing after soldering, the soldered part is protected by the cured product, and electrical insulation is maintained even in a high temperature and high humidity atmosphere, and soldering with high joining strength and reliability is possible. .

  In addition to the resin (A) having a phenolic hydroxyl group and the curing agent (B) of the resin, the solder bonding resin as described above is dispersed in a microcrystalline state as a curable antioxidant (C). Compound (D) having phenolic hydroxyl group, curing agent (E), solvent (F), curing catalyst, silane coupling agent for improving adhesion and moisture resistance, and elimination for preventing voids It may contain a foaming agent or a liquid or powder flame retardant.

  According to the semiconductor package 1 configured as described above, both surfaces of the wiring board 2 are reinforced by the first reinforcing member 4 and the second reinforcing member 5 even in a portion other than the portion joined to the semiconductor element 3. Therefore, the rigidity of the entire semiconductor package 1 is increased. In particular, since the thermal expansion coefficient of the first reinforcing member 4 and the second reinforcing member 5 is smaller than that of the wiring board 2, the semiconductor package 1 is provided in the same manner as the semiconductor element 3 is provided over the entire surface of the wiring board 2. Increases overall rigidity. Therefore, it is possible to suppress or prevent warping of the wiring board 2 due to the difference in thermal expansion coefficient between the wiring board 2 and the semiconductor element 3.

  Moreover, since the thickness of the wiring board 2 can be reduced, the thermal conductivity in the thickness direction of the wiring board 2 can be increased. Therefore, the semiconductor package 1 can release the heat from the semiconductor element 3 through the wiring board 2 and is excellent in heat dissipation. Moreover, the heat dissipation of the semiconductor package 1 can be enhanced by appropriately selecting the constituent materials of the first reinforcing member 4 and the second reinforcing member 5.

  For this reason, since the temperature rise of the semiconductor element 3 and the wiring board 2 can be suppressed, the warping of the wiring board 2 due to the difference in thermal expansion coefficient between the wiring board 2 and the semiconductor element 3 is also suppressed in this respect. Or it can be prevented.

  Further, according to the semiconductor package 1, since the first reinforcing member 4 has the insulating adhesive layer 42, the first reinforcing member 4 is wired while preventing the main body 41 and the conductor pattern 221 from being short-circuited. It can be easily bonded to the substrate 2. The same applies to the second reinforcing member 5. Therefore, as will be described later, the manufacture of the semiconductor package 1 is simplified.

(Semiconductor package manufacturing method)
The semiconductor package 1 as described above can be manufactured as follows, for example.

  Hereinafter, an example of a method for manufacturing the semiconductor package 1 will be briefly described with reference to FIGS. The manufacturing method of the semiconductor package 1 includes: [1] a process A for manufacturing the wiring board 2, the first reinforcing member 4 and the second reinforcing member 5; and [2] the first and second reinforcing members 4, 5 on the wiring board 2. And [3] a process C for mounting the semiconductor element 3 on the wiring board 2. Note that the order of steps B and C may be reversed. That is, step B may be performed after step C.

[1] Step A
(Manufacture of wiring board 2)
[1-A]
First, as shown in FIG. 4A, a laminate (for example, a copper-clad laminate) in which metal layers 222A and 223A are provided on both surfaces of an insulating layer 212A is prepared.

  Here, the insulating layer 212A is for forming the insulating layer 212 of the wiring board 2 described above. The metal layer 222A is for forming the conductive pattern 222 of the wiring board 2 described above. The metal layer 223A is for forming the conductor pattern 223 of the wiring board 2 described above.

[1-B]
Next, as shown in FIG. 4B, through holes (via holes, through holes) are formed in the laminated body including the insulating layer 212A and the metal layers 222A and 223A. Thereby, the insulating layer 212 is obtained. The method for forming the through hole is not particularly limited, but for example, it can be formed by irradiating a laser.

[1-C]
Next, as shown in FIG. 4C, conductor posts 232 are formed in predetermined through holes. Further, a heat transfer post 242 is formed in a predetermined through hole. The method for forming the conductor post 232 and the heat transfer post 242 is not particularly limited, and for example, a method of filling a conductive paste, a method of embedding by electroless plating, a method of embedding by electrolytic plating, or the like can be used. In particular, when the conductor post 232 and the heat transfer post 242 are each formed in a hollow shape, electrolytic plating is preferably used.

[1-D]
Next, as shown in FIG. 4D, the conductive layers 222 and 223 are formed by patterning the metal layers 222A and 223A, respectively. The patterning method is not particularly limited, but etching is preferably used.

  As described above, the insulating layer 212, the conductor patterns 222 and 223, the conductor post 232, and the heat transfer post 242 are formed.

[1-E]
Next, as shown in FIG. 4E, an insulating layer 211A and a metal layer 221A are provided on the conductor pattern 222 so as to be in contact with the insulating layer 211A side. Similarly, an insulating layer 213A and a metal layer 224A are provided on the conductor pattern 223 so as to be in contact with the insulating layer 213A side.

  Here, the insulating layer 211A is, for example, a prepreg for forming the insulating layer 211 of the wiring substrate 2 described above, and an uncured product (semi-cured product) of the resin composition of the insulating layer 211 described above. ) Is impregnated into the base material. Similarly, the insulating layer 213A is, for example, a prepreg for forming the insulating layer 213 of the wiring board 2 described above, and an uncured product (semi-cured material) of the resin composition of the insulating layer 213 described above. ) Is impregnated into the base material.

[1-F]
Next, as shown in FIG. 5A, the conductor layers 221 and 224 are formed by patterning the metal layers 221A and 224A, respectively. As the patterning method, the same method as in the above-described step [1-D] can be used. Next, a through hole (via hole) is formed in the multilayer body including the insulating layer 211A and the conductor pattern 221, and a through hole (via hole) is formed in the multilayer body including the insulating layer 213A and the conductor pattern 224.

[1-G]
Next, as shown in FIG. 5B, conductor posts 231 and 233 are formed in the through holes. The method for forming the conductor posts 231 and 233 is not particularly limited. For example, a method of filling a conductive paste, a method of embedding by electroless plating, a method of embedding by electrolytic plating, or the like can be used.

[1-H]
Next, a solder resist for the solder resist 25 is applied so as to cover the conductor pattern 221, and then the solder resist 25 is formed by patterning. Similarly, after applying a solder resist for the solder resist 26 so as to cover the conductor pattern 224, the solder resist 26 is formed by patterning. Thereafter, as shown in FIG. 5C, a through hole is formed in the laminate formed by laminating the solder resist 25 and the insulating layer 211, and the through hole is formed through the laminate obtained by laminating the solder resist 26 and the insulating layer 213. Create a hole.

[1-I]
Next, as shown in FIG. 5D, heat transfer posts 241 and 243 are formed in the through holes. A method for forming the heat transfer posts 241 and 243 is not particularly limited. For example, a method of filling a conductive paste, a method of embedding by electroless plating, a method of embedding by electrolytic plating, or the like can be used.
As described above, the wiring board 2 is obtained.

(Manufacture of the 1st reinforcement member 4)
[1′-A] First Step First, as shown in FIG. 6A, a plate-shaped main body 41A is prepared. The main body 41A is for forming the main body 41 of the first reinforcing member 4, and is made of, for example, a metal material.

Next, as shown in FIG. 6B, unnecessary portions of the main body 41A are removed to process the main body 41A into a desired shape. The method for removing unnecessary portions is not particularly limited, and etching methods such as dry etching and wet etching, laser treatment with laser irradiation, and punching treatment can be used. It is preferable to use an etching process. According to the wet etching process, it is possible to perform more accurate processing on the main body 41A.
Thereby, the main body 41 of the 1st reinforcement member 4 is obtained.

[1′-B] Second Step Next, as shown in FIG. 6C, an adhesive layer 42 </ b> A was provided on the upper surface (one surface) of the sheet-like support base material (release sheet) 91. A pair of sheet materials 9 is prepared. The support substrate 91 has light transmittance, and for example, a support film 91 made of PET or the like coated with a release agent such as a silicone resin can be used. The adhesive layer 42A is for forming the adhesive layer 42 of the first reinforcing member 4, and is composed of a negative photosensitive adhesive containing an inorganic filler as described above. The method for forming the adhesive layer 42A is not particularly limited. For example, the sheet-like photosensitive adhesive may be laminated on the upper surface of the support substrate 91, or the photosensitive adhesive may be screen printed or the like. You may apply | coat to the upper surface of the support base material 91. FIG.

  Next, as shown in FIG. 6 (d), a pair of sheet materials 9 are arranged to face each other via the main body 41 (the main body 41A processed into a desired shape) obtained in the first step, The sheet material 9 is bonded so that the adhesive layers 42A are bonded to each other. As a result, the opening of the main body 41 (the portion removed from the main body 41A) is filled with at least one adhesive layer 42A of the pair of adhesive layers 42A. In other words, the main body 41A is embedded in the adhesive layer 42A 'composed of the pair of adhesive layers 42A.

[1′-C] Third Step Next, as shown in FIG. 6E, the adhesive layer 42A ′ (each adhesive layer 42A) is formed from both sides of the adhesive layer 42A ′ via a mask M having a desired shape. Pattern exposure is performed, and further development is performed to remove unnecessary portions of the adhesive layer 42A ′. As a result, the adhesive layer 42A ′ is processed into a desired shape, and the adhesive layer 42 of the first reinforcing member 4 is obtained as shown in FIG. In this way, by performing patterning of the adhesive layer 42A ′ using photolithography, the adhesive layer 42A ′ can be processed into a desired shape more easily and accurately, and the adhesive layer 42 can be obtained.

In this step, unnecessary portions of the adhesive layer 42A ′ are removed while maintaining substantially the entire surface of the main body 41 (the portion excluding the outer peripheral surface) covered with the adhesive layer 42A ′. That is, the obtained adhesive layer 42 has a shape that covers almost the entire surface of the main body 41. Further, the step of removing the unnecessary portion of the adhesive layer 42 ′ by development may be performed in a state where at least one of the pair of support base materials 91 is peeled off. Thereby, an unnecessary part can be removed smoothly.
As described above, the first reinforcing member 4 supported by the support base 91 is obtained.

  According to the manufacturing method as described above, the first reinforcing member 4 can be easily manufactured. Further, as will be described later, since the bonding layer 42 can be easily bonded to the wiring substrate 2, the manufacture of the semiconductor package 1 is simplified. In addition, since the main body 41 is covered with the insulating adhesive layer 42, it is possible to reliably prevent a short circuit between each part of the wiring board 2 and the main body 41, and to manufacture a highly reliable semiconductor package. it can.

(Manufacture of the second reinforcing member 5)
Since the 2nd reinforcement member 5 can be manufactured similarly to the 1st reinforcement member 4, the description is abbreviate | omitted.

[2] Process B
First, the wiring board 2 manufactured in the process A and the first and second reinforcing members 4 and 5 from which one supporting base material 91 is peeled off are prepared. Next, the first reinforcing member 4 is attached to the upper surface of the wiring board 2 with the side on which the adhesive layer 42 is exposed facing the wiring board 2, and the second reinforcing member 5 is attached to the upper surface of the wiring board 2. The side of the wiring board 2 is affixed to the lower surface of the wiring board 2. Next, the other remaining support base 91 is peeled off from the first and second reinforcing members 4 and 5, and then the adhesive layers 42 and 52 are cured (fully cured). As a result, the first and second reinforcing members 4 and 5 are joined to the wiring board 2 as shown in FIG. The first and second reinforcing members 4 and 5 can be attached by, for example, vacuum pressing, laminating, or the like.

[3] Process C
[3-A]
Next, as shown in FIG. 7B, after applying an underfill material to the upper surface of the wiring substrate 2, the semiconductor element 3 is bonded via the metal bumps 31 by solder reflow. In this case, a resin having flux activity similar to that of the insulating material 81 described above is used as the underfill material. Further, after mounting the semiconductor element 3 and bonding the semiconductor element 3 to the wiring board 2 by reflow using a flux or solder paste, a normal capillary underfill material is placed between the wiring board 2 and the semiconductor element 3. It can also be filled and cured.

[3-B]
Next, as shown in FIG. 7C, after applying an insulating material 81A in the through hole of the second reinforcing member 5 (the lower surface of the wiring board 2), the metal ball (solder ball) 71A is reflowed by solder reflow. Solder joint. Thereby, the metal bump 71 and the insulating material 81 are formed. Such solder bonding is not particularly limited, but can be performed by placing each metal bump 71 in contact with the lower surface of the wiring board 2 and heating in that state, for example, 200 to 280 ° C. for 10 to 60 seconds. .

The insulating material 81 thus obtained is formed so as to surround the periphery of the metal bump 71 as described above. At this time, the insulating material 81 </ b> A functions as a flux at the time of solder bonding, and is cured in a shape that reinforces the periphery of the solder bonding portion in a ring shape by interfacial tension with the metal bump 71.
The semiconductor package 1 is obtained as described above.

(Semiconductor device)
Next, a semiconductor device will be described based on a preferred embodiment.

  FIG. 8 is a cross-sectional view schematically showing a semiconductor device including the semiconductor package shown in FIG.

  As shown in FIG. 8, the semiconductor device 100 includes a mother board (substrate) 200 and a semiconductor package 1 mounted on the mother board 200.

  In such a semiconductor device 100, the metal bumps 71 of the semiconductor package 1 are joined to terminals (not shown) of the mother board 200. As a result, the semiconductor package 1 and the mother board 200 are electrically connected, and electrical signals are transmitted between them. In addition, the heat of the semiconductor package 1 can be released to the mother board 200 through this joint.

  According to the semiconductor device 100 as described above, since the semiconductor package 1 having excellent heat dissipation and reliability as described above is provided, the reliability is excellent.

Second Embodiment
(Semiconductor package)
FIG. 9 is a cross-sectional view schematically showing the semiconductor package of the second embodiment. In the following, for convenience of explanation, the upper side in FIG. 9 is referred to as “upper” and the lower side is referred to as “lower”. Further, in FIG. 9, for convenience of explanation, each part of the semiconductor package is exaggerated.

  Hereinafter, the semiconductor package of the second embodiment will be described with a focus on differences from the above-described embodiments, and description of similar matters will be omitted.

  The semiconductor package of the second embodiment is substantially the same as the first embodiment described above, except that the first and second reinforcing members also serve as solder resists.

  As shown in FIG. 9, the wiring board 2 of the semiconductor package 1 has a configuration in which the solder resists 25 and 26 are omitted from the wiring board 2 of the first embodiment. The adhesive layer 42 of the first reinforcing member 4 is bonded to the upper surface of the insulating layer 211 included in the wiring board 2. In addition, the adhesive layer 52 of the second reinforcing member 5 is joined to the lower surface of the insulating layer 213. These adhesive layers 42 and 52 both have insulating properties and function as solder resists for protecting the wiring board 2.

  Note that the adhesive layer 42 is not formed on the upper surface of the wiring board 2 where it does not overlap the first reinforcing member 4, that is, inside the first reinforcing member 4 and in the region where the semiconductor element 3 is mounted. . However, an adhesive layer 32 is formed in such a region, and this adhesive layer 32 also serves as a solder resist.

  Similarly, the adhesive layer 42 is not formed in the lower surface of the wiring board 2 where it does not overlap with the second reinforcing member 5, that is, inside the second reinforcing member and in the region where the metal bumps 71 are joined. . However, an insulating material 81 is applied to such a region, and this insulating material 81 also serves as a solder resist.

  By adopting such a configuration, the number of parts can be reduced as compared with the first embodiment, so that the manufacturing cost and manufacturing process can be reduced, and the apparatus can be downsized (thinned).

  As mentioned above, although the manufacturing method of the reinforcement member of this invention was demonstrated about embodiment of illustration, this invention is not limited to this, Each part which comprises an adhesive body is arbitrary which can exhibit the same function. It can be replaced with that of the configuration. Moreover, arbitrary components may be added.

  In the above-described embodiment, the semiconductor package includes the first reinforcing member and the second reinforcing member, but either one of the first reinforcing member and the second reinforcing member may be omitted. .

  In the above-described embodiment, the heat transfer post is formed on the wiring board, but the heat transfer post may be omitted.

DESCRIPTION OF SYMBOLS 1 Semiconductor package 2 Wiring board 21 Board | substrate 211 Insulating layer 211A Insulating layer 212 Insulating layer 212A Insulating layer 213 Insulating layer 213A Insulating layer 221 Conductive pattern 221A Metal layer 222 Conductive pattern 222A Metal layer 223 Conductive pattern 223A Metal layer 224 Conductive pattern 224A Metal layer 231 Conductor post 232 Conductor post 233 Conductor post 24 Heat transfer post 241 Heat transfer post 242 Heat transfer post 243 Heat transfer post 25 Solder resist 26 Solid resist 3 Semiconductor element 31 Metal bump 32 Adhesive layer 33 Outer peripheral surface 4 First reinforcing member 41 Main body 41A Main body 411 Inner peripheral surface 42 Adhesive layer 42 'Adhesive layer 42A Adhesive layer 5 Second reinforcing member 51 Main body 511 Part 512 Part 513 Opening 52 Adhesive layer 71 Metal bump 71A Metal ball 81 Insulating material 81A Insulating material 9 Root material 91 Support base material 100 Semiconductor device 200 Motherboard M Mask

Claims (8)

A substrate, a first conductor pattern provided on one surface side of the substrate, and a second conductor pattern provided on the other surface side of the substrate and electrically connected to the first conductor pattern. A method of manufacturing a reinforcing member joined to at least one of the one surface and the other surface of a wiring board,
Preparing a plate-like main body having a smaller coefficient of thermal expansion than the substrate, and removing the unnecessary portion of the main body to process the main body into a desired shape; and
A pair of sheet materials having a sheet-like support base material and an adhesive layer provided on one surface side of the support base material and made of an adhesive are prepared, and the first sheet material is provided between the pair of sheet materials. A second step of bonding the adhesive layers of the pair of sheet materials together and burying the main body in the pair of adhesive layers, while positioning the main body processed into a desired shape in one step;
A third step of processing each adhesive layer into a desired shape by removing unnecessary portions of the adhesive layer of each sheet material,
In the third step, each adhesive layer is processed into a desired shape while maintaining the state where the main body is covered with the pair of adhesive layers,
The reinforcing member is configured by the main body and each of the adhesive layers.   The method for manufacturing a reinforcing member according to claim 1, wherein in the first step, the main body is processed into a desired shape by wet etching. The adhesive is a photosensitive adhesive,
3. The method for manufacturing a reinforcing member according to claim 1, wherein in the third step, each of the adhesive layers is exposed and developed to be processed into a desired shape.   The method for manufacturing a reinforcing member according to claim 3, wherein the adhesive is a negative photosensitive adhesive in which an exposed portion is hardly soluble.   The method for manufacturing a reinforcing member according to claim 1, wherein the adhesive includes a heat conductive material that transfers heat of the wiring board to the main body.   The said adhesive agent is a manufacturing method of the reinforcement member of Claim 5 comprised by the resin composition containing the resin material and the inorganic filler as the said heat conductive material.   The method for manufacturing a reinforcing member according to claim 1, wherein the adhesive layer has an insulating property.   The method of manufacturing a reinforcing member according to claim 1, wherein the main body is made of a metal material.

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