JP6033215B2 - Power module semiconductor device - Google Patents

Description

  The present invention relates to a power module semiconductor device, and more particularly to a power module semiconductor device having improved heat dissipation characteristics.

  Currently, many research institutions are conducting research and development of silicon carbide (SiC) devices. Characteristics of the SiC device include low on-resistance, high-speed switching, and high-temperature operation.

  Conventionally, in an Si device such as an insulated gate bipolar transistor (IGBT) used in the field of semiconductor power modules, the operable temperature range is up to about 150 ° C., so the conventional Sn-Ag system It was possible to drive even using low melting point solder such as.

  However, the SiC device can theoretically operate up to about 400 ° C. When the conventional low melting point solder is used, when the SiC device is driven at a high temperature, the joint portion by the low melting point solder is melted, and the gap between the electrodes is melted. Short-circuiting, peeling between the SiC device and the base plate, and the like have occurred, impairing the reliability of the SiC device.

  For this reason, the SiC device cannot be driven at a high temperature, and the characteristics of the SiC device cannot be fully utilized.

  A method for interconnecting SiC devices and a low thermal resistance package have already been disclosed (see, for example, Patent Document 1 and Patent Document 2). Patent Document 1 and Patent Document 2 disclose a method of forming a package that accommodates a SiC device, and the SiC device is bonded to another component or a conductive surface by using a TLP bonding technique. .

  An apparatus that cools a semiconductor element from the back surface via a cooler is also disclosed (for example, see Patent Document 3).

International Publication No. WO2006 / 074165 US Patent Application Publication No. US2006 / 0151871 JP 2010-245329 A

  An object of the present invention is to provide a power module semiconductor device having excellent heat dissipation characteristics.

According to one aspect of the present invention for achieving the above object, a first copper plate layer, a semiconductor device disposed on the first copper plate layer, and a thermally conductive insulation disposed on the semiconductor device. A first terminal electrode connected to the surface of the semiconductor device via a first opening opened in the thermally conductive insulating layer, and a second opening opened in the thermally conductive insulating layer. A second terminal electrode connected to the first copper plate layer, and a second copper plate layer disposed on the thermally conductive insulating layer , wherein the thermally conductive insulating layer and the second copper plate layer There is provided a power module semiconductor device having a stress relaxation structure for relaxing thermal stress in a part of the laminated structure, and radiating heat from both the back surface and the front surface of the semiconductor device.

According to another aspect of the present invention, a first copper plate layer, a semiconductor device disposed on the first copper plate layer, a thermally conductive insulating layer disposed on the semiconductor device, and the heat conduction A first terminal electrode connected to the surface of the semiconductor device through a first opening formed in the conductive insulating layer, and the first copper plate through a second opening formed in the thermally conductive insulating layer. A second terminal electrode connected to the layer, wherein the first copper plate layer is disposed on a first ceramic substrate having a second copper plate layer on a back surface, and the first copper plate layer is disposed on the first ceramic substrate. Two ceramic substrates, a third ceramic substrate disposed on the second ceramic substrate and between the thermally conductive insulating layers, and a fourth ceramic substrate disposed on the thermally conductive insulating layers, The first to fourth ceramic substrates are Are bonded by adhesive resin layer to each other in the lamination plane, the semiconductor device of the power module semiconductor device for performing the heat radiation from both the back and the surface is provided.

According to another aspect of the present invention, a first copper plate layer, a semiconductor device disposed on the first copper plate layer, a thermally conductive insulating layer disposed on the semiconductor device, and the heat conduction A first terminal electrode connected to the surface of the semiconductor device through a first opening formed in the conductive insulating layer, and the first copper plate through a second opening formed in the thermally conductive insulating layer. A second terminal electrode connected to the layer, wherein the thermally conductive insulating layer forms a deletion portion at a corner portion covering the semiconductor device, and radiates heat from both the back surface and the front surface of the semiconductor device. A power module semiconductor device is provided.

  ADVANTAGE OF THE INVENTION According to this invention, the power module semiconductor device excellent in the heat dissipation characteristic can be provided.

(A) The typical plane pattern block diagram of the power module semiconductor device which concerns on 1st Embodiment, (b) The typical cross-section figure along the II line | wire of Fig.1 (a). The typical disassembled assembly drawing of the power module semiconductor device which concerns on 1st Embodiment. The enlarged view of A part of FIG.1 (b). The typical cross-section figure of the power module semiconductor device which concerns on the modification 1 of 1st Embodiment. The typical cross-section figure of the power module semiconductor device which concerns on the modification 2 of 1st Embodiment. The typical cross-section figure of the power module semiconductor device which concerns on the modification 3 of 1st Embodiment. The typical cross-section figure of the power module semiconductor device which concerns on the modification 4 of 1st Embodiment. The typical plane pattern block diagram explaining the wiring connection of the power module part and gate drive part which mount the power module semiconductor device which concerns on 1st Embodiment. The typical plane pattern block diagram explaining the power module part which mounted the gate drive circuit in the vicinity of the power module semiconductor device which concerns on 1st Embodiment. The typical circuit block diagram of the three-phase inverter comprised using the power module semiconductor device which concerns on 1st Embodiment. It is an example of the semiconductor device applied to the power module semiconductor device which concerns on 1st Embodiment, Comprising: The typical cross-section figure of SiC * MOSFET. (A) The typical cross-section figure of the power module semiconductor device which concerns on 2nd Embodiment, (b) The typical cross-section figure of the DBC board | substrate applied to Fig.12 (a). The typical cross-section figure of the power module semiconductor device which concerns on the modification 1 of 2nd Embodiment. The typical plane pattern block diagram of the power module semiconductor device which concerns on the modification 2 of 2nd Embodiment. FIG. 15 is a schematic sectional view taken along line II-II in FIG. 14. The typical cross-section figure of the power module semiconductor device which concerns on the modification 3 of 2nd Embodiment. The typical plane pattern block diagram of the power module semiconductor device which concerns on 3rd Embodiment. FIG. 18 is a schematic cross-sectional structure diagram taken along line III-III in FIG. 17. The typical disassembled assembly drawing of the power module semiconductor device which concerns on 3rd Embodiment. The typical cross-section figure of the power module semiconductor device which concerns on the modification of 3rd Embodiment. It is an example which applied the power module semiconductor device which concerns on 3rd Embodiment to a three-phase inverter, Comprising: The typical plane pattern block diagram of a heat conductive insulating film. The typical plane pattern block diagram of the heat conductive insulating film of the semiconductor device vicinity of the power module semiconductor device which concerns on 3rd Embodiment. FIG. 24 is a schematic cross-sectional structure diagram taken along line IV-IV in FIG. 22. The typical plane pattern block diagram of the semiconductor device of the power module semiconductor device which concerns on 3rd Embodiment, and the heat conductive insulating film of the 2nd terminal electrode vicinity. FIG. 25 is a schematic sectional view taken along line VV in FIG. 24. The another typical plane pattern block diagram of the heat conductive insulating film of the semiconductor device vicinity of the power module semiconductor device which concerns on 3rd Embodiment. The typical cross-section figure of the power module semiconductor device which concerns on 4th Embodiment. The enlarged view of the stress relaxation structure part of FIG. In the power module semiconductor device which concerns on 4th Embodiment, the typical cross-section figure of the state to which the thermal stress was added. FIG. 10 is a schematic planar pattern configuration diagram illustrating an arrangement pattern of a stress relaxation structure, which is an example in which a power module semiconductor device according to a fourth embodiment is applied to a three-phase inverter. FIG. 31 is an enlarged view of the vicinity of the semiconductor device of FIG. 30. In FIG. 30, the typical plane pattern block diagram of the state to which the thermal stress was added. In the power module semiconductor device which concerns on 4th Embodiment, it is typical sectional structure of the stress relaxation structure part, Comprising: (a) Triangular structure example, (b) Rectangular structure example, (c) Trapezoid structure example, (d ) Semicircular structure example, (e) Another rectangular structure example, (f) Another semicircular structure example. The typical cross-section figure of the power module semiconductor device which concerns on 5th Embodiment. The typical cross-section figure of the power module semiconductor device which concerns on the modification 1 of 5th Embodiment. The typical plane pattern block diagram of the power module semiconductor device which concerns on the modification 2 of 5th Embodiment. FIG. 37 is a schematic sectional view taken along line VI-VI in FIG. 36. The typical plane pattern block diagram of the power module semiconductor device which concerns on the modification 3 of 5th Embodiment. The typical bird's-eye view structure figure of the columnar electrode structure part of the power module semiconductor device which concerns on a comparative example. The typical bird's-eye view structure figure of the power module semiconductor device which concerns on a comparative example. The typical bird's-eye view structure figure of the power module semiconductor device which concerns on 6th Embodiment. The typical bird's-eye view structure figure of the power module semiconductor device which concerns on the modification of 6th Embodiment. It is a typical plane pattern structure of the metal plate applied to the power module semiconductor device which concerns on 6th Embodiment and its modification, Comprising: (a) Example of rectangular slit, (b) Example of oval slit, (c ) Example of multiple circular patterns, (d) Example of another rectangular slit. It is a typical plane pattern structure of the slit edge part of the metal plate applied to the power module semiconductor device which concerns on 6th Embodiment, Comprising: (a) Rectangular structure example, (b) Wedge type structure example, (c) Acute angle Triangular structure example. FIG. 45A is a bird's-eye view structure of a heat spreader applied to a power module semiconductor device according to a seventh embodiment, in which (a) a structural example in which a high thermal conductivity metal layer is embedded in a portion on which a semiconductor device is mounted; ) A structural example in which a DBC substrate is arranged on top, (c) A structural example in which a high thermal conductivity metal layer is embedded in a portion on which a semiconductor device and terminal electrodes are mounted, (d) A high thermal conductivity metal layer in a portion on which a heat dissipation ceramic substrate is mounted. (E) An example of a structure in which a high thermal conductivity metal layer is embedded in a portion on which a semiconductor device is mounted and a portion far from a screw hole. The circuit diagram explaining the high frequency drive in the power module semiconductor device which concerns on 8th Embodiment. The circuit diagram explaining the high frequency drive which considered the reflected wave in the power module semiconductor device which concerns on 8th Embodiment. Explanatory drawing of the structural example which roughens the surface and back surface of metal wiring in the power module semiconductor device which concerns on 8th Embodiment.

  Next, embodiments of the present invention will be described with reference to the drawings. In the following description of the drawings, the same or similar parts are denoted by the same or similar reference numerals. However, it should be noted that the drawings are schematic, and the relationship between the thickness and the planar dimensions, the ratio of the thickness of each layer, and the like are different from the actual ones. Therefore, specific thicknesses and dimensions should be determined in consideration of the following description. Moreover, it is a matter of course that portions having different dimensional relationships and ratios are included between the drawings.

  Further, the embodiments described below exemplify apparatuses and methods for embodying the technical idea of the present invention, and the embodiments of the present invention include the material, shape, structure, The layout is not specified as follows. Various modifications can be made to the embodiment of the present invention within the scope of the claims.

[First embodiment]
Power module semiconductor device 1 according to the first embodiment, as shown in FIGS. 1 to 3, ₁ and the first copper plate layer 16, the semiconductor device 24 disposed on a first copper plate layer 16 ₁ A first ceramic substrate 18 ₁ disposed on the semiconductor device 24; a first terminal electrode 10 connected to the surface of the semiconductor device 24 through a first opening 2 opened in the first ceramic substrate 18 ₁ ; and a second terminal electrode 12 connected to the first copper plate layer 16 ₁ through the second opening 3 opened in the first ceramic substrate 18 _1. Here, the power module semiconductor device 1 according to the first embodiment can radiate heat from both the back surface and the front surface of the semiconductor device 24.

  As shown in FIGS. 1 to 3, for example, the first terminal electrode 10 is connected to the source contact CS / gate contact CG of the semiconductor device 24 through the first opening 2, and the second terminal electrode 12 is The drain contact CD of the semiconductor device 24 is connected through the second opening 3.

Further, in the power module semiconductor device 1 according to the first embodiment, the first copper plate layer 16 ₁ may be disposed on the second ceramic substrate ₁₈₂ on which a second copper plate layer 16 ₂ on the back surface good.

Further, as shown in FIG. 1, the power module semiconductor device 1 according to the first embodiment includes a third ceramic substrate 18 ₃ disposed on the second ceramic substrate 18 ₂ , and a third ceramic substrate 18 ₃ . , a fourth ceramic substrate 18 ₄ disposed between the ₁ and the first ceramic substrate 18, the fifth may include a ceramic substrate 18 ₅ disposed on the first ceramic substrate 18 ₁ on. Here, the first to fifth ceramic substrates 18 ₁ to 18 ₅ are bonded to each other with the adhesive resin layer 20 on the laminated surface. Here, for example, an epoxy resin or a silicone resin can be applied to the adhesive resin layer 20.

The power module semiconductor device 1 according to the first embodiment, as shown in FIG. 1, the first terminal electrode 10, a protective layer disposed on the second terminal electrode 12, and a fifth ceramic substrate 18 ₅ on 14 may be provided. Here, for example, PPS (polyphenyl sulfide) can be applied to the protective layer 14.

  The power module semiconductor device according to the first embodiment may include a copper alloy or copper molybdenum electrode layer 25 between the first copper plate layer 16 and the semiconductor device 24, as shown in FIG. The semiconductor device 24 and the first terminal electrode 10 / copper alloy or copper molybdenum electrode layer 25 are connected by a solder layer 24a, and the copper alloy or copper molybdenum electrode layer 25 and the first copper plate layer 16 are connected by a solder layer. 25a is connected. Thus, by arranging the copper alloy or copper molybdenum electrode layer 25 between the first copper plate layer 16 and the semiconductor device 24, the adhesion between the semiconductor device 24 and the first copper plate layer 16 is improved. The thermal conductivity can be improved. 25 may be an electrode layer made of copper alloy or molybdenum (Mo).

In the power module semiconductor device according to the first embodiment, the first to fifth ceramic substrates 18 ₁ to 18 ₅ are made of, for example, aluminum nitride (AlN), aluminum oxide (Al ₂ O ₃ ), or nitride It may be formed of any of silicon (SiN). By forming with such a material, thermal conductivity can be improved.

  In the power module semiconductor device according to the first embodiment, the semiconductor device 24 is configured to perform heat dissipation from both the front and back surfaces of the semiconductor device 24, so that the semiconductor device 24 can be operated at a higher power than when the heat is radiated only from the back surface. It becomes possible to lower the surface temperature by 10 ° C. or more.

  For example, a SiC MOSFET in which the semiconductor device 24 is formed of SiC also has a structure in which heat is radiated from both sides of the semiconductor device 24 because the electrical resistance increases at a high temperature operation of 200 ° C. or higher. The loss of 24 can be reduced.

In the power module semiconductor device according to the first embodiment, a high heat dissipation structure can be realized by attaching the _first to _fifth ceramic substrates 18 ₁ to 18 ₅ in layers.

  In the power module semiconductor device according to the first embodiment, the overall height of FIG. 1B can be reduced to about 3 mm, and can be reduced by about 60% compared to the conventional structure. It is.

  In the power module semiconductor device according to the first embodiment, it is possible to realize miniaturization and high heat dissipation by dissipating heat from both the front and back surfaces of the semiconductor device.

(Modification)
In the power module semiconductor device 1 according to the first to fourth modifications of the first embodiment, as shown in FIGS. 4 to 7, the first terminal electrode 10 and the second terminal electrode 12 are bent terminal electrode tips. The units 0a and 12a may be provided. By providing such bent terminal electrode tips 10a and 12a, it is possible to improve adhesion to a heat spreader described later, or to easily take out the electrodes from the first terminal electrode 10 and the second terminal electrode 12. it can. Such bent terminal electrode tip portions 0a and 12a can also be formed by etching the first terminal electrode 10 and the second terminal electrode 12.

  In the power module semiconductor device 1 according to the third modification of the first embodiment, as shown in FIG. 6, an example is shown in which the terminal electrode inner corner portions 10b and 12b have smooth curved surfaces by etching. Yes.

  On the other hand, in the power module semiconductor device 1 according to the modification 4 of the first embodiment, as shown in FIG. 7, an example in which the terminal electrode inner corner portions 10c and 12c have a curved surface that is over-etched by etching processing. It is shown. By adjusting the processing conditions such as the concentration, composition, time, and temperature of the etchant during etching of the first terminal electrode 10 and the second terminal electrode 12, as shown in FIGS. The shape of the terminal electrode tip portions 0a and 12a of the second terminal electrode 12 can be processed.

A schematic plane pattern configuration for explaining the wiring connection between the power module unit 52 and the gate drive unit 50 on which the power module semiconductor device according to the first embodiment is mounted is expressed as shown in FIG. In FIG. 8, power module semiconductor devices 60 _{1 to} 60 ₆ for three-phase AC inverters are arranged in the power module unit 52, and the power module semiconductor devices 60 _{1 to} 60 ₆ are connected to the gate drive unit 50. Are connected by gate drive wirings 10 ₁ to 10 ₆ , respectively.

Moreover, a schematic plane pattern configuration of the power module unit 80 equipped with the gate drive circuit 70 ₁ to 70 ₆ in the vicinity of the power module semiconductor device 60 ₁ to 60 ₆ according to the first embodiment, as shown in FIG. 9 It is expressed in In the example of FIG. 9, by placing the gate drive circuit 70 ₁ to 70 ₆ in the vicinity of the power module semiconductor device 60 ₁ to 60 _6, to reduce the signal delay of the gate drive signals, the power module for three-phase AC inverter High-frequency and high-efficiency operations of the semiconductor devices 60 _{1 to} 60 ₆ can be realized.

(Configuration of power module)
As shown in FIG. 10, the schematic circuit configuration of the three-phase inverter configured using the power module semiconductor device according to the first embodiment includes a gate drive unit 50 and a power module connected to the gate drive unit 50. Part 52 and a three-phase motor part 53. The power module unit 52 is connected to U, V, and W phase inverters corresponding to the U phase, V phase, and W phase of the three-phase motor unit 53.

  In the power module 52, the inverter-structured SiC MOSFETs Q1 and Q2, Q3 and Q4, and Q5 and Q6 are connected between the plus terminal (+) and the minus terminal (−) to which the capacitor C is connected. Furthermore, diodes D1 to D6 are connected in antiparallel between the sources and drains of the SiC MOSFETs Q1 to Q6, respectively.

  Since the power module semiconductor device according to the first embodiment and its modification includes a double-sided cooling structure, the three-phase inverter configured using such a power module semiconductor device is more than when radiating heat only from the back surface. The temperature of the surface of the semiconductor device 24 at the time of high power operation can be lowered by 10 ° C. or more, the loss at the time of high power operation can be reduced, and further, downsizing and high efficiency can be realized by thinning the layer. be able to.

As an example of the semiconductor device 24 applied to the power module semiconductor device according to the first embodiment, a schematic cross-sectional structure of an SiC • MOSFET includes an n ⁻ epitaxial growth layer 126 and an n ⁻ epitaxial growth layer as shown in FIG. P base region 128 formed on the surface side of 126, source region 130 formed on the surface of p base region 128, and gate insulating film disposed on the surface of n ⁻ epitaxial growth layer 126 between p base regions 128. 132, a gate electrode 138 disposed on the gate insulating film 132, a source electrode 134 connected to the source region 130, and an n ⁺ drain region disposed on the back surface opposite to the surface of the n ⁻ epitaxial growth layer 126 ( n ⁺ substrate) 124 and drain electrode 136 connected to n ⁺ drain region (n ⁺ substrate) 124. Prepare.

The drain electrode 136 is, for example, as shown in FIG. 3, the solder layer 24a, a copper alloy or a copper molybdenum electrode layer 25 via the solder layer 25a, and is connected to the first copper plate layer 16 _1.

  As an example of the semiconductor device applied to the power module semiconductor device according to the first embodiment, a GaNFET or the like can be applied instead of the SiC • MOSFET.

  Since the power module semiconductor device according to the first embodiment and its modification has a double-sided cooling structure, heat dissipation is facilitated, the heat spreader is lightened, the thermal runaway of the semiconductor device is suppressed, high frequency characteristics and power consumption efficiency As a result, power conversion efficiency can be increased.

[Second Embodiment]
As shown in FIG. 12A, a schematic cross-sectional structure of the power module semiconductor device 1 according to the second embodiment includes a semiconductor device 24 and a first DBC substrate (16a) disposed on the surface side of the semiconductor device 24. 18a, 16a), a second DBC substrate (16b, 18b, 16b) disposed on the back side of the semiconductor device 24, a first terminal electrode 10 connected to the first DBC substrate (16a, 18a, 16a), And a second terminal electrode 12 connected to the second DBC substrate (16b, 18b, 16b). Here, the power module semiconductor device 1 according to the second embodiment can radiate heat from both the back surface and the front surface of the semiconductor device 24.

  As shown in FIG. 12B, a schematic cross-sectional structure of the DBC substrate applied to FIG. 12A includes a ceramic substrate 18 and a copper (Cu) plate layer 16 disposed on the front and back surfaces of the ceramic substrate 18. With.

  In the power module semiconductor device 1 according to the second embodiment, the semiconductor device 24, the first DBC substrates (16a, 18a, 16a), the second DBC substrates (16b, 18b, 16b), and the first terminal electrodes 10 and the second terminal electrode 12 may be provided with a sealing resin layer 22. Here, for example, a polyimide resin, an epoxy resin, or a silicone resin can be applied to the sealing resin layer 22.

  In the power module semiconductor device 1 according to the second embodiment, it is possible to dissipate heat not only from the back surface but also from the front surface by bonding the DBC substrate to both the front and back sides of the semiconductor device 24.

  In the power module semiconductor device 1 according to the second embodiment, the surface of the semiconductor device 24 at the time of high power operation is more than that when the heat is radiated from only the back surface by adopting a structure that radiates heat from both sides of the semiconductor device 24. The temperature can be lowered by 10 ° C. or more.

  For example, a SiC MOSFET in which the semiconductor device 24 is formed of SiC also has a structure in which heat is radiated from both sides of the semiconductor device 24 because the electrical resistance increases at a high temperature operation of 200 ° C. or higher. The loss of 24 can be reduced.

  Moreover, in the power module semiconductor device according to the second embodiment, it is possible to realize miniaturization and high heat dissipation by dissipating heat from both the front and back surfaces of the semiconductor device.

(Modification)
As shown in FIG. 13, the schematic cross-sectional structure of the power module semiconductor device 1 according to the first modification of the second embodiment is such that the second terminal electrode 12 includes a bent terminal electrode tip 12 a. good. By providing such a bent terminal electrode distal end portion 12a, it is possible to improve adhesion with a heat spreader described later, or to easily take out the electrode from the second terminal electrode 12. Such a bent terminal electrode tip 12a can be formed by etching the second terminal electrode 12.

  Further, a schematic planar pattern configuration of the power module semiconductor device according to the second modification of the second embodiment is expressed as shown in FIG. 14, and a schematic cross-sectional structure along the line II-II in FIG. It is expressed as shown in FIG.

  As shown in FIGS. 14 and 15, the power module semiconductor device 1 according to the second modification of the second embodiment includes a columnar electrode 48 that connects between the semiconductor device 24 and the first DBC substrate (16a, 18a, 16a). May be further provided.

  As shown in FIGS. 14 and 15, the first terminal electrode 10 is connected to the copper (Cu) plate layer 16a of the first DBC substrate (16a, 18a, 16a) at the gate contact CG / source contact CS, The terminal electrode 12 is connected to the copper (Cu) plate layer 16b of the second DBC substrate (16b, 18b, 16b) at the drain contact CD.

  Also in the power module semiconductor device 1 according to the second modification of the second embodiment, as shown in FIG. 15, the semiconductor device 24, the first DBC substrate (16 a, 18 a, 16 a), and the second DBC substrate (16 b. 18b and 16b), the first terminal electrode 10, the second terminal electrode 12, and the sealing resin layer 22 for sealing the columnar electrode 48 may be provided.

  Further, as shown in FIG. 16, the schematic cross-sectional structure of the power module semiconductor device 1 according to the third modification of the second embodiment is similar to FIG. 13, and the tip of the terminal electrode in which the second terminal electrode 12 is bent. The part 12a may be provided.

  Since the power module semiconductor device according to the second embodiment and its modification has a double-sided cooling structure, heat dissipation is facilitated, the heat spreader is lightened, the thermal runaway of the semiconductor device is suppressed, high frequency characteristics and power consumption efficiency. As a result, power conversion efficiency can be increased.

[Third embodiment]
As shown in FIGS. 17 to 19, the power module semiconductor device 1 according to the third embodiment includes a first copper plate layer 16 and 16G and a semiconductor device disposed on the first copper plate layer 16 and 16G. 24, a thermally conductive insulating film 54 disposed on the semiconductor device 24, and a first terminal electrode 10 connected to the surface of the semiconductor device 24 through a first opening 2 opened in the thermally conductive insulating film 54. And the second terminal electrode 12 connected to the first copper plate layer 16 through the second opening 3 opened in the heat conductive insulating film 54. Here, the power module semiconductor device 1 according to the third embodiment can radiate heat from both the back surface and the front surface of the semiconductor device 24.

  In addition, as shown in FIGS. 17 and 19, the power module semiconductor device 1 according to the third embodiment includes the first copper plate layer through the third opening 4 opened in the heat conductive insulating film 54. A gate terminal electrode 8 connected to the 16G surface is provided. Here, the first copper plate layer 16G is connected to the gate electrode 138 of the semiconductor device 24 via the gate wiring electrode 8G.

  As shown in FIGS. 17 to 19, for example, the first terminal electrode 10 is connected to the source contact CS / gate contact CG of the semiconductor device 24 through the first opening 2, and the second terminal electrode 12 is Via the second opening 3, it is connected to the drain contact CD of the semiconductor device 24, and the gate terminal electrode 8 is connected via the third opening 4 to the gate contact CG on the surface of the copper plate layer 16 </ b> G.

  Further, as shown in FIGS. 18 and 19, the entire power module semiconductor device 1 according to the third embodiment is housed in a ceramic package outer wall 56 disposed on the ceramic substrate 18. Here, the ceramic package outer wall 56 disposed on the ceramic substrate 18 includes not only a side surface portion but also an upper surface portion as shown in FIG. The hollow portion may be filled with rare gas or nitrogen gas.

The power module semiconductor device 1 according to the third embodiment, as shown in FIGS. 17 to 19, first copper plate layer 16 _1, the ceramic substrate 18 having a second copper plate layer 16 ₂ on the back surface It may be arranged above.

The power module semiconductor device 1 according to the third embodiment, like FIG. 3, between the first copper plate layer 16 ₁ and the semiconductor device 24, comprise a copper alloy or a copper molybdenum electrode layer 25 Also good. Further, while the semiconductor device 24 and the first terminal electrode 10-copper alloy or a copper molybdenum electrode layer 25 is connected by the solder layer 24a, a copper alloy or a copper molybdenum electrode layer 25 first copper plate layer 16 ₁ between the solder They may be connected by the layer 25a. Thus, between the first copper plate layer 16 ₁ and the semiconductor device 24, by placing a copper alloy or a copper molybdenum electrode layer 25, the adhesion between the semiconductor device 24 and the first copper plate layer 16 ₁ The heat conductivity can be improved.

In the power module semiconductor device 1 according to the third embodiment, the ceramic substrate 18 is, for example, any one of aluminum nitride (AlN), aluminum oxide (Al ₂ O ₃ ), or silicon nitride (SiN). It may be formed. By forming with such a material, thermal conductivity can be improved.

  In the power module semiconductor device 1 according to the third embodiment, the first terminal electrode 10 and the second terminal electrode 12 are bent terminal electrodes as in FIGS. 4 to 7 or FIGS. 13 and 16. You may provide the front-end | tip part.

  In the power module semiconductor device 1 according to the third embodiment, for example, a polyimide film can be applied as the heat conductive insulating film 54.

  The polyimide film can be formed by thermocompression bonding. Moreover, the thickness of a polyimide film is about 50 micrometers, for example.

Electrical insulation performance, since it is sufficient only in a polyimide film, the thickness of the power module semiconductor device according to the third embodiment, the thickness of the first copper plate layer 16 ₁ of the Cu plate for substantially radiator Contributes to the main thickness. For this reason, the overall thickness of the power module semiconductor device according to the third embodiment can be formed relatively thin.

(Modification)
Power module semiconductor device 1 according to a modification of the third embodiment, as shown in FIG. 20, on the heat conductive insulating film 54 may be further provided with a second copper plate layer 16 _3. Here, the thickness of the second copper plate layer 16 ₃ is, for example, about 50 μm to 2 mm.

In the power module semiconductor device 1 according to the third embodiment, the thermally conductive insulating film formed on the surface of the semiconductor device 24, first the first copper plate layer 16 ₁ and the rear surface on the back surface of the semiconductor device 24 by forming the ceramic substrate 18 having a second copper plate layer 16 _2, it is possible to heat radiation from the surface as well as from the back.

  In the power module semiconductor device 1 according to the third embodiment and its modification, the semiconductor device 24 is configured to radiate heat from both sides of the semiconductor device 24, so that the semiconductor is operated at higher power than when radiated only from the back side. The temperature of the surface of the device 24 can be lowered by 10 ° C. or more.

  For example, a SiC MOSFET in which the semiconductor device 24 is formed of SiC also has a structure in which heat is radiated from both sides of the semiconductor device 24 because the electrical resistance increases at a high temperature operation of 200 ° C. or higher. The loss of 24 can be reduced.

  Further, in the power module semiconductor device 1 according to the third embodiment and the modification thereof, it is possible to realize miniaturization and high heat dissipation by dissipating heat from both the front and back surfaces of the semiconductor device.

  Since the power module semiconductor device according to the third embodiment and its modification has a double-sided cooling structure, heat dissipation is facilitated, the heat spreader is reduced in weight, the thermal runaway of the semiconductor device is suppressed, high frequency characteristics and power consumption efficiency As a result, power conversion efficiency can be increased.

―Example of coating with thermally conductive insulating film―
In an arrangement example in which the power module semiconductor device according to the third embodiment and its modification is applied to a three-phase inverter, a schematic planar pattern configuration of the heat conductive insulating film 54 is expressed as shown in FIG. . In Figure 21, semiconductor devices 24 ₁ - 24 ₄ constituting an inverter, 24 _2, 24 _5, 24 _3, 24 ₆ over with an opening 56a, the opening 58 is provided for the first copper plate layer 16 ₁ ing.

  A schematic planar pattern configuration of the heat conductive insulating film 54 in the vicinity of the semiconductor device 24 of the power module semiconductor device according to the third embodiment and the modification thereof is expressed as shown in FIG. A schematic cross-sectional structure along line IV is expressed as shown in FIG.

In the power module semiconductor device according to the third embodiment and the modification thereof, the thermally conductive insulating film 54 has a deletion portion 54a formed in a corner portion C covering the semiconductor device 24 as shown in FIG. May be. In this way, by forming the deleted portion 54a in the corner portion C covering the semiconductor device 24, the step coverage of the thermally conductive insulating film 54 covering the corner portion B of the semiconductor device 24 shown in FIG. 23 is improved. Can be. In the example shown in FIG. 23, the semiconductor device 24 and the first copper plate layer 16 ₁ between the example that is connected by a solder layer 24a is illustrated.

  In the power module semiconductor device according to the third embodiment, a schematic planar pattern configuration example of the thermally conductive insulating film 54 in the vicinity of the wiring portions of the semiconductor device 24 and the second terminal electrode 12 is shown in FIG. A schematic cross-sectional structure taken along line VV in FIG. 24 is expressed as shown in FIG. As shown in FIGS. 24 and 25, in the power module semiconductor device according to the third embodiment, a deletion portion 54a is formed in a corner portion covering the semiconductor device 24, and the semiconductor device 24 shown in FIG. The step coverage of the thermally conductive insulating film 54 covering the corners is improved.

  Further, as shown in FIGS. 24 and 25, the source contact CS on the surface of the semiconductor device 24 and the first terminal electrode 10 are connected through the first opening 2 opened in the heat conductive insulating film 54, The drain contact CD on the first copper plate layer 16 and the second terminal electrode 12 are connected through the second opening 3 opened in the heat conductive insulating film 54.

  Another schematic planar pattern configuration of the heat conductive insulating film 54 in the vicinity of the semiconductor device 24 of the power module semiconductor device according to the third embodiment and its modification is expressed as shown in FIG. The deletion unit 54b of FIG. 26 has a smaller area of the deletion unit 54b than the deletion unit 54a of FIG.

  In the power module semiconductor device according to the third embodiment and the modification thereof, the thermally conductive insulating film 54 is shown in FIG. 23 by forming a deletion portion 54b in a corner portion covering the semiconductor device 24. The step coverage of the heat conductive insulating film 54 covering the corner B of the semiconductor device 24 can be improved.

[Fourth embodiment]
As shown in FIG. 27, the power module semiconductor device 1 according to the fourth embodiment includes a first copper plate layer 16S and 16G, a semiconductor device 24 disposed on the first copper plate layer 16S, and a semiconductor device. A thermally conductive insulating film 64 disposed on the semiconductor device 24; a second copper plate layer 68S connected to the surface of the semiconductor device 24 through a first opening opened in the thermally conductive insulating film 64; And a second copper plate layer 68G connected to the first copper plate layer 16G through a second opening opened in the insulating film 64.

  In the power module semiconductor device 1 according to the fourth embodiment, as shown in FIG. 27, the first copper plate layers 16S and 16G are arranged on the ceramic substrate 18 having the third copper plate layer 16 on the back surface. May be. Here, the power module semiconductor device 1 according to the fourth embodiment can radiate heat from both the back surface and the front surface of the semiconductor device 24.

  The enlarged structure of the stress relaxation structure portion of FIG. 27 is expressed as shown in FIG. 28, and has a convex heat conductive insulating film 64 and copper laminated on the convex heat conductive insulating film 64. A plate layer 68. A gap 74 is provided between the ceramic substrate 18 and the convex heat conductive insulating film 64.

  As shown in FIG. 27, the power module semiconductor device 1 according to the fourth embodiment includes second copper plate layers 68S and 68G on a heat conductive insulating film 64.

  In addition, as shown in FIGS. 27 to 28, the power module semiconductor device 1 according to the fourth embodiment applies thermal stress to a part of the laminated structure of the heat conductive insulating film 64 and the second copper plate layer 68S. A stress relaxation structure 72 for relaxing is provided.

  In the power module semiconductor device 1 according to the fourth embodiment, a schematic cross-sectional structure in a state where thermal stress is applied is expressed as shown in FIG.

  In the power module semiconductor device 1 according to the fourth embodiment, the stress relaxation structure 72 is formed to be stretched by warping of the ceramic substrate 18 due to thermal stress, as shown in FIG.

A schematic planar pattern configuration for explaining an arrangement pattern, which is an arrangement example in which the power module semiconductor device according to the fourth embodiment is applied to a three-phase inverter, is expressed as shown in FIG. In FIG. 30, the stress relaxation structure 72 is disposed on the ceramic substrate 18 so as to surround the semiconductor devices 24 ₁ , 24 ₄ , 24 ₂ , 24 ₅ , 24 ₃ , 24 ₆ constituting the inverter. .

  Further, the enlargement of the vicinity of the semiconductor device 24 in FIG. 30 is expressed as shown in FIG. 31, and in FIG. 31, a schematic planar pattern configuration in a state where thermal stress is applied is expressed as shown in FIG.

  In the power module semiconductor device 1 according to the fourth embodiment, the stress relaxation structure 72 is stretched in a direction perpendicular to the stretched direction due to warping of the ceramic substrate 18 as shown in FIGS. 30 to 32. It may be arranged.

  In the power module semiconductor device according to the fourth embodiment, it is a schematic cross-sectional structure of the stress relaxation structure portion, and an example of a triangular structure is represented as shown in FIG. 33A, and an example of a rectangular structure is shown in FIG. (B), a trapezoidal structure example is represented as shown in FIG. 33 (c), a semicircular structure example is represented as shown in FIG. 33 (d), and another rectangular structure example. Is represented as shown in FIG. 33 (e), and another semicircular structure example is represented as shown in FIG. 33 (f).

  In the power module semiconductor device according to the fourth embodiment, as shown in FIGS. 33A to 33F, the stress relaxation structure 72 has a cross section in a direction in which the stress relaxation structure 72 is extended due to warpage of the ceramic substrate 18. , A pattern based on any one of a triangle, a rectangle, a semicircle, and a trapezoid may be provided.

  In the power module semiconductor device 1 according to the fourth embodiment, the heat conductive insulating film 64 and the second copper plate layer 68S are formed on the surface of the semiconductor device 24, and the heat conduction is performed on the surface of the ceramic substrate 18. The stress relaxation structure composed of the conductive insulating film 64 and the second copper plate layer 68S is formed, and the ceramic substrate 18 having the first copper plate layer 16S on the back surface of the semiconductor device 24 and the third copper plate layer 16 on the back surface is formed. Therefore, it is possible to dissipate heat not only from the back surface but also from the front surface.

  In the power module semiconductor device 1 according to the fourth embodiment, the surface of the semiconductor device 24 at the time of high power operation is more than that when the heat is radiated from only the back surface by adopting a structure that radiates heat from both sides of the semiconductor device 24. The temperature can be lowered by 10 ° C. or more.

  For example, a SiC MOSFET in which the semiconductor device 24 is formed of SiC also has a structure in which heat is radiated from both sides of the semiconductor device 24 because the electrical resistance increases at a high temperature operation of 200 ° C. or higher. The loss of 24 can be reduced.

  Further, in the power module semiconductor device according to the fourth embodiment, the stress relaxation structure can relieve the stress accompanying the warp of the ceramic substrate and suppress the occurrence of cracks.

  Further, in the power module semiconductor device according to the fourth embodiment, it is possible to realize miniaturization and high heat dissipation by dissipating heat from both the front and back surfaces of the semiconductor device 24.

  Further, in the power module semiconductor device according to the fourth embodiment, it is possible to realize miniaturization and high heat dissipation by dissipating heat from both the front and back surfaces of the semiconductor device.

  Since the power module semiconductor device according to the fourth embodiment has a double-sided cooling structure, heat dissipation is facilitated, the heat spreader is reduced in weight, the thermal runaway of the semiconductor device is suppressed, the high frequency characteristics and the power consumption efficiency are improved. As a result, power conversion efficiency can be increased.

[Fifth embodiment]
As shown in FIG. 34, the power module semiconductor device 1 according to the fifth embodiment includes a first copper plate layer 16 ₁ and a semiconductor device 24 disposed on the first copper plate layer 16 ₁ (16D). A first ceramic substrate 18 ₁ disposed on the semiconductor device 24; a first terminal electrode 10 connected to the surface of the semiconductor device 24 through a first opening opened in the first ceramic substrate 18 ₁ ; And a gate drive integrated circuit 76 which is disposed on the ceramic substrate 18 ₁ and drives the semiconductor device 24. Here, the power module semiconductor device 1 according to the fifth embodiment can radiate heat from both the back surface and the front surface of the semiconductor device 24.

Further, in the power module semiconductor device 1 according to the fifth embodiment, the first copper plate layer 16 ₁ may be disposed on the second ceramic substrate ₁₈₂ on which a second copper plate layer 16 ₂ on the back surface good. The first terminal electrode 10 is connected to a first copper plate layer 16 ₁ (16S) disposed on the second ceramic substrate 18 ₂ .

In addition, as shown in FIG. 34, the power module semiconductor device 1 according to the fifth embodiment includes a third ceramic substrate 18 ₃ disposed on the second ceramic substrate 18 ₂ and a third ceramic substrate 18 ₃ . , a fourth ceramic substrate 18 ₄ disposed between the first ceramic substrate 18 _1, a fifth ceramic substrate 18 ₅ disposed on the first ceramic substrate ₁₈₁ on the sealing on the gate driver integrated circuit 76 6 may be provided with a ceramic substrate 18 ₆ arranged through the resin layer 22.

  The semiconductor device 24 and the gate drive integrated circuit 76 are connected via the gate terminal electrode 8, and the gate drive integrated circuit 76 is connected to the gate terminal electrode 8I.

The power module semiconductor device 1 according to the fifth embodiment, as shown in FIG. 34, the first terminal electrode 10, the gate terminal electrode 8 is disposed on the sixth ceramic substrate 18 ₆ and the gate on the terminal electrode 8I and a seventh ceramic substrate 18 _7, it may be provided with a protective layer 14 disposed on the seventh ceramic substrate 18 _7. Here, for example, PPS (polyphenyl sulfide) can be applied to the protective layer 14. The first to seventh ceramic substrates 18 ₁ to 18 ₅ are bonded to each other with the adhesive resin layer 20 on the laminated surface. Here, for example, an epoxy resin or a silicone resin can be applied to the adhesive resin layer 20.

  According to the power module semiconductor device of the fifth embodiment, a ceramic substrate is formed in a layered manner on the semiconductor device 24, and the gate drive integrated circuit 76 is mounted therein, whereby the semiconductor device 24 and the gate are mounted. Since the drive integrated circuits 76 can be arranged close to each other, it is possible to suppress noise from being superimposed on the gate driving wiring.

  Further, according to the power module semiconductor device according to the fifth embodiment, the gate drive integrated circuit is also provided in the power module semiconductor device by incorporating the copper plate layer and the semiconductor device between the ceramic substrates stacked in layers. The power module semiconductor device can be miniaturized.

(Modification)
As shown in FIG. 35, the power module semiconductor device 1 according to the first modification of the fifth embodiment is formed on the first copper plate layer 16 ₁ (16D) and the first copper plate layer 16 ₁ (16D). A semiconductor device 24 arranged, a heat conductive insulating film 54 arranged on the semiconductor device 24, and a first terminal connected to the surface of the semiconductor device 24 through an opening formed in the heat conductive insulating film 54 The electrode 10 and a gate drive integrated circuit 76 disposed on the thermally conductive insulating film 54 are provided. Here, the power module semiconductor device 1 according to the first modification of the fifth embodiment can radiate heat from both the back surface and the front surface of the semiconductor device 24. The first terminal electrode 10 is connected to a first copper plate layer 16 ₁ (16S) disposed on the ceramic substrate 18 ₁ .

  The semiconductor device 24 and the gate drive integrated circuit 76 are connected via the gate terminal electrode 8, and the gate drive integrated circuit 76 is connected to the gate terminal electrode 8I.

  According to the power module semiconductor device according to the first modification of the fifth embodiment, the heat conductive insulating film is formed on the semiconductor device 24, and the gate drive integrated circuit 76 is mounted on the heat conductive insulating film. Thus, since the semiconductor device 24 and the gate drive integrated circuit 76 can be arranged close to each other, it is possible to suppress noise from being superimposed on the gate driving wiring.

  Moreover, according to the power module semiconductor device which concerns on the modification 1 of 5th Embodiment, a heat conductive insulating film is formed on the semiconductor device 24, and a gate drive is built in by incorporating a copper plate layer and a semiconductor device. The integrated circuit can also be incorporated in the power module semiconductor device, and the power module semiconductor device can be miniaturized.

  A schematic planar pattern configuration of the power module semiconductor device according to the second modification of the fifth embodiment is expressed as shown in FIG. 36, and a schematic cross-sectional structure taken along line VI-VI in FIG. It is expressed as shown in

  The power module semiconductor device according to the second modification of the fifth embodiment includes a first copper plate layer 16D and a semiconductor device 24 disposed on the first copper plate layer 16D, as shown in FIGS. A thermally conductive insulating film 54 disposed on the semiconductor device 24; a gate drive integrated circuit 76 disposed on the thermally conductive insulating film 54; and a first terminal electrode 10 (CS) connected to the surface of the semiconductor device 24. ) And a gate wiring electrode 8G, and a gate wiring electrode 82 for connecting the gate drive integrated circuit 76 and the gate wiring electrode 8G. Here, the power module semiconductor device 1 according to the second modification of the fifth embodiment can radiate heat from both the back surface and the front surface of the semiconductor device 24.

  According to the power module semiconductor device according to the second modification of the fifth embodiment, the gate drive integrated circuit is also powered by disposing the gate drive integrated circuit 76 on the semiconductor device 24 via the heat conductive insulating film. The module can be built in the module semiconductor device, and the power module semiconductor device can be downsized.

Further, in the power module semiconductor device according to the second modification of the fifth embodiment, the direction of the signal current _IGL flowing through the gate wiring electrode 82 is opposite to the direction of the current _IGT flowing through the semiconductor device 24. Therefore, the inductance component accompanying the gate wiring electrode 82 can be canceled out.

  A schematic planar pattern configuration of the power module semiconductor device according to the third modification of the fifth embodiment is expressed as shown in FIG. In the power module semiconductor device according to Modification 3 of the fifth embodiment, the gate wiring electrode 8G connected to the surface of the semiconductor device 24 and the gate wiring electrode connecting the gate drive integrated circuit 76 and the gate wiring electrode 8G. Although the pattern layout of 82 is different, other configurations are the same as those of the power module semiconductor device according to the third modification.

  Also in the power module semiconductor device according to the third modification of the fifth embodiment, the gate drive integrated circuit and the power module are arranged on the semiconductor device 24 through the heat conductive insulating film. The power module semiconductor device can be miniaturized because it can be built in the semiconductor device.

Also in the power module semiconductor device according to a third modification of the fifth embodiment, the direction of the signal current I _GL flowing through the gate wiring electrode 82, the direction of the current I _GT flowing semiconductor device 24 is reversed Therefore, the inductance component accompanying the gate wiring electrode 82 can be canceled out.

[Sixth embodiment]
A schematic bird's-eye view structure of the columnar electrode structure portion of the power module semiconductor device according to the comparative example includes a ceramic substrate 18, a semiconductor device 24 arranged on the ceramic substrate 18, and a semiconductor device 24, as shown in FIG. A columnar electrode 90 disposed and a metal plate 92 disposed on the columnar electrode 90 are provided.

Further, a schematic bird's-eye view structure of the power module semiconductor device according to the comparative example includes a heat spreader 100, a ceramic substrate 18 disposed on the heat spreader 100, and a semiconductor device disposed on the ceramic substrate 18, as shown in FIG. 24 ₁ , 24 ₂ , 24 ₃ , columnar electrodes 90 ₁ , 90 ₂ , 90 ₃ disposed on the semiconductor devices 24 ₁ , 24 ₂ , 24 ₃ , and columnar electrodes 90 ₁ , 90 ₂ , 90 ₃ The metal plate 92 is provided.

  The power module semiconductor device according to the comparative example uses the columnar electrode, so that the module performance is improved both electrically and thermally. However, as shown in FIG. 40, when the columnar electrode structure is used, the heat spreader 100 warp direction A + -A + / A--A- and the metal plate 92 warp direction C + -C + / C--C- Since they are orthogonal, the yield decreases.

As shown in FIG. 41, a schematic bird's-eye view structure of the power module semiconductor device 1 according to the sixth embodiment is disposed on the heat spreader 100, the ceramic substrate 18 disposed on the heat spreader 100, and the ceramic substrate 18. Semiconductor devices 24 ₁ , 24 ₂ , 24 ₃ , columnar electrodes 90 ₁ , 90 ₂ , 90 ₃ disposed on the semiconductor devices 24 ₁ , 24 ₂ , 24 ₃ , and columnar electrodes 90 ₁ , 90 ₂ , 90 ₃ And a metal plate 94 disposed thereon. Here, the metal plate 94 includes a slit structure as shown in FIG. Here, the power module semiconductor device 1 according to the sixth embodiment can radiate heat from both the back surface and the front surface of the semiconductor device 24.

The schematic bird's-eye view structure of the power module semiconductor device 1 according to the sixth embodiment is, as shown in FIG. 41, a metal plate having a warp direction A + −A + / A−−A− of the heat spreader 100 and a slit structure. Since the warp direction B + −B + / B−−B− of 94 is made parallel, the yield is improved. Further, by using the columnar electrodes 90 ₁ , 90 ₂ , 90 ₃ , module performance is improved both electrically and thermally.

  In the power module semiconductor device 1 according to the sixth embodiment, when a module having a structure in which a columnar electrode is erected on a semiconductor device is manufactured, the shape of the metal plate on the column is matched with the shape of the heat spreader. Therefore, mechanical stress can be suppressed and the occurrence of cracks in the metal joint can be suppressed.

  In the power module semiconductor device 1 according to the sixth embodiment, the warp of the metal material when the temperature of the module rises and falls generates stress in the metal joint portion. By aligning the shape of the upper metal plate 94 so as to match the warping direction, the stress can be reduced, the stress generated during cooling after metal bonding can be suppressed, and the assembly yield can be increased.

  The assembly yield when the warp directions of the heat spreader 100 and the metal plate 94 on the pillar are not matched is 5% out of 18 modules, which is about 28%. However, the assembly yield of the heat spreader 100 and the metal plate 94 on the pillar is about 28%. The assembly yield when the directions of warpage are matched is 18% out of 18 modules, which is 100%.

  Since the rectangular metal warps in the longitudinal direction when warping occurs, warping of the heat spreader and the metal plate on the pillar is made by making the longitudinal directions of the heat spreader 100 and the metal plate 94 on the pillar the same direction. Can be aligned.

(Modification)
As shown in FIG. 42, a schematic bird's-eye view structure of the power module semiconductor device 1 according to the modification of the sixth embodiment includes a DBC substrate (16, 18, 16) and a DBC substrate (16, 18, 16). A plurality of semiconductor devices 24 disposed above, a heat conductive insulating film 54 disposed on the plurality of semiconductor devices 24, and the semiconductor device 24 through openings formed in the heat conductive insulating film 54. A columnar electrode 90 disposed and a metal plate 94 having a slit structure disposed on the columnar electrode 90 are provided. Here, the power module semiconductor device 1 according to the modification of the sixth embodiment can radiate heat from both the back surface and the front surface of the semiconductor device 24.

  A schematic planar pattern configuration of the metal plate 94 applicable to the power module semiconductor device according to the sixth embodiment and its modification, and an example having a rectangular slit is shown in FIG. 43 (a). An example having an oval slit is represented as shown in FIG. 43 (b), an example having a plurality of circular patterns is represented as shown in FIG. 43 (c), and an example having another rectangular slit is , As shown in FIG. FIG. 44A shows a schematic planar pattern configuration of the slit end portion of the metal plate 94 applicable to the power module semiconductor device according to the sixth embodiment and its modification. An example of a wedge-shaped structure is represented as shown in FIG. 44 (b), and an example of an acute angle triangular structure is represented as shown in FIG. 44 (c).

  In the power module semiconductor device according to the sixth embodiment and its modification, the slit shape may be any one of a comb shape, a rectangle, and a circular dot array along the longitudinal direction of the heat spreader.

  Further, in the power module semiconductor device according to the sixth embodiment and the modification thereof, the slit shape has a comb shape or a rectangle along the longitudinal direction of the heat spreader, and the end portion of the slit shape has a curved shape, a rectangle or a triangle. You may have.

  In the power module semiconductor device according to the sixth embodiment and its modification, the heat radiation performance can be further improved by applying the columnar electrode and the metal plate.

  In the power module semiconductor device according to the sixth embodiment and the modification thereof, it is possible to realize miniaturization and high heat dissipation by dissipating heat from both the front and back surfaces of the semiconductor device.

  Since the power module semiconductor device according to the sixth embodiment and its modification has a double-sided cooling structure, heat dissipation is facilitated, the heat spreader is reduced in weight, the thermal runaway of the semiconductor device is suppressed, high-frequency characteristics, and power consumption efficiency As a result, power conversion efficiency can be increased.

[Seventh embodiment]
FIG. 45A shows a bird's eye view structure of a heat spreader applied to a power module semiconductor device according to the seventh embodiment, in which a high thermal conductivity metal layer is embedded in a portion where a semiconductor device is mounted. An example of a structure in which a DBC substrate is arranged on FIG. 45A is represented as shown in FIG.

  FIG. 45 (c) shows a bird's eye view structure of a heat spreader applied to the power module semiconductor device according to the seventh embodiment, in which a high thermal conductivity metal layer is embedded in a portion where a semiconductor device and terminal electrodes are mounted. An example of a structure in which a high thermal conductivity metal layer is embedded in a portion where a heat dissipation ceramic substrate is mounted is represented as shown in FIG.

  Further, a bird's eye view structure of a heat spreader applied to the power module semiconductor device according to the seventh embodiment, and a structure example in which a high thermal conductivity metal layer is embedded in a portion mounting a semiconductor device and a portion far from a screw hole is shown in FIG. 45 (e).

  In the power module semiconductor device 1 according to the seventh embodiment, the heat spreader 102 has a structure in which the high thermal conductivity metal layer 104 is embedded in the portion where the semiconductor device 24 is mounted, as shown in FIG. May be.

  In the power module semiconductor device 1 according to the seventh embodiment, a DBC substrate (18 / 16D) may be further provided on the heat spreader 102 as shown in FIG.

  In the power module semiconductor device 1 according to the seventh embodiment, as shown in FIG. 45C, the heat spreader 102 further includes a portion on which the first terminal electrode 10 and the second terminal electrode 12 are mounted. A structure in which the high thermal conductivity metal layer 105 is embedded may be provided.

  Further, in the power module semiconductor device 1 according to the seventh embodiment, the heat spreader 102 has a structure in which the high thermal conductivity metal layer 106 is embedded in the portion where the ceramic substrate 18 is mounted, as shown in FIG. You may have.

  Further, in the power module semiconductor device 1 according to the seventh embodiment, the heat spreader 102 has a high thermal conductivity in a portion where the semiconductor device 24 is mounted and a portion far from the screw hole 110 formed for fixing the heat spreader 102. A structure in which the metal layers 104 and 108 are embedded may be provided.

  In the power module semiconductor device 1 according to the seventh embodiment, the heat spreader 102 may be made of CuMo, and the high thermal conductivity metal layers 104, 105, 106, and 108 may be made of Cu.

  Under the semiconductor device, by using a Cu material as a heat spreader and a CuMo material around the Cu material, a heat spreader having low stress and high heat dissipation can be formed, and a heat spreader with high heat dissipation and less warpage can be formed. it can.

  In the power module semiconductor device 1 according to the seventh embodiment, the heat spreader 102 is formed under the semiconductor device 24 with high thermal conductivity copper, and the other heat spreader has a low linear thermal expansion coefficient such as CuMo. By forming with a high-strength metal, a module with low stress and high heat dissipation can be provided.

  In the power module semiconductor device 1 according to the seventh embodiment, by using a low thermal resistance material such as Cu under the semiconductor device 24 of the heat spreader 102, the temperature of the semiconductor device during high power operation is 10 ° C. or higher. Can be lowered. Further, by using a material having a low coefficient of linear thermal expansion such as CuMo, it is possible to reduce the stress of the metal joint portion under the semiconductor device by 10% or more.

[Eighth embodiment]
In the power module semiconductor device according to the eighth embodiment, as shown in FIG. 46, the circuit configuration for explaining the high-frequency drive includes a gate drive unit 50 and a gate drive signal V _G supplied from the gate drive unit 50. And a supplied semiconductor device Q.

In the power module semiconductor device according to the eighth embodiment, the circuit configuration for explaining the high frequency driving in consideration of the reflected wave Ir is supplied from the gate drive unit 50 and the gate drive unit 50 as shown in FIG. The semiconductor device Q is supplied with the gate drive signal V _G, and the wiring length L of the metal wiring from the gate drive unit 50 to the semiconductor device Q is an odd multiple of the half wavelength of the gate drive signal wavelength.

  The gate electrode of the semiconductor device Q is preferably made of a metal material.

In the power module semiconductor device according to the eighth embodiment, a semiconductor device Q when high-frequency driving, when the input from the gate drive unit 50 of the gate drive signal V _G to the semiconductor device Q, incident wave Ii to semiconductor devices Q When, as reflected wave Ir reflected from the semiconductor device Q is not Awa weaken, and the gate drive signal V wiring length of an odd multiple of the half wavelength of _G L.

  When the semiconductor device Q is operated at 10 kHz to 20 kHz, the operating frequency is sufficiently smaller than the frequency band corresponding to the switching time, so that there is no significant influence on characteristics. However, when the operating frequency exceeds, for example, 10 MHz, the switching time cannot be ignored and the influence of the reflected wave of the input signal comes out.

  When driving at a low frequency, the gate electrode of the semiconductor device Q does not have a significant effect on characteristics even if polysilicon having a sheet resistance value of about several hundred mΩ / □ to about several Ω / □ is used. In driving, it is necessary to form the gate electrode with a metal electrode in order to lower the input impedance to the gate, which makes it possible to increase the operating frequency to several MHz.

In the non-contact power supply and the DC-DC converter, the efficiency is increased by driving at a high frequency, or components to be used can be reduced in size. When high-frequency driving, when the input from the gate drive unit 50 of the gate drive signal V _G to the semiconductor device Q, the incident wave Ii to semiconductor devices Q, so that the reflected wave Ir does Awa weaken reflected from the semiconductor device Q Further, the wiring length L is an odd multiple of the half wavelength of the gate drive signal V _G. As described above, the gate drive signal input to the power module is configured such that the wiring length L from the gate drive unit 50 to the semiconductor device Q is set to an odd multiple of the half wavelength of the drive frequency. Cancellation can be eliminated.

  More specifically, the wiring length from the gate drive unit 50 to the gate oxide film of the semiconductor device Q is preferably an odd multiple of a half wavelength of the drive frequency.

  Here, the semiconductor device Q is one of Si, SiC, or a GaN-based semiconductor.

  In the power module semiconductor device according to the eighth embodiment, the gate drive signal input to the power module is controlled by the wiring length L from the gate drive unit 50 to the semiconductor device Q during the control of driving a plurality of chips in phase It is particularly effective to eliminate the cancellation of the incident wave and the reflected wave by setting the length to an odd multiple of the half wavelength.

  In the power module semiconductor device according to the eighth embodiment, the surface 96a of the metal wiring 96 on the wiring substrate 98 connected to the semiconductor device 24 arranged on the DBC substrate (16, 18, 16) by the bonding wire BW. A configuration example in which the back surface 96b is roughened is expressed as shown in FIG.

  In the power module semiconductor device according to the eighth embodiment, both the front surface 96a and the back surface 96b of the metal wiring 96 are roughened to improve the adhesion with peripheral materials, and at the front surface 96a and the back surface 96b of the metal wiring 96, Signal transmission speed can be adjusted and matched.

  As described above, according to the present invention, a power module semiconductor device having excellent heat dissipation characteristics can be provided.

[Other embodiments]
As described above, the present invention has been described by the embodiments and the modifications. However, it should be understood that the descriptions and drawings constituting a part of this disclosure are exemplary and limit the present invention. Absent. From this disclosure, various alternative embodiments, examples and operational techniques will be apparent to those skilled in the art.

  As described above, the present invention includes various embodiments not described herein.

  The semiconductor device of the present invention can be applied to power devices in general such as an electric vehicle, a hybrid vehicle, an industrial device, an inverter, a power semiconductor module mounted on a home appliance, and an intelligent power module.

DESCRIPTION OF SYMBOLS _1, 60, 60 1-60 ₆ ... Power module semiconductor device 2 ... 1st opening part 3 ... 2nd opening part 4 ... 3rd opening part 8G, 82, 96 ... Gate wiring electrode 8, 8I, 10, 10 _1- 10 ₆ , 12 ... terminal electrodes 10 ₁ to 10 ₆ ... gate drive wirings 10a, 12a ... terminal electrode tip portions 10b, 10c, 12b, 12c ... terminal electrode inner corner 14 ... protective layer (PPS)
15 ... DBC substrates 16, 16 ₁ , 16 ₂ , 16 ₃ , 16a, 16b, 16G, 16S, 16D, 68, 68S, 68G ... Copper (Cu) plate layers 18, 18 ₁ to 18 ₇ , 18a, 18b ... Ceramic Substrate 20 ... Adhesive resin layer 22 ... Sealing resin layers 24, 24 _{1 to} 24 ₆ ... Semiconductor devices 24a, 25a ... Solder layer 25 ... Copper alloy or copper molybdenum electrode layers 48, 90, 90 _{1 to} 90 ₃ ... Columnar electrodes 50 ... Gate drive part 52 ... Power module part 53 ... Three-phase motor parts 54, 64 ... Heat conductive insulating films 54a, 54b ... Delete part 56 ... Ceramic package outer walls 56a, 58 ... Opening parts 70 ₁ to 70 ₆ ... Gate drive circuit 72 ... Stress relaxation structure 74 ... Air gap 76 ... Gate drive integrated circuit 80 ... Semiconductor power module mounting substrate 92, 94 ... Metal plate 96 ... Metal Line 96a ...... surface 96b ... rear surface 98 ... wiring board 100, 102 ... heat spreader 104,105,106,108 ... high thermal conductivity metal layer 110 ... the screw holes 124 ... n ⁺ drain region (n ⁺ substrate)
126 ... n ^- epitaxial growth layer 128 ... base region 130 ... source / drain region 132 ... gate insulating film 134 ... source electrode 136 ... drain electrode 138 ... gate electrode CS ... source contact CG ... gate contact CD ... drain contact

Claims (23)

A first copper plate layer;
A semiconductor device disposed on the first copper plate layer;
A thermally conductive insulating layer disposed on the semiconductor device;
A first terminal electrode connected to the surface of the semiconductor device through a first opening formed in the thermally conductive insulating layer;
A second terminal electrode connected to the first copper plate layer through a second opening formed in the thermally conductive insulating layer;
A second copper plate layer disposed on the thermally conductive insulating layer;
A stress relaxation structure for relaxing thermal stress in a part of the laminated structure of the thermally conductive insulating layer and the second copper plate layer;
A power module semiconductor device, wherein heat is radiated from both a back surface and a front surface of the semiconductor device. A first copper plate layer;
A semiconductor device disposed on the first copper plate layer;
A thermally conductive insulating layer disposed on the semiconductor device;
A first terminal electrode connected to the surface of the semiconductor device through a first opening formed in the thermally conductive insulating layer;
A second terminal electrode connected to the first copper plate layer through a second opening opened in the thermally conductive insulating layer;
The first copper plate layer is disposed on a first ceramic substrate having a second copper plate layer on a back surface;
A second ceramic substrate disposed on the first ceramic substrate;
A third ceramic substrate disposed on the second ceramic substrate and between the thermally conductive insulating layers;
A fourth ceramic substrate disposed on the thermally conductive insulating layer, and the first to fourth ceramic substrates are bonded to each other on the laminated surface with an adhesive resin layer,
A power module semiconductor device, wherein heat is radiated from both a back surface and a front surface of the semiconductor device.   2. The power module semiconductor device according to claim 1, wherein an electrode layer made of either molybdenum-copper alloy or copper-molybdenum is provided between the first copper plate layer and the semiconductor device.   The power module semiconductor device according to claim 1, further comprising a columnar electrode disposed on the semiconductor device. A heat spreader on which the power module semiconductor device is mounted;
The power module semiconductor device according to claim 4, further comprising: a metal plate disposed on the columnar electrode, wherein the warp directions of the metal plate and the heat spreader are matched.   The power module semiconductor device according to claim 5, further comprising a DBC substrate on the heat spreader.   The power module semiconductor device according to claim 6, wherein the gate electrode of the semiconductor device is formed of a metal material.   The power module semiconductor device according to claim 1, wherein the first copper plate layer is disposed on a ceramic substrate having a second copper plate layer on a back surface.   The power module semiconductor device according to claim 1, further comprising a copper alloy or a copper molybdenum electrode layer between the first copper plate layer and the semiconductor device. A first copper plate layer;
A semiconductor device disposed on the first copper plate layer;
A thermally conductive insulating layer disposed on the semiconductor device;
A first terminal electrode connected to the surface of the semiconductor device through a first opening formed in the thermally conductive insulating layer;
A second terminal electrode connected to the first copper plate layer through a second opening opened in the thermally conductive insulating layer;
The thermally conductive insulating layer forms a deletion portion at a corner portion covering the semiconductor device,
A power module semiconductor device, wherein heat is radiated from both a back surface and a front surface of the semiconductor device.   The power module semiconductor device according to claim 1, wherein the stress relaxation structure is disposed so as to surround a periphery of the semiconductor device.   9. The power module semiconductor device according to claim 8, wherein the stress relaxation structure is arranged to extend in a direction perpendicular to a direction in which the stress relaxation structure is warped by the warp of the ceramic substrate.   9. The stress relaxation structure according to claim 8, wherein a cross section in a direction extended by warping of the ceramic substrate has a pattern based on any one of a triangle, a rectangle, a semicircle, and a trapezoid. Power module semiconductor device. A heat spreader on which the power module semiconductor device is mounted;
The first terminal electrode includes a columnar electrode disposed on the semiconductor device, and a metal plate disposed on the columnar electrode,
The power module semiconductor device according to any one of claims 1 to 3, wherein directions of warpage of the metal plate and the heat spreader are matched.   The power module semiconductor device according to claim 5, wherein the metal plate has a slit shape along a longitudinal direction of the heat spreader.   The power module semiconductor device according to claim 15, wherein the slit shape is any one of a comb shape, a rectangular shape, and a circular dot arrangement along a longitudinal direction of the heat spreader.   The power module semiconductor device according to claim 15, wherein the slit shape includes a comb shape or a rectangle along a longitudinal direction of the heat spreader, and an end portion of the slit shape has a curved shape, a rectangle, or a triangle. .   The power module semiconductor device according to claim 5 or 14, wherein the heat spreader includes a structure in which a metal having high thermal conductivity is embedded in a portion where the semiconductor device is mounted. The heat spreader further has a structure in which a metal having a high thermal conductivity is embedded in either or both of a portion where the first terminal electrode and the second terminal electrode are mounted and a portion where the heat conductive insulating layer is mounted. The power module semiconductor device according to claim 5 , wherein the power module semiconductor device is provided.   15. The heat spreader includes a structure in which a metal having a high thermal conductivity is embedded in a portion on which the semiconductor device is mounted and a portion far from a screw hole formed to fix the heat spreader. The power module semiconductor device described.   21. The power module semiconductor device according to claim 18, wherein the heat spreader is made of CuMo, and the high thermal conductivity metal is made of Cu.   The power module semiconductor device according to any one of claims 1 to 8, further comprising a gate drive integrated circuit for driving the semiconductor device on the thermally conductive insulating layer. A gate drive circuit for driving the semiconductor device;
The wiring length of the metal wiring from the gate drive circuit to the semiconductor device is an odd multiple of a half wavelength of the gate drive signal wavelength,
The gate electrode of the semiconductor device is formed of a metal material,
The surface roughness and the back surface of the metal wiring are roughened, and the signal transmission speed is matched between the surface and the back surface of the metal wiring. Power module semiconductor device.

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