JP6030905B2 - 発光半導体を相互接続するためのオーバーレイ回路構造 - Google Patents
発光半導体を相互接続するためのオーバーレイ回路構造 Download PDFInfo
- Publication number
- JP6030905B2 JP6030905B2 JP2012215555A JP2012215555A JP6030905B2 JP 6030905 B2 JP6030905 B2 JP 6030905B2 JP 2012215555 A JP2012215555 A JP 2012215555A JP 2012215555 A JP2012215555 A JP 2012215555A JP 6030905 B2 JP6030905 B2 JP 6030905B2
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- JP
- Japan
- Prior art keywords
- les
- chip
- flexible
- interconnect structure
- heat sink
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L24/19—Manufacturing methods of high density interconnect preforms
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/04105—Bonding areas formed on an encapsulation of the semiconductor or solid-state body, e.g. bonding areas on chip-scale packages
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L2224/19—Manufacturing methods of high density interconnect preforms
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L2224/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
- H01L2224/24—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
- H01L2224/241—Disposition
- H01L2224/24135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/24137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1204—Optical Diode
- H01L2924/12041—LED
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
- Led Device Packages (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2012215555A JP6030905B2 (ja) | 2012-09-28 | 2012-09-28 | 発光半導体を相互接続するためのオーバーレイ回路構造 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2012215555A JP6030905B2 (ja) | 2012-09-28 | 2012-09-28 | 発光半導体を相互接続するためのオーバーレイ回路構造 |
Related Child Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2016151633A Division JP6541629B2 (ja) | 2016-08-02 | 2016-08-02 | 発光半導体を相互接続するためのオーバーレイ回路構造 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2014072271A JP2014072271A (ja) | 2014-04-21 |
| JP2014072271A5 JP2014072271A5 (enExample) | 2015-11-05 |
| JP6030905B2 true JP6030905B2 (ja) | 2016-11-24 |
Family
ID=50747248
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2012215555A Active JP6030905B2 (ja) | 2012-09-28 | 2012-09-28 | 発光半導体を相互接続するためのオーバーレイ回路構造 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP6030905B2 (enExample) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9526829B2 (en) | 2001-10-18 | 2016-12-27 | Bayer Healthcare Llc | Flow based pressure isolation and fluid delivery system including flow based pressure isolation and flow initiating mechanism |
| US9782576B2 (en) | 2004-10-22 | 2017-10-10 | Carefusion 303, Inc. | Fluid control device with valve and methods of use |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE19922176C2 (de) * | 1999-05-12 | 2001-11-15 | Osram Opto Semiconductors Gmbh | Oberflächenmontierte LED-Mehrfachanordnung und deren Verwendung in einer Beleuchtungseinrichtung |
| KR100880812B1 (ko) * | 2004-03-29 | 2009-01-30 | 아티큘레이티드 테크놀러지스 엘엘씨 | 롤-투-롤 제조된 광 시트 및 캡슐화된 반도체 회로디바이스들 |
| JP5162979B2 (ja) * | 2007-06-28 | 2013-03-13 | 日亜化学工業株式会社 | 発光装置 |
-
2012
- 2012-09-28 JP JP2012215555A patent/JP6030905B2/ja active Active
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9526829B2 (en) | 2001-10-18 | 2016-12-27 | Bayer Healthcare Llc | Flow based pressure isolation and fluid delivery system including flow based pressure isolation and flow initiating mechanism |
| US9782576B2 (en) | 2004-10-22 | 2017-10-10 | Carefusion 303, Inc. | Fluid control device with valve and methods of use |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2014072271A (ja) | 2014-04-21 |
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