JP5827342B2 - 中央コンタクトを備え、グラウンド又は電源分配が改善された改良版積層型マイクロ電子アセンブリ - Google Patents

中央コンタクトを備え、グラウンド又は電源分配が改善された改良版積層型マイクロ電子アセンブリ Download PDF

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JP5827342B2
JP5827342B2 JP2013544471A JP2013544471A JP5827342B2 JP 5827342 B2 JP5827342 B2 JP 5827342B2 JP 2013544471 A JP2013544471 A JP 2013544471A JP 2013544471 A JP2013544471 A JP 2013544471A JP 5827342 B2 JP5827342 B2 JP 5827342B2
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microelectronic
opening
plane
assembly
conductive
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JP2013546199A (ja
JP2013546199A5 (enExample
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ハーバ,ベルガセム
ゾーニ,ワエル
クリスプ,リチャード・デューイット
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テッセラ,インコーポレイテッド
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    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/11Printed elements for providing electric connections to or between printed circuits
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/11Printed elements for providing electric connections to or between printed circuits
    • H05K1/115Via connections; Lands around holes or via connections
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/18Printed circuits structurally associated with non-printed electric components
    • H05K1/181Printed circuits structurally associated with non-printed electric components associated with surface mounted components
    • H10W70/68
    • H10W72/00
    • H10W90/00
    • H10W90/701
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10431Details of mounted components
    • H05K2201/10507Involving several components
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621Components characterised by their electrical contacts
    • H05K2201/10628Leaded surface mounted device
    • H10W70/681
    • H10W72/30
    • H10W72/534
    • H10W72/536
    • H10W72/5363
    • H10W72/5366
    • H10W72/5434
    • H10W72/5445
    • H10W72/547
    • H10W72/5475
    • H10W72/5522
    • H10W72/59
    • H10W72/865
    • H10W72/9445
    • H10W74/00
    • H10W74/117
    • H10W90/231
    • H10W90/24
    • H10W90/732
    • H10W90/734
    • H10W90/754

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
JP2013544471A 2010-12-17 2011-10-21 中央コンタクトを備え、グラウンド又は電源分配が改善された改良版積層型マイクロ電子アセンブリ Expired - Fee Related JP5827342B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
KR10-2010-0129888 2010-12-17
KR1020100129888A KR101061531B1 (ko) 2010-12-17 2010-12-17 중앙 콘택을 구비하며 접지 또는 배전을 개선한 적층형 마이크로전자 조립체
PCT/US2011/057294 WO2012082227A2 (en) 2010-12-17 2011-10-21 Enhanced stacked microelectronic assemblies with central contacts and improved ground or power distribution

Publications (3)

Publication Number Publication Date
JP2013546199A JP2013546199A (ja) 2013-12-26
JP2013546199A5 JP2013546199A5 (enExample) 2014-12-04
JP5827342B2 true JP5827342B2 (ja) 2015-12-02

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JP2013544471A Expired - Fee Related JP5827342B2 (ja) 2010-12-17 2011-10-21 中央コンタクトを備え、グラウンド又は電源分配が改善された改良版積層型マイクロ電子アセンブリ

Country Status (7)

Country Link
US (3) US8885356B2 (enExample)
JP (1) JP5827342B2 (enExample)
KR (1) KR101061531B1 (enExample)
CN (1) CN103384913A (enExample)
BR (1) BR112013015117A2 (enExample)
TW (1) TWI528522B (enExample)
WO (1) WO2012082227A2 (enExample)

Families Citing this family (34)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8553420B2 (en) 2010-10-19 2013-10-08 Tessera, Inc. Enhanced stacked microelectronic assemblies with central contacts and improved thermal characteristics
KR101061531B1 (ko) 2010-12-17 2011-09-01 테세라 리써치 엘엘씨 중앙 콘택을 구비하며 접지 또는 배전을 개선한 적층형 마이크로전자 조립체
US8633576B2 (en) 2011-04-21 2014-01-21 Tessera, Inc. Stacked chip-on-board module with edge connector
US8304881B1 (en) 2011-04-21 2012-11-06 Tessera, Inc. Flip-chip, face-up and face-down wirebond combination package
US8970028B2 (en) * 2011-12-29 2015-03-03 Invensas Corporation Embedded heat spreader for package with multiple microelectronic elements and face-down connection
US8952516B2 (en) 2011-04-21 2015-02-10 Tessera, Inc. Multiple die stacking for two or more die
US8928153B2 (en) 2011-04-21 2015-01-06 Tessera, Inc. Flip-chip, face-up and face-down centerbond memory wirebond assemblies
US9013033B2 (en) 2011-04-21 2015-04-21 Tessera, Inc. Multiple die face-down stacking for two or more die
US8823165B2 (en) 2011-07-12 2014-09-02 Invensas Corporation Memory module in a package
US8659140B2 (en) 2011-10-03 2014-02-25 Invensas Corporation Stub minimization using duplicate sets of signal terminals in assemblies without wirebonds to package substrate
US8659141B2 (en) 2011-10-03 2014-02-25 Invensas Corporation Stub minimization using duplicate sets of terminals for wirebond assemblies without windows
EP2769409A1 (en) 2011-10-03 2014-08-27 Invensas Corporation Stub minimization for multi-die wirebond assemblies with orthogonal windows
US8659143B2 (en) 2011-10-03 2014-02-25 Invensas Corporation Stub minimization for wirebond assemblies without windows
KR101894823B1 (ko) 2011-10-03 2018-09-04 인벤사스 코포레이션 평행한 윈도우를 갖는 다중-다이 와이어 본드 어셈블리를 위한 스터브 최소화
US8525327B2 (en) 2011-10-03 2013-09-03 Invensas Corporation Stub minimization for assemblies without wirebonds to package substrate
KR20150040998A (ko) * 2012-08-02 2015-04-15 테세라, 인코포레이티드 두 개 이상의 다이에 대한 다중 다이 페이스-다운 적층
US9368477B2 (en) * 2012-08-27 2016-06-14 Invensas Corporation Co-support circuit panel and microelectronic packages
US9165906B2 (en) * 2012-12-10 2015-10-20 Invensas Corporation High performance package on package
US8946901B2 (en) * 2013-01-22 2015-02-03 Invensas Corporation Microelectronic package and method of manufacture thereof
KR20140130921A (ko) * 2013-05-02 2014-11-12 삼성전자주식회사 반도체 패키지 및 그 제조 방법
US9070423B2 (en) 2013-06-11 2015-06-30 Invensas Corporation Single package dual channel memory with co-support
US8975735B2 (en) * 2013-08-08 2015-03-10 Infineon Technologies Ag Redistribution board, electronic component and module
JP2015065553A (ja) * 2013-09-25 2015-04-09 株式会社東芝 接続部材、半導体デバイスおよび積層構造体
US9397071B2 (en) * 2013-12-11 2016-07-19 Intel Corporation High density interconnection of microelectronic devices
CN103974545B (zh) * 2014-05-20 2017-04-12 浪潮(北京)电子信息产业有限公司 一种设置过孔的方法和装置
KR20160006330A (ko) * 2014-07-08 2016-01-19 삼성전자주식회사 반도체 패키지
US9281296B2 (en) 2014-07-31 2016-03-08 Invensas Corporation Die stacking techniques in BGA memory package for small footprint CPU and memory motherboard design
US9691437B2 (en) 2014-09-25 2017-06-27 Invensas Corporation Compact microelectronic assembly having reduced spacing between controller and memory packages
KR101759544B1 (ko) * 2015-06-02 2017-07-19 가부시키가이샤 노다스크린 반도체 기억 장치
US9484080B1 (en) 2015-11-09 2016-11-01 Invensas Corporation High-bandwidth memory application with controlled impedance loading
US9812424B2 (en) * 2015-12-18 2017-11-07 Semiconductor Components Industries, Llc Process of forming an electronic device including a ball bond
US9679613B1 (en) 2016-05-06 2017-06-13 Invensas Corporation TFD I/O partition for high-speed, high-density applications
US11217535B2 (en) * 2017-12-29 2022-01-04 Intel Corporation Microelectronic assemblies with communication networks
CN114900953B (zh) * 2022-04-19 2024-10-11 微智医疗器械有限公司 多个电子元件与电路板的连接方法、组件及电子设备

Family Cites Families (48)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02174255A (ja) 1988-12-27 1990-07-05 Mitsubishi Electric Corp 半導体集積回路装置
US5148265A (en) 1990-09-24 1992-09-15 Ist Associates, Inc. Semiconductor chip assemblies with fan-in leads
US5148266A (en) 1990-09-24 1992-09-15 Ist Associates, Inc. Semiconductor chip assemblies having interposer and flexible lead
US5679977A (en) 1990-09-24 1997-10-21 Tessera, Inc. Semiconductor chip assemblies, methods of making same and components for same
KR100321883B1 (ko) * 1993-11-12 2002-06-20 구사마 사부로 반도체소자의실장구조및실장방법과,액정표시장치
JP3487524B2 (ja) * 1994-12-20 2004-01-19 株式会社ルネサステクノロジ 半導体装置及びその製造方法
US5719748A (en) 1995-06-28 1998-02-17 Honeywell Inc. Semiconductor package with a bridge for chip area connection
JPH1174449A (ja) * 1997-06-23 1999-03-16 T I F:Kk メモリモジュール
US6414391B1 (en) * 1998-06-30 2002-07-02 Micron Technology, Inc. Module assembly for stacked BGA packages with a common bus bar in the assembly
TW409377B (en) 1999-05-21 2000-10-21 Siliconware Precision Industries Co Ltd Small scale ball grid array package
US6414396B1 (en) * 2000-01-24 2002-07-02 Amkor Technology, Inc. Package for stacked integrated circuits
JP2001223324A (ja) * 2000-02-10 2001-08-17 Mitsubishi Electric Corp 半導体装置
TW447059B (en) * 2000-04-28 2001-07-21 Siliconware Precision Industries Co Ltd Multi-chip module integrated circuit package
JP2002033441A (ja) * 2000-07-14 2002-01-31 Mitsubishi Electric Corp 半導体装置
JP2002076252A (ja) 2000-08-31 2002-03-15 Nec Kyushu Ltd 半導体装置
WO2002079758A1 (en) 2001-03-29 2002-10-10 Circadiant Systems, Inc. Error function analysis of optical components with uncertainty ranges
SG106054A1 (en) 2001-04-17 2004-09-30 Micron Technology Inc Method and apparatus for package reduction in stacked chip and board assemblies
US6856007B2 (en) * 2001-08-28 2005-02-15 Tessera, Inc. High-frequency chip packages
TW523887B (en) 2001-11-15 2003-03-11 Siliconware Precision Industries Co Ltd Semiconductor packaged device and its manufacturing method
SG121705A1 (en) * 2002-02-21 2006-05-26 United Test & Assembly Ct Ltd Semiconductor package
US20030194240A1 (en) 2002-04-10 2003-10-16 Mollenauer Linn Frederick Jitter compensation method and apparatus
JP2004063767A (ja) 2002-07-29 2004-02-26 Renesas Technology Corp 半導体装置
TW557556B (en) 2002-09-10 2003-10-11 Siliconware Precision Industries Co Ltd Window-type multi-chip semiconductor package
SG148877A1 (en) 2003-07-22 2009-01-29 Micron Technology Inc Semiconductor substrates including input/output redistribution using wire bonds and anisotropically conductive film, methods of fabrication and assemblies including same
DE10339770B4 (de) * 2003-08-27 2007-08-30 Infineon Technologies Ag Verfahren zum Herstellen einer FBGA-Anordnung
JP3880572B2 (ja) * 2003-10-31 2007-02-14 沖電気工業株式会社 半導体チップ及び半導体装置
US7061121B2 (en) 2003-11-12 2006-06-13 Tessera, Inc. Stacked microelectronic assemblies with central contacts
KR100688501B1 (ko) 2004-09-10 2007-03-02 삼성전자주식회사 미러링 구조를 갖는 스택 boc 패키지 및 이를 장착한양면 실장형 메모리 모듈
US20060138650A1 (en) * 2004-12-28 2006-06-29 Freescale Semiconductor, Inc. Integrated circuit packaging device and method for matching impedance
JP2006211309A (ja) 2005-01-28 2006-08-10 Nippon Telegr & Teleph Corp <Ntt> 光リミッタアンプ
TWI269420B (en) 2005-05-03 2006-12-21 Megica Corp Stacked chip package and process thereof
KR101070913B1 (ko) * 2005-05-19 2011-10-06 삼성테크윈 주식회사 반도체 칩 적층 패키지
SG130061A1 (en) * 2005-08-24 2007-03-20 Micron Technology Inc Microelectronic devices and microelectronic support devices, and associated assemblies and methods
KR100690247B1 (ko) 2006-01-16 2007-03-12 삼성전자주식회사 이중 봉합된 반도체 패키지 및 그의 제조 방법
KR100780691B1 (ko) 2006-03-29 2007-11-30 주식회사 하이닉스반도체 폴딩 칩 플래나 스택 패키지
US7638868B2 (en) * 2006-08-16 2009-12-29 Tessera, Inc. Microelectronic package
JP5485496B2 (ja) 2006-12-18 2014-05-07 株式会社アドバンテスト 半導体試験装置
US7791896B1 (en) * 2007-06-20 2010-09-07 Teradata Us, Inc. Providing an embedded capacitor in a circuit board
JP2009038142A (ja) 2007-07-31 2009-02-19 Elpida Memory Inc 半導体積層パッケージ
KR20090021605A (ko) * 2007-08-27 2009-03-04 삼성전기주식회사 반도체 메모리 패키지
US20090073664A1 (en) 2007-09-18 2009-03-19 Research In Motion Limited Decoupling capacitor assembly, integrated circuit/decoupling capacitor assembly and method for fabricating same
JP4317245B2 (ja) 2007-09-27 2009-08-19 新光電気工業株式会社 電子装置及びその製造方法
JP5381089B2 (ja) 2008-12-25 2014-01-08 富士通株式会社 光信号処理装置
KR100950511B1 (ko) * 2009-09-22 2010-03-30 테세라 리써치 엘엘씨 와이어 본딩 및 도전성 기준 소자에 의해 제어되는 임피던스를 포함하는 마이크로전자 어셈블리
KR100935854B1 (ko) * 2009-09-22 2010-01-08 테세라 리써치 엘엘씨 와이어 본딩 및 기준 와이어 본딩에 의해 제어되는 임피던스를 가진 마이크로전자 어셈블리
US8553420B2 (en) 2010-10-19 2013-10-08 Tessera, Inc. Enhanced stacked microelectronic assemblies with central contacts and improved thermal characteristics
KR101061531B1 (ko) 2010-12-17 2011-09-01 테세라 리써치 엘엘씨 중앙 콘택을 구비하며 접지 또는 배전을 개선한 적층형 마이크로전자 조립체
KR101118711B1 (ko) * 2010-12-17 2012-03-12 테세라, 인코포레이티드 중앙 콘택을 구비한 적층형 마이크로전자 조립체

Also Published As

Publication number Publication date
US8885356B2 (en) 2014-11-11
CN103384913A (zh) 2013-11-06
US20120155042A1 (en) 2012-06-21
WO2012082227A3 (en) 2012-10-04
WO2012082227A2 (en) 2012-06-21
JP2013546199A (ja) 2013-12-26
TW201234556A (en) 2012-08-16
US20120153435A1 (en) 2012-06-21
US8466564B2 (en) 2013-06-18
US20150043181A1 (en) 2015-02-12
TWI528522B (zh) 2016-04-01
BR112013015117A2 (pt) 2016-09-20
KR101061531B1 (ko) 2011-09-01

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