JP5746586B2 - 薄膜トランジスタアレイ基板およびそれの製造方法 - Google Patents
薄膜トランジスタアレイ基板およびそれの製造方法 Download PDFInfo
- Publication number
- JP5746586B2 JP5746586B2 JP2011172653A JP2011172653A JP5746586B2 JP 5746586 B2 JP5746586 B2 JP 5746586B2 JP 2011172653 A JP2011172653 A JP 2011172653A JP 2011172653 A JP2011172653 A JP 2011172653A JP 5746586 B2 JP5746586 B2 JP 5746586B2
- Authority
- JP
- Japan
- Prior art keywords
- oxide semiconductor
- etching prevention
- pattern
- region
- preliminary
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 239000000758 substrate Substances 0.000 title claims description 86
- 239000010409 thin film Substances 0.000 title claims description 72
- 238000004519 manufacturing process Methods 0.000 title claims description 16
- 238000005530 etching Methods 0.000 claims description 148
- 239000004065 semiconductor Substances 0.000 claims description 137
- 230000002265 prevention Effects 0.000 claims description 129
- 239000010408 film Substances 0.000 claims description 127
- 125000006850 spacer group Chemical group 0.000 claims description 100
- 230000001681 protective effect Effects 0.000 claims description 59
- 238000000034 method Methods 0.000 claims description 25
- 239000000463 material Substances 0.000 claims description 14
- 238000000059 patterning Methods 0.000 claims description 7
- 230000000903 blocking effect Effects 0.000 claims description 5
- 230000015572 biosynthetic process Effects 0.000 claims description 4
- 239000011368 organic material Substances 0.000 claims description 3
- 238000003860 storage Methods 0.000 description 19
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 8
- 230000006866 deterioration Effects 0.000 description 8
- 239000011810 insulating material Substances 0.000 description 8
- 229910052814 silicon oxide Inorganic materials 0.000 description 8
- 239000004973 liquid crystal related substance Substances 0.000 description 6
- QTBSBXVTEAMEQO-UHFFFAOYSA-N acetic acid Substances CC(O)=O QTBSBXVTEAMEQO-UHFFFAOYSA-N 0.000 description 5
- 238000001039 wet etching Methods 0.000 description 5
- 229910052581 Si3N4 Inorganic materials 0.000 description 4
- 239000004020 conductor Substances 0.000 description 4
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 4
- 238000001312 dry etching Methods 0.000 description 3
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 3
- 239000005361 soda-lime glass Substances 0.000 description 3
- 238000004544 sputter deposition Methods 0.000 description 3
- -1 GaSnO Inorganic materials 0.000 description 2
- NBIIXXVUZAFLBC-UHFFFAOYSA-N Phosphoric acid Chemical compound OP(O)(O)=O NBIIXXVUZAFLBC-UHFFFAOYSA-N 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 229910021417 amorphous silicon Inorganic materials 0.000 description 2
- 239000005388 borosilicate glass Substances 0.000 description 2
- 229910052793 cadmium Inorganic materials 0.000 description 2
- 238000005229 chemical vapour deposition Methods 0.000 description 2
- 239000000460 chlorine Substances 0.000 description 2
- 238000005137 deposition process Methods 0.000 description 2
- 229910052733 gallium Inorganic materials 0.000 description 2
- 239000011521 glass Substances 0.000 description 2
- 229910052738 indium Inorganic materials 0.000 description 2
- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical compound [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 description 2
- 239000004033 plastic Substances 0.000 description 2
- 238000005546 reactive sputtering Methods 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- 229910052725 zinc Inorganic materials 0.000 description 2
- 239000011701 zinc Substances 0.000 description 2
- YVTHLONGBIQYBO-UHFFFAOYSA-N zinc indium(3+) oxygen(2-) Chemical compound [O--].[Zn++].[In+3] YVTHLONGBIQYBO-UHFFFAOYSA-N 0.000 description 2
- ZAMOUSCENKQFHK-UHFFFAOYSA-N Chlorine atom Chemical compound [Cl] ZAMOUSCENKQFHK-UHFFFAOYSA-N 0.000 description 1
- 229910005265 GaInZnO Inorganic materials 0.000 description 1
- 229910005555 GaZnO Inorganic materials 0.000 description 1
- GRYLNZFGIOXLOG-UHFFFAOYSA-N Nitric acid Chemical compound O[N+]([O-])=O GRYLNZFGIOXLOG-UHFFFAOYSA-N 0.000 description 1
- 229910007717 ZnSnO Inorganic materials 0.000 description 1
- 229910000147 aluminium phosphate Inorganic materials 0.000 description 1
- 229910052796 boron Inorganic materials 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 229910052799 carbon Inorganic materials 0.000 description 1
- 229910052801 chlorine Inorganic materials 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 230000008878 coupling Effects 0.000 description 1
- 238000010168 coupling process Methods 0.000 description 1
- 238000005859 coupling reaction Methods 0.000 description 1
- 230000005672 electromagnetic field Effects 0.000 description 1
- 229910052735 hafnium Inorganic materials 0.000 description 1
- 229910017604 nitric acid Inorganic materials 0.000 description 1
- 230000000149 penetrating effect Effects 0.000 description 1
- 238000001259 photo etching Methods 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 229910052715 tantalum Inorganic materials 0.000 description 1
- 229910052718 tin Inorganic materials 0.000 description 1
- 238000005019 vapor deposition process Methods 0.000 description 1
- XLOMVQKBTHCTTD-UHFFFAOYSA-N zinc oxide Inorganic materials [Zn]=O XLOMVQKBTHCTTD-UHFFFAOYSA-N 0.000 description 1
- 239000011787 zinc oxide Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1222—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer
- H01L27/1225—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1255—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs integrated with passive devices, e.g. auxiliary capacitors
Landscapes
- Power Engineering (AREA)
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Thin Film Transistor (AREA)
- Ceramic Engineering (AREA)
- Nonlinear Science (AREA)
- Mathematical Physics (AREA)
- Optics & Photonics (AREA)
- Liquid Crystal (AREA)
Description
さらに、コラムスペーサ(92、94)の上部領域、より具体的には、コラムスペーサ用開口部(93、95)の上部領域はゲート電極24と重ならない場合もある。
続いて、酸化物半導体層40上にエッチング防止膜を形成する。エッチング防止膜は例えば、化学気相蒸着(chemical vapor deposition、CVD)などの方法で酸化物半導体層40の全面に形成されることができる。エッチング防止膜は例えば、シリコン酸化膜またはシリコン窒化膜であってもよいが、これに限定されない。また、エッチング防止膜を例えば、乾式エッチングなどの方法でパターニングして予備エッチング防止パターン52aを形成することができる。
Claims (12)
- 基板上に配置されたゲート電極と、
前記基板上に配置されたゲート絶縁膜と、
前記ゲート絶縁膜上に配置された酸化物半導体パターンと、
前記酸化物半導体パターン上に配置されたエッチング防止パターンと、
前記エッチング防止パターン上に配置された保護膜、および
前記保護膜および前記ゲート絶縁膜を貫いて形成されたコラムスペーサを含み、
前記コラムスペーサは、前記保護膜、前記エッチング防止パターン、前記酸化物半導体パターン、および前記ゲート絶縁膜と接する第1側壁と、前記保護膜および前記ゲート絶縁膜と接する第2側壁を含む薄膜トランジスタアレイ基板。 - 前記保護膜、前記エッチング防止パターン、および前記酸化物半導体パターンは前記コラムスペーサの第1側壁に沿って垂直整列した請求項1に記載の薄膜トランジスタアレイ基板。
- 前記コラムスペーサは上部領域および下部領域を含み、前記上部領域の前記第1側壁と前記第2側壁の間の距離は、前記下部領域の前記第1側壁と前記第2側壁の間の距離より大きい請求項1に記載の薄膜トランジスタアレイ基板
- 前記コラムスペーサの上部領域は前記ゲート電極と重ならない請求項3に記載の薄膜トランジスタアレイ基板。
- 前記コラムスペーサは前記保護膜の少なくとも一部と重なる請求項1に記載の薄膜トランジスタアレイ基板。
- 前記コラムスペーサは透明有機物質または光遮断物質を含む請求項1に記載の薄膜トランジスタアレイ基板。
- 前記エッチング防止パターンは前記ゲート電極と重なる第1領域と、前記ゲート電極と重ならない第2領域を含む請求項1に記載の薄膜トランジスタアレイ基板。
- 前記エッチング防止パターンの前記第1領域は第1幅を有し、前記エッチング防止パターンの第2領域は第2幅を有するが、前記第1幅は前記第2幅より大きい請求項7に記載の薄膜トランジスタアレイ基板。
- ゲート電極を含む基板上にゲート絶縁膜、酸化物半導体層およびエッチング防止膜を順に積層し、
前記エッチング防止膜をパターニングして予備エッチング防止パターンを形成し、
前記酸化物半導体層および前記予備エッチング防止パターン上にソース電極と、前記ソース電極と分離されたドレーン電極を形成し、
前記予備エッチング防止パターン、前記ソース電極および前記ドレーン電極をマスクで前記酸化物半導体層をパターニングして予備酸化物半導体パターンを形成し、
前記予備エッチング防止パターンおよび前記ソース電極およびドレーン電極上に保護膜を形成し、
前記保護膜を貫く少なくとも一つのコラムスペーサ用開口部を形成することを含み、
前記少なくとも一つのコラムスペーサ用開口部を形成することは、前記予備エッチング防止パターンの一部と、前記予備エッチング防止パターンの一部と重なる領域の前記予備酸化物半導体パターンをエッチングし、エッチング防止パターンおよび酸化物半導体パターンを形成することを含む薄膜トランジスタアレイ基板の製造方法。 - 前記予備エッチング防止パターンは前記ゲート電極と重なる第1領域と、前記ゲート電極と重ならない第2領域を含み、
前記エッチング防止パターンを形成することは、前記第2領域の前記予備エッチング防止パターンの少なくとも一部と重なる領域の保護膜と、前記予備エッチング防止パターンの少なくとも一部を同時または順にエッチングすることを含む請求項9に記載の薄膜トランジスタアレイ基板の製造方法。 - 前記少なくとも一つのコラムスペーサ用開口部は第1幅を有する上部領域と前記第1幅より狭い第2幅を有する下部領域を含み、
前記エッチング防止パターンを形成することは、前記下部領域の一側壁が前記予備酸化物半導体パターンに垂直整列するように前記ゲート絶縁膜をエッチングすることを含む請求項10に記載の薄膜トランジスタアレイ基板の製造方法。 - 前記酸化物半導体パターンを形成することは、
前記エッチング防止パターンを形成した後、前記保護膜上に導電膜を形成し、
前記導電膜を一部エッチングして画素電極および前記酸化物半導体パターンを形成することをさらに含む請求項11に記載の薄膜トランジスタアレイ基板の製造方法。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020100077300A KR101701212B1 (ko) | 2010-08-11 | 2010-08-11 | 박막 트랜지스터 기판 및 이의 제조 방법 |
KR10-2010-0077300 | 2010-08-11 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2012039116A JP2012039116A (ja) | 2012-02-23 |
JP5746586B2 true JP5746586B2 (ja) | 2015-07-08 |
Family
ID=45564158
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2011172653A Active JP5746586B2 (ja) | 2010-08-11 | 2011-08-08 | 薄膜トランジスタアレイ基板およびそれの製造方法 |
Country Status (4)
Country | Link |
---|---|
US (1) | US8994023B2 (ja) |
JP (1) | JP5746586B2 (ja) |
KR (1) | KR101701212B1 (ja) |
CN (1) | CN102376721B (ja) |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP5863399B2 (ja) * | 2011-11-07 | 2016-02-16 | 三菱電機株式会社 | 配線構造及びそれを備える薄膜トランジスタアレイ基板並びに表示装置 |
JP6306278B2 (ja) * | 2012-04-09 | 2018-04-04 | Jsr株式会社 | 半導体素子、半導体基板、感放射線性樹脂組成物、保護膜および表示素子 |
KR20150054040A (ko) | 2013-11-08 | 2015-05-20 | 삼성디스플레이 주식회사 | 박막 트랜지스터 기판 및 이를 포함하는 유기 발광 표시 장치 |
TWI552322B (zh) * | 2015-08-06 | 2016-10-01 | 友達光電股份有限公司 | 畫素結構 |
Family Cites Families (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH06314789A (ja) | 1993-04-30 | 1994-11-08 | Sharp Corp | 薄膜トランジスタ |
JP3210196B2 (ja) * | 1994-12-22 | 2001-09-17 | シャープ株式会社 | 薄膜トランジスタとその製造方法 |
JP3801687B2 (ja) | 1996-06-06 | 2006-07-26 | 三菱電機株式会社 | 薄膜トランジスタおよびその製法 |
KR100731738B1 (ko) | 2005-03-30 | 2007-06-22 | 삼성에스디아이 주식회사 | 박막트랜지스터, 평판표시장치 및 그 제조방법 |
KR100971089B1 (ko) * | 2005-05-31 | 2010-07-16 | 엘지디스플레이 주식회사 | 액정표시장치 및 그 제조방법 |
JP2007157916A (ja) | 2005-12-02 | 2007-06-21 | Idemitsu Kosan Co Ltd | Tft基板及びtft基板の製造方法 |
JP2009099847A (ja) | 2007-10-18 | 2009-05-07 | Canon Inc | 薄膜トランジスタとその製造方法及び表示装置 |
JP5489445B2 (ja) | 2007-11-15 | 2014-05-14 | 富士フイルム株式会社 | 薄膜電界効果型トランジスタおよびそれを用いた表示装置 |
KR101510212B1 (ko) | 2008-06-05 | 2015-04-10 | 삼성전자주식회사 | 산화물 반도체 박막 트랜지스터의 제조방법 |
TWI637444B (zh) * | 2008-08-08 | 2018-10-01 | 半導體能源研究所股份有限公司 | 半導體裝置的製造方法 |
JP4623179B2 (ja) | 2008-09-18 | 2011-02-02 | ソニー株式会社 | 薄膜トランジスタおよびその製造方法 |
JP2010263182A (ja) * | 2009-04-10 | 2010-11-18 | Toppan Printing Co Ltd | 薄膜トランジスタおよび画像表示装置 |
-
2010
- 2010-08-11 KR KR1020100077300A patent/KR101701212B1/ko active IP Right Grant
-
2011
- 2011-05-24 US US13/115,088 patent/US8994023B2/en active Active
- 2011-08-08 JP JP2011172653A patent/JP5746586B2/ja active Active
- 2011-08-11 CN CN201110229094.6A patent/CN102376721B/zh active Active
Also Published As
Publication number | Publication date |
---|---|
US20120037906A1 (en) | 2012-02-16 |
CN102376721A (zh) | 2012-03-14 |
US8994023B2 (en) | 2015-03-31 |
KR20120015066A (ko) | 2012-02-21 |
KR101701212B1 (ko) | 2017-02-02 |
CN102376721B (zh) | 2016-08-10 |
JP2012039116A (ja) | 2012-02-23 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
EP2747138B1 (en) | Thin film transistor array substrate | |
US9570621B2 (en) | Display substrate, method of manufacturing the same | |
KR20150060205A (ko) | 산화물 박막트랜지스터 및 그 제조방법 | |
US8823003B2 (en) | Gate insulator loss free etch-stop oxide thin film transistor | |
KR20120039947A (ko) | 표시 장치 및 그 제조 방법 | |
KR20140067600A (ko) | 스위칭 소자, 이를 포함하는 표시 기판 및 이의 제조 방법 | |
JP5746586B2 (ja) | 薄膜トランジスタアレイ基板およびそれの製造方法 | |
KR102232539B1 (ko) | 박막 트랜지스터, 이를 포함하는 표시 기판 및 박막 트랜지스터의 제조 방법 | |
KR102494732B1 (ko) | 박막 트랜지스터 표시판 및 그 제조 방법 | |
JP6469959B2 (ja) | 薄膜トランジスタ表示板およびその製造方法 | |
WO2018090496A1 (zh) | 一种阵列基板及其制备方法、液晶显示面板 | |
US9293484B2 (en) | Thin film transistor display panel and method of manufacturing the same | |
KR101217182B1 (ko) | 박막 트랜지스터 기판, 이의 제조방법 및 이를 갖는표시패널 | |
US9423662B2 (en) | Thin film transistor, array substrate and display device | |
US20150155309A1 (en) | Display substrate and method of manufacturing the same | |
KR20160082173A (ko) | 박막 트랜지스터 및 이를 포함하는 표시 장치 | |
US9018623B2 (en) | Array substrate, display panel having the same and method of manufacturing the array substrate | |
KR102212457B1 (ko) | 유기발광표시장치 및 그의 제조방법 | |
KR102218944B1 (ko) | 유기 발광 다이오드 표시 장치 및 이의 제조 방법 | |
CN109300990A (zh) | 薄膜晶体管及制备方法、阵列基板、显示面板和显示装置 | |
KR102111067B1 (ko) | 스위칭 소자, 이를 포함하는 표시 기판 및 이의 제조 방법 | |
KR102142477B1 (ko) | 어레이 기판 및 이의 제조방법 | |
KR20150098694A (ko) | 박막 트랜지스터, 이를 포함하는 표시 기판 및 박막 트랜지스터의 제조 방법 | |
KR102113603B1 (ko) | 박막 트랜지스터 어레이 기판 및 이의 제조 방법 | |
KR20050047885A (ko) | 박막 트랜지스터 표시판 및 그의 제조 방법 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A711 | Notification of change in applicant |
Free format text: JAPANESE INTERMEDIATE CODE: A712 Effective date: 20121213 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20130325 |
|
A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20140603 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20150203 |
|
A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20150205 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20150227 |
|
TRDD | Decision of grant or rejection written | ||
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20150421 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20150508 |
|
R150 | Certificate of patent or registration of utility model |
Ref document number: 5746586 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R150 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |