JP5742623B2 - Semiconductor device - Google Patents

Semiconductor device Download PDF

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JP5742623B2
JP5742623B2 JP2011206551A JP2011206551A JP5742623B2 JP 5742623 B2 JP5742623 B2 JP 5742623B2 JP 2011206551 A JP2011206551 A JP 2011206551A JP 2011206551 A JP2011206551 A JP 2011206551A JP 5742623 B2 JP5742623 B2 JP 5742623B2
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electrode
flexible substrate
lead frame
semiconductor element
semiconductor device
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JP2013069809A (en
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佐々木　悟
悟 佐々木
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Toyota Motor Corp
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L24/39—Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L24/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/50—Tape automated bonding [TAB] connectors, i.e. film carriers; Manufacturing methods related thereto
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/39—Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L2224/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
    • H01L2224/401—Disposition
    • H01L2224/40135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/40137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1305—Bipolar Junction Transistor [BJT]
    • H01L2924/13055—Insulated gate bipolar transistor [IGBT]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Description

本発明は、半導体素子にフレキシブル基板を取り付けてなる半導体装置に関する。   The present invention relates to a semiconductor device in which a flexible substrate is attached to a semiconductor element.

従来、半導体装置としては、例えば特開２００６−３３２５７９号公報に開示されるように、車両用インバータのパワーモジュールとして用いられるものが知られている。図４は、同公報に開示された装置の一例を示している。この装置は、図４（ａ）に示すように、制御ＩＣチップ１０１を搭載したフレキシブル基板１０２のリード部１０３をＩＧＢＴ素子１０４（半導体素子）の制御電極に接続してなる信号配線を有している。この装置では、図４（ａ）の一部Ｐを拡大した図４（ｂ）に示すように、ＩＧＢＴ素子１０４に対するフレキシブル基板１０２（のリード部１０３）の接触が、フレキシブル基板１０２に挿入された付勢部材１０５の弾性による圧接によって確保されている。   2. Description of the Related Art Conventionally, semiconductor devices that are used as power modules for vehicle inverters are known as disclosed in, for example, Japanese Patent Application Laid-Open No. 2006-332579. FIG. 4 shows an example of an apparatus disclosed in the publication. As shown in FIG. 4A, this apparatus has a signal wiring formed by connecting a lead portion 103 of a flexible substrate 102 on which a control IC chip 101 is mounted to a control electrode of an IGBT element 104 (semiconductor element). Yes. In this apparatus, the contact of the flexible substrate 102 (the lead portion 103) with the IGBT element 104 is inserted into the flexible substrate 102 as shown in FIG. It is ensured by pressure contact due to the elasticity of the urging member 105.

特開２００６−３３２５７９号公報JP 2006-332579 A

しかし、このような半導体装置では、フレキシブル基板１０２の可撓性に起因して、付勢部材１０５の弾性による圧接の管理が難しいので、半導体素子に対するフレキシブル基板の位置決めが不適切になるなど、半導体装置の製造工程が困難となり易い。   However, in such a semiconductor device, due to the flexibility of the flexible substrate 102, it is difficult to manage the pressure contact due to the elasticity of the biasing member 105, so that the positioning of the flexible substrate with respect to the semiconductor element becomes inappropriate. The device manufacturing process tends to be difficult.

そこで、本発明は、製造工程の簡略化が図られた半導体装置を提供しようとするものである。   Accordingly, the present invention is intended to provide a semiconductor device in which the manufacturing process is simplified.

本発明のある態様によれば、第１の電極および信号電極が設けられた半導体素子と、第１の電極に接合されるリードフレームと、少なくとも信号配線が形成されると共に、リードフレームを第１の電極に接合する際に、信号配線が信号電極に接合するように、リードフレームに取り付けられているフレキシブル基板と、を備え、第１の電極と信号電極は、半導体素子における同一方向に向く面にそれぞれ形成されており、リードフレームには、半導体素子とリードフレームとの間にフレキシブル基板を配置するための空間を形成するために、第１の電極の側に突出した凸部が設けられる、半導体装置が提供される。 According to an aspect of the present invention, the semiconductor element provided with the first electrode and the signal electrode, the lead frame joined to the first electrode, at least the signal wiring, and the lead frame are formed in the first frame. A flexible substrate attached to the lead frame so that the signal wiring is joined to the signal electrode when joining to the first electrode, and the first electrode and the signal electrode face in the same direction in the semiconductor element Each of the lead frames is provided with a projecting portion protruding toward the first electrode in order to form a space for disposing a flexible substrate between the semiconductor element and the lead frame. A semiconductor device is provided.

かかる構成によれば、フレキシブル基板は、少なくとも信号配線が形成されると共に、リードフレームを第１の電極に接合する際に、信号配線が信号電極に接合するように、リードフレームに取り付けられている。これにより、フレキシブル基板の接合に際して、リードフレームの位置決めを通じてフレキシブル基板の位置決めが可能となり、半導体素子に対してフレキシブル基板を容易に位置決めできる。よって、半導体装置の製造工程を簡略化できる。また、半導体素子とリードフレームとの間にフレキシブル基板を配置するための空間を形成するために、第１の電極の側に突出した凸部が設けられるので、半導体素子に対してフレキシブル基板を容易に接合できる。 According to this configuration, the flexible substrate is attached to the lead frame so that at least the signal wiring is formed and the signal wiring is joined to the signal electrode when the lead frame is joined to the first electrode. . Accordingly, when the flexible substrates are joined, the flexible substrate can be positioned through the positioning of the lead frame, and the flexible substrate can be easily positioned with respect to the semiconductor element. Therefore, the manufacturing process of the semiconductor device can be simplified. In addition, since a convex portion protruding toward the first electrode is provided to form a space for arranging the flexible substrate between the semiconductor element and the lead frame, the flexible substrate can be easily formed with respect to the semiconductor element. Can be joined.

また、半導体装置が、リードフレームを介して第１の電極に接合される第１の電極端子をさらに備えてもよい。かかる構成によれば、リードフレームが、第１の電極および第１の電極端子に接合されるので、フレキシブル基板を単独で接合する場合のように別途の加圧・加熱部材を用いなくても、リードフレームを加圧・加熱部材としてフレキシブル基板を接合できる。 Further, the semiconductor device, the first electrode terminal further Bei forte may be joined to the first electrode via the lead frame. According to such a configuration, the lead frame, than Ru are bonded to the first electrode and the first electrode terminal, without using a separate pressing and heating member as in the case of bonding a flexible substrate alone The flexible substrate can be joined using the lead frame as a pressure / heating member.

また、半導体装置が、少なくとも半導体素子の周囲を封止する封止樹脂部をさらに備え、信号電極に接合される信号配線が形成されたフレキシブル基板の一端が、封止樹脂部の一端から露出してもよい。かかる構成によれば、信号電極に接合される信号配線が形成されたフレキシブル基板の一端が封止樹脂部の一端から露出するので、半導体素子から半導体装置の外部に至る信号配線をフレキシブル基板に一体化できる。   The semiconductor device further includes a sealing resin portion that seals at least the periphery of the semiconductor element, and one end of the flexible substrate on which the signal wiring bonded to the signal electrode is formed is exposed from one end of the sealing resin portion. May be. According to such a configuration, since one end of the flexible substrate on which the signal wiring bonded to the signal electrode is formed is exposed from one end of the sealing resin portion, the signal wiring extending from the semiconductor element to the outside of the semiconductor device is integrated with the flexible substrate. Can be

また、第１の電極端子の電位が、フレキシブル基板に実装された実装部品の基準電位に等しくてもよい。かかる構成によれば、第１の電極端子の電位が、フレキシブル基板に実装された実装部品の基準電位に等しいので、実装部品のノイズ耐性を向上できる。   Further, the potential of the first electrode terminal may be equal to the reference potential of the mounting component mounted on the flexible substrate. According to such a configuration, since the potential of the first electrode terminal is equal to the reference potential of the mounting component mounted on the flexible substrate, the noise resistance of the mounting component can be improved.

以上説明したように、本発明によれば、製造工程の簡略化が図られた半導体装置を提供することができる。   As described above, according to the present invention, a semiconductor device with a simplified manufacturing process can be provided.

本発明の実施形態に係る半導体装置を示す断面図である。It is sectional drawing which shows the semiconductor device which concerns on embodiment of this invention. 半導体装置の第１の変形例を示す断面図である。It is sectional drawing which shows the 1st modification of a semiconductor device. 半導体装置の第２の変形例を示す断面図である。It is sectional drawing which shows the 2nd modification of a semiconductor device. フレキシブル基板を用いた従来の半導体装置を示す断面図である。It is sectional drawing which shows the conventional semiconductor device using a flexible substrate.

まず、図１を参照して、本発明の実施形態に係る半導体装置について説明する。図１は、本発明の実施形態に係る半導体装置を示す断面図である。   First, a semiconductor device according to an embodiment of the present invention will be described with reference to FIG. FIG. 1 is a cross-sectional view showing a semiconductor device according to an embodiment of the present invention.

本発明の実施形態に係る半導体装置は、例えば車両用インバータに用いられるパワーモジュールである。図１に示すように、半導体装置は、半導体素子１１と、第１および第２の電極端子１２、１３と、リードフレーム１４と、フレキシブル基板１５と、封止樹脂部１６とを含む。   The semiconductor device according to the embodiment of the present invention is a power module used for, for example, a vehicle inverter. As shown in FIG. 1, the semiconductor device includes a semiconductor element 11, first and second electrode terminals 12 and 13, a lead frame 14, a flexible substrate 15, and a sealing resin portion 16.

半導体素子１１は、パワーデバイスとも称され、シリコン、炭化珪素、窒化ガリウムなどの半導体からなる。半導体素子１１は、第１の電極１１ａおよび信号電極１１ｃ（信号パッドとも称する）を設けた第１の面（図１では上面）と、第２の電極１１ｂを設けた第２の面（図１では下面）とを有する。   The semiconductor element 11 is also called a power device, and is made of a semiconductor such as silicon, silicon carbide, gallium nitride. The semiconductor element 11 includes a first surface (upper surface in FIG. 1) provided with a first electrode 11a and a signal electrode 11c (also referred to as a signal pad), and a second surface provided with a second electrode 11b (FIG. 1). The lower surface).

第１および第２の電極端子１２、１３は、出力電極とも称され、銅、タングステン、モリブデンなどで構成された金属板からなるが、他の金属材料で構成されてもよい。第１および第２の電極端子１２、１３には、配線端子１２ａ、１３ａの一端がそれぞれに接続される。第１の電極端子１２（Ｎ電極）は、接合部１７ｃを介してリードフレーム１４の上面に接合される。第２の電極端子１３（Ｐ電極）は、接合部１７ｂを介して半導体素子１１の第２の電極１１ｂに接合されて半導体素子１１と電気的に接続される。   The first and second electrode terminals 12 and 13 are also called output electrodes and are made of a metal plate made of copper, tungsten, molybdenum or the like, but may be made of other metal materials. One end of each of the wiring terminals 12a and 13a is connected to the first and second electrode terminals 12 and 13, respectively. The first electrode terminal 12 (N electrode) is bonded to the upper surface of the lead frame 14 via the bonding portion 17c. The second electrode terminal 13 (P electrode) is joined to the second electrode 11b of the semiconductor element 11 through the joint portion 17b and is electrically connected to the semiconductor element 11.

リードフレーム１４は、第１の電極１１ａに接合される導電部材として機能する。リードフレーム１４は、半導体パッケージの内部配線として使われる薄板の金属であり、外部配線との橋渡しの役目を果たす。リードフレーム１４は、プリント回路基板１５よりも高い剛性を伴う。リードフレーム１４は、その一端が半導体装置の中央に位置し、その他端が半導体装置の側端に位置する。リードフレーム１４の一端は、その上面が接合部１７ｃを介して第１の電極端子１２の下面に接合されて第１の電極端子１２と電気的に接続されると共に、その下面が接合部１７ａを介して半導体素子１１の第１の電極１１ａに接合されて半導体素子１１と電気的に接続される。よって、リードフレーム１４は、半導体素子１１と第１の電極端子１２とを電気的に接続する。   The lead frame 14 functions as a conductive member joined to the first electrode 11a. The lead frame 14 is a thin metal plate used as internal wiring of the semiconductor package, and serves as a bridge with external wiring. The lead frame 14 has higher rigidity than the printed circuit board 15. One end of the lead frame 14 is located at the center of the semiconductor device, and the other end is located at the side end of the semiconductor device. One end of the lead frame 14 has its upper surface joined to the lower surface of the first electrode terminal 12 via the joint portion 17c to be electrically connected to the first electrode terminal 12, and its lower surface connected to the joint portion 17a. The first electrode 11a of the semiconductor element 11 is joined to and electrically connected to the semiconductor element 11. Therefore, the lead frame 14 electrically connects the semiconductor element 11 and the first electrode terminal 12.

リードフレーム１４には、その下面に接着手段（不図示）などを介してフレキシブル基板１５が取り付けられる。リードフレーム１４の一端は、半導体素子１１側に突出した凸部１４ａを有しており、半導体素子１１と第１の電極端子１２との間にフレキシブル基板１５を配置するための空間を形成する。よって、リードフレーム１４の凸部１４ａは、フレキシブル基板１５の配置空間を確保するためのスペーサとして機能する。   A flexible substrate 15 is attached to the lower surface of the lead frame 14 via an adhesive means (not shown). One end of the lead frame 14 has a protrusion 14 a protruding toward the semiconductor element 11, and forms a space for arranging the flexible substrate 15 between the semiconductor element 11 and the first electrode terminal 12. Therefore, the convex portion 14 a of the lead frame 14 functions as a spacer for securing the arrangement space for the flexible substrate 15.

フレキシブル基板（ＦＰＣ基板）１５は、プリドライバＩＣなどの実装部品１５ｂを実装すると共に、少なくとも半導体素子１１に接続される信号配線１５ａが形成される。フレキシブル基板１５は、その一端が半導体素子１１の近傍に位置し、その他端が半導体装置の外部に位置して周辺の制御基板（不図示）に接続される。フレキシブル基板１５は、その上面が接着手段などを介してリードフレーム１４に取り付けられ、よって、リードフレーム１４に一体化される。フレキシブル基板１５の一端は、その下面が信号接合部１７ｄを介して半導体素子１１の信号電極１１ｃに接合されて半導体素子１１と電気的に接続される。   A flexible substrate (FPC substrate) 15 is mounted with a mounting component 15b such as a pre-driver IC, and at least a signal wiring 15a connected to the semiconductor element 11 is formed. One end of the flexible substrate 15 is located in the vicinity of the semiconductor element 11, and the other end is located outside the semiconductor device and is connected to a peripheral control substrate (not shown). The upper surface of the flexible substrate 15 is attached to the lead frame 14 via an adhesive means or the like, and is thus integrated with the lead frame 14. One end of the flexible substrate 15 is electrically connected to the semiconductor element 11 by joining the lower surface of the flexible substrate 15 to the signal electrode 11c of the semiconductor element 11 via the signal joining portion 17d.

封止樹脂部１６は、モールド材とも称され、エポキシモールド樹脂などの絶縁樹脂からなるが、他の絶縁材料で構成されてもよい。封止樹脂部１６は、少なくとも半導体素子１１の周囲を封止し、図１に示す実施形態では、第１および第２の電極端子１２、１３の側面、および第１および第２の電極端子１２、１３の間の空間を封止する。なお、封止樹脂部１６は、第１の電極端子１２の上面および第２の電極端子１３の下面をさらに封止してもよい。第１および第２の電極端子１２、１３に接続された配線端子１２ａ、１３ａの他端と、フレキシブル基板１５の他端とは、封止樹脂部１６から露出する。なお、リードフレーム１４の他端は、封止樹脂部１６から露出してもよく、露出しなくてもよい。   The sealing resin portion 16 is also referred to as a mold material and is made of an insulating resin such as an epoxy mold resin, but may be composed of other insulating materials. The sealing resin portion 16 seals at least the periphery of the semiconductor element 11. In the embodiment shown in FIG. 1, the side surfaces of the first and second electrode terminals 12, 13 and the first and second electrode terminals 12. , 13 is sealed. The sealing resin portion 16 may further seal the upper surface of the first electrode terminal 12 and the lower surface of the second electrode terminal 13. The other ends of the wiring terminals 12 a and 13 a connected to the first and second electrode terminals 12 and 13 and the other end of the flexible substrate 15 are exposed from the sealing resin portion 16. The other end of the lead frame 14 may be exposed from the sealing resin portion 16 or may not be exposed.

半導体装置の製造に際して、フレキシブル基板１５は、リードフレーム１４を半導体素子１１の第１の電極１１ａに接合する際に信号配線１５ａが半導体素子１１の信号電極１１ｃに接合するように、リードフレーム１４に取り付けられている。すなわち、フレキシブル基板１５は、リードフレーム１４（の凸部１４ａ）を第１の電極１１ａに接合する際に信号配線１５ａが信号電極１１ｃに接合可能（電気的に接続可能）な位置に配置されるように、リードフレーム１４に取り付けられている。このため、フレキシブル基板１５の接合に際して、半導体素子１１の第１の電極１１ａに対するリードフレーム１４の位置決めを通じて、半導体装置の信号電極１１ｃに対するフレキシブル基板１５の位置決めが可能となり、半導体素子１１に対してフレキシブル基板１５を容易に位置決めできる。フレキシブル基板１５を単独で位置決めする場合、半導体素子１１の近傍に位置決め用の隙間が必要となり半導体装置の大型化を招く場合があるが、リードフレーム１４の位置決めを通じてフレキシブル基板１５の位置決めが可能となるので、半導体装置の大型化を抑制できる。   When manufacturing the semiconductor device, the flexible substrate 15 is attached to the lead frame 14 such that the signal wiring 15 a is joined to the signal electrode 11 c of the semiconductor element 11 when the lead frame 14 is joined to the first electrode 11 a of the semiconductor element 11. It is attached. In other words, the flexible substrate 15 is disposed at a position where the signal wiring 15a can be joined (electrically connectable) to the signal electrode 11c when the lead frame 14 (projection 14a thereof) is joined to the first electrode 11a. Thus, it is attached to the lead frame 14. Therefore, when the flexible substrate 15 is joined, the flexible substrate 15 can be positioned with respect to the signal electrode 11 c of the semiconductor device through the positioning of the lead frame 14 with respect to the first electrode 11 a of the semiconductor element 11. The substrate 15 can be easily positioned. When positioning the flexible substrate 15 alone, a positioning gap is required in the vicinity of the semiconductor element 11, which may increase the size of the semiconductor device. However, the flexible substrate 15 can be positioned through the positioning of the lead frame 14. Therefore, an increase in the size of the semiconductor device can be suppressed.

また、半導体素子１１の第１の電極１１ａに接合されるリードフレーム１４にフレキシブル基板１５が取り付けられているので、第１の電極１１ａに対するリードフレーム１４の接合と、信号電極１１ｃに対するフレキシブル基板１５の信号配線１５ａの接合とをほぼ同時にできる。また、半導体素子１１の信号電極１１ｃに接合される信号配線１５ａがフレキシブル基板１５に形成されるので、実装部品１５ｂなどをフレキシブル基板１５上で半導体素子１１の直近に配置可能となり信号配線１５ａの寄生インダクタンスを低減できる。   In addition, since the flexible substrate 15 is attached to the lead frame 14 to be bonded to the first electrode 11a of the semiconductor element 11, the bonding of the lead frame 14 to the first electrode 11a and the flexible substrate 15 to the signal electrode 11c are performed. The signal wiring 15a can be joined almost simultaneously. Further, since the signal wiring 15a to be joined to the signal electrode 11c of the semiconductor element 11 is formed on the flexible substrate 15, the mounting component 15b and the like can be disposed on the flexible substrate 15 in the immediate vicinity of the semiconductor element 11, and the signal wiring 15a is parasitic. Inductance can be reduced.

さらに、フレキシブル基板１５が取り付けられたリードフレーム１４が半導体素子１１の第１の電極１１ａおよび第１の電極端子１２に接合されるので、フレキシブル基板１５を単独で接合する場合のように別途の加圧・加熱部材を用いなくても、リードフレーム１４を加圧・加熱部材としてフレキシブル基板１５を接合できる。また、半導体素子１１の信号電極１１ｃに接合される信号配線１５ａが形成されたフレキシブル基板１５の一端が封止樹脂部１６の一端から露出するので、半導体素子１１から半導体装置の外部に至る信号配線１５ａをフレキシブル基板１５に一体化できる。また、第１の電極端子１２の電位がフレキシブル基板１５に実装された実装部品１５ｂの基準電位に等しいので、実装部品１５ｂのノイズ耐性を向上できる。   Furthermore, since the lead frame 14 to which the flexible substrate 15 is attached is bonded to the first electrode 11a and the first electrode terminal 12 of the semiconductor element 11, additional processing is required as in the case of bonding the flexible substrate 15 alone. Even without using a pressure / heating member, the flexible substrate 15 can be joined using the lead frame 14 as a pressure / heating member. In addition, since one end of the flexible substrate 15 on which the signal wiring 15a bonded to the signal electrode 11c of the semiconductor element 11 is formed is exposed from one end of the sealing resin portion 16, the signal wiring extending from the semiconductor element 11 to the outside of the semiconductor device. 15 a can be integrated with the flexible substrate 15. Further, since the potential of the first electrode terminal 12 is equal to the reference potential of the mounting component 15b mounted on the flexible substrate 15, the noise resistance of the mounting component 15b can be improved.

つぎに、図２および図３を参照して、半導体装置の第１および第２の変形例について説明する。図２および図３は、半導体装置の第１および第２の変形例をそれぞれに示す断面図である。   Next, first and second modifications of the semiconductor device will be described with reference to FIGS. 2 and 3 are cross-sectional views showing first and second modifications of the semiconductor device, respectively.

図２に示すように、第１の変形例に係る半導体装置では、図１に示した半導体装置において、リードフレーム１４に代えて、第１の電極端子２２が導電部材として機能する。つまり、第１の電極端子２２は、フレキシブル基板１５を取り付けると共に、半導体素子１１の第１の電極１１ａに接合される。第１の電極端子２２は、プリント回路基板１５よりも高い剛性を伴う。なお、第１の電極端子２２には、配線端子２２ａの一端が接続される。   As shown in FIG. 2, in the semiconductor device according to the first modification, in the semiconductor device shown in FIG. 1, the first electrode terminal 22 functions as a conductive member instead of the lead frame 14. That is, the first electrode terminal 22 is attached to the first electrode 11 a of the semiconductor element 11 while attaching the flexible substrate 15. The first electrode terminal 22 has higher rigidity than the printed circuit board 15. Note that one end of the wiring terminal 22 a is connected to the first electrode terminal 22.

第１の電極端子２２の下面には、フレキシブル基板１５の配置空間を確保するためのスペーサとして機能する凸部２２ｂが設けられる。よって、半導体装置では、第２の電極端子１３が接合部１７ｂを介して半導体素子１１の第２の電極１１ｂに接合され、第１の電極端子２２の凸部２２ｂが接合部１７ｅを介して半導体素子１１の第１の電極１１ａに接合される。よって、半導体素子１１は、第１および第２の電極端子２２、１３と電気的に接続される。そして、フレキシブル基板１５は、フレキシブル基板１５を半導体素子１１の第１の電極１１ａに接合する際に、配線回路１５ａが半導体素子１１の信号電極１１ｃに接合するように、第１の電極端子２２の（凸部２２ｂ以外の）下面に取り付けられている。よって、第１の電極端子２２に取り付けられたフレキシブル基板１５は、信号接合部１７ｄを介して半導体素子１１と電気的に接続される。   On the lower surface of the first electrode terminal 22, a convex portion 22 b that functions as a spacer for securing a space for arranging the flexible substrate 15 is provided. Therefore, in the semiconductor device, the second electrode terminal 13 is bonded to the second electrode 11b of the semiconductor element 11 via the bonding portion 17b, and the convex portion 22b of the first electrode terminal 22 is bonded to the semiconductor via the bonding portion 17e. It is joined to the first electrode 11a of the element 11. Therefore, the semiconductor element 11 is electrically connected to the first and second electrode terminals 22 and 13. The flexible substrate 15 is connected to the first electrode terminal 22 so that the wiring circuit 15 a is bonded to the signal electrode 11 c of the semiconductor element 11 when the flexible substrate 15 is bonded to the first electrode 11 a of the semiconductor element 11. It is attached to the lower surface (other than the convex portion 22b). Therefore, the flexible substrate 15 attached to the first electrode terminal 22 is electrically connected to the semiconductor element 11 via the signal bonding portion 17d.

半導体装置の製造に際して、フレキシブル基板１５は、第１の電極端子２２（の凸部２２ｂ）を半導体素子１１の第１の電極１１ａに接合する際に、信号配線１５ａが半導体素子１１の信号電極１１ｃに接合するように第２の電極端子２２に取り付けられている。このため、フレキシブル基板１５の接合に際して、半導体素子１１の第１の電極１１ａに対する第２の電極端子２２の位置決めを通じて、半導体装置の信号電極１１ｃに対するフレキシブル基板１５の位置決めが可能となり、半導体素子１１に対してフレキシブル基板１５を容易に位置決めできる。   When manufacturing the semiconductor device, the flexible substrate 15 is configured such that the signal wiring 15 a is connected to the first electrode 11 a of the semiconductor element 11 when the first electrode terminal 22 (projection 22 b thereof) is joined to the signal electrode 11 c of the semiconductor element 11. It is attached to the second electrode terminal 22 so as to be joined to. For this reason, when the flexible substrate 15 is joined, the flexible substrate 15 can be positioned with respect to the signal electrode 11c of the semiconductor device through the positioning of the second electrode terminal 22 with respect to the first electrode 11a of the semiconductor element 11. On the other hand, the flexible substrate 15 can be easily positioned.

図３に示すように、第２の変形例に係る半導体装置は、半導体素子１１の第１の電極１１ａに接合される第１の電極端子１２、２２を有していない半導体装置である。第２の変形例に係る半導体装置では、図２に示した半導体装置において、第２の電極端子２２に代えて、リードフレーム２４が導電部材として機能する。つまり、リードフレーム２４は、フレキシブル基板１５を取り付けると共に、半導体素子１１の第１の電極１１ａに接合される。リードフレーム２４は、プリント回路基板１５よりも高い剛性を伴う。   As shown in FIG. 3, the semiconductor device according to the second modification is a semiconductor device that does not have the first electrode terminals 12 and 22 joined to the first electrode 11 a of the semiconductor element 11. In the semiconductor device according to the second modification, the lead frame 24 functions as a conductive member in place of the second electrode terminal 22 in the semiconductor device shown in FIG. That is, the lead frame 24 is attached to the first electrode 11 a of the semiconductor element 11 while attaching the flexible substrate 15. The lead frame 24 has higher rigidity than the printed circuit board 15.

リードフレーム２４の下面には、フレキシブル基板１５の配置空間を確保するためのスペーサとして機能する凸部２４ａが設けられる。よって、半導体装置では、第２の電極端子１３が接合部１７ｂを介して半導体素子１１の第２の電極１１ｂに接合され、リードフレーム２４の凸部２４ａが接合部１７ｆを介して半導体素子１１の第１の電極１１ａに接合される。よって、半導体素子１１は、第２の電極端子１３およびリードフレーム２４と電気的に接続される。そして、フレキシブル基板１５は、信号配線１５ａが接合部１７ｄを介して半導体素子１１の信号電極１１ｃに接合されるようにリードフレーム２４の（凸部２４ａ以外の）下面に取り付けられている。よって、リードフレーム２４に取り付けられたフレキシブル基板１５は、信号接合部１７ｄを介して半導体素子１１と電気的に接続される。   On the lower surface of the lead frame 24, a convex portion 24 a that functions as a spacer for securing a space for arranging the flexible substrate 15 is provided. Therefore, in the semiconductor device, the second electrode terminal 13 is bonded to the second electrode 11b of the semiconductor element 11 via the bonding portion 17b, and the convex portion 24a of the lead frame 24 is connected to the semiconductor element 11 via the bonding portion 17f. Bonded to the first electrode 11a. Therefore, the semiconductor element 11 is electrically connected to the second electrode terminal 13 and the lead frame 24. The flexible substrate 15 is attached to the lower surface (other than the convex portion 24a) of the lead frame 24 so that the signal wiring 15a is bonded to the signal electrode 11c of the semiconductor element 11 via the bonding portion 17d. Therefore, the flexible substrate 15 attached to the lead frame 24 is electrically connected to the semiconductor element 11 via the signal bonding portion 17d.

半導体装置の製造に際して、フレキシブル基板１５は、リードフレーム２４（の凸部２４ａ）を半導体素子１１の第１の電極１１ａに接合する際に、信号配線１５ａが半導体素子１１の信号電極１１ｃに接合するようにリードフレーム２４に取り付けられている。このため、フレキシブル基板１５の接合に際して、半導体素子１１の第１の電極１１ａに対するリードフレーム２４の位置決めを通じて、半導体装置の信号電極１１ｃに対するフレキシブル基板１５の位置決めが可能となり、半導体素子１１に対してフレキシブル基板１５を容易に位置決めできる。   When manufacturing the semiconductor device, the flexible substrate 15 has the signal wiring 15 a bonded to the signal electrode 11 c of the semiconductor element 11 when the lead frame 24 (projection 24 a thereof) is bonded to the first electrode 11 a of the semiconductor element 11. As shown in FIG. For this reason, when the flexible substrate 15 is joined, the flexible substrate 15 can be positioned with respect to the signal electrode 11c of the semiconductor device through the positioning of the lead frame 24 with respect to the first electrode 11a of the semiconductor element 11, and flexible with respect to the semiconductor element 11. The substrate 15 can be easily positioned.

以上説明したように、本発明の実施形態に係る半導体装置によれば、フレキシブル基板１５は、少なくとも信号配線１５ａが形成されると共に、導電部材（リードフレーム１４、２４、第１の電極端子２２）を第１の電極１１ａに接合する際に、信号配線１５ａが信号電極１１ｃに接合するように、導電部材（リードフレーム１４、２４、第１の電極端子２２）に取り付けられている。これにより、フレキシブル基板１５の接合に際して、導電部材（リードフレーム１４、２４、第１の電極端子２２）の位置決めを通じてフレキシブル基板１５の位置決めが可能となり、半導体素子１１に対してフレキシブル基板１５を容易に位置決めできる。よって、半導体装置の製造工程を簡略化できる。   As described above, according to the semiconductor device of the embodiment of the present invention, at least the signal wiring 15a is formed on the flexible substrate 15, and the conductive member (lead frames 14, 24, first electrode terminal 22). Is attached to the conductive member (lead frames 14 and 24, first electrode terminal 22) so that the signal wiring 15a is joined to the signal electrode 11c. Accordingly, when the flexible substrate 15 is joined, the flexible substrate 15 can be positioned through positioning of the conductive members (lead frames 14 and 24, the first electrode terminals 22), and the flexible substrate 15 can be easily attached to the semiconductor element 11. Can be positioned. Therefore, the manufacturing process of the semiconductor device can be simplified.

以上、添付図面を参照しながら本発明の好適な実施形態について詳細に説明したが、本発明は、前述した実施形態に係る半導体装置に限定されない。本発明の属する技術の分野における通常の知識を有する者であれば、特許請求の範囲に記載された技術的思想の範疇内において、各種の変更例または修正例に想到し得ることは明らかであり、これらについても、当然に本発明の技術的範囲に属するものと了解される。   The preferred embodiments of the present invention have been described in detail above with reference to the accompanying drawings. However, the present invention is not limited to the semiconductor device according to the above-described embodiments. It is obvious that a person having ordinary knowledge in the technical field to which the present invention pertains can come up with various changes or modifications within the scope of the technical idea described in the claims. Of course, it is understood that these also belong to the technical scope of the present invention.

１１…半導体素子、１１ａ…第１の電極、１１ｂ…第２の電極、１１ｃ…信号電極、１２、２２…第１の電極端子、１３…第２の電極端子、１４、２４…リードフレーム、１５…フレキシブル基板、１５ａ…信号配線、１６…封止樹脂部、１４ａ、２２ｂ、２４ａ…凸部
DESCRIPTION OF SYMBOLS 11 ... Semiconductor element, 11a ... 1st electrode, 11b ... 2nd electrode, 11c ... Signal electrode, 12, 22 ... 1st electrode terminal, 13 ... 2nd electrode terminal, 14, 24 ... Lead frame, 15 ... flexible substrate, 15a ... signal wiring, 16 ... sealing resin part, 14a, 22b, 24a ... convex part

Claims (5)

第１の電極および信号電極が設けられた半導体素子と、
前記第１の電極に接合されるリードフレームと、
少なくとも信号配線が形成されると共に、前記リードフレームを前記第１の電極に接合する際に、前記信号配線が前記信号電極に接合するように、前記リードフレームに取り付けられているフレキシブル基板と、を備え、
前記第１の電極と前記信号電極は、前記半導体素子における同一方向に向く面にそれぞれ形成されており、
前記リードフレームには、前記半導体素子と前記リードフレームとの間に前記フレキシブル基板を配置するための空間を形成するために、前記第１の電極の側に突出した凸部が設けられる、半導体装置。 A semiconductor element provided with a first electrode and a signal electrode;
A lead frame joined to the first electrode;
A flexible substrate attached to the lead frame such that at least the signal wiring is formed and the signal wiring is joined to the signal electrode when the lead frame is joined to the first electrode; Prepared,
The first electrode and the signal electrode are respectively formed on surfaces facing in the same direction in the semiconductor element ,
A semiconductor device, wherein the lead frame is provided with a protruding portion protruding toward the first electrode in order to form a space for disposing the flexible substrate between the semiconductor element and the lead frame. . 前記リードフレームを介して前記第１の電極に接合される第１の電極端子をさらに備える、請求項１に記載の半導体装置。   The semiconductor device according to claim 1, further comprising a first electrode terminal joined to the first electrode through the lead frame. 少なくとも前記半導体素子の周囲を封止する封止樹脂部をさらに備え、
前記信号電極に接合される前記信号配線が形成された前記フレキシブル基板の一端が、前記封止樹脂部の一端から露出する、請求項１または２に記載の半導体装置。 A sealing resin portion for sealing at least the periphery of the semiconductor element;
The semiconductor device according to claim 1, wherein one end of the flexible substrate on which the signal wiring bonded to the signal electrode is formed is exposed from one end of the sealing resin portion. 前記第１の電極端子の電位が、前記フレキシブル基板に実装された実装部品の基準電位に等しい、請求項２に記載の半導体装置。   The semiconductor device according to claim 2, wherein a potential of the first electrode terminal is equal to a reference potential of a mounting component mounted on the flexible substrate. 前記リードフレームが前記フレキシブル基板よりも高い剛性を伴う、請求項１〜４のいずれか一項に記載の半導体装置。 The accompanying rigidity higher than the lead frame is the flexible substrate, a semiconductor device according to any one of claims 1-4.
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