JP5643850B2 - Pixel structure and electronic device thereof - Google Patents
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- 239000004973 liquid crystal related substance Substances 0.000 claims description 28
- 230000005684 electric field Effects 0.000 claims description 4
- 238000002834 transmittance Methods 0.000 description 3
- 230000005540 biological transmission Effects 0.000 description 2
- 230000008878 coupling Effects 0.000 description 2
- 230000001808 coupling effect Effects 0.000 description 2
- 238000010168 coupling process Methods 0.000 description 2
- 238000005859 coupling reaction Methods 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 230000003287 optical effect Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 1
- 238000000034 method Methods 0.000 description 1
Classifications
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1343—Electrodes
- G02F1/134309—Electrodes characterised by their geometrical arrangement
- G02F1/134336—Matrix
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136286—Wiring, e.g. gate line, drain line
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1343—Electrodes
- G02F1/134309—Electrodes characterised by their geometrical arrangement
- G02F1/134318—Electrodes characterised by their geometrical arrangement having a patterned common electrode
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1343—Electrodes
- G02F1/134309—Electrodes characterised by their geometrical arrangement
- G02F1/134345—Subdivided pixels, e.g. for grey scale or redundancy
Description
本発明は、画素構造に関し、特に、フィードスルーを効果的に制御することができる、高い光透過率を有する画素構造に関するものである。 The present invention relates to a pixel structure, and more particularly, to a pixel structure having high light transmittance that can effectively control feedthrough.
垂直配向（ＶＡ）の広視野角では、異なる液晶配向を有する２つの領域の間の境界にある液晶の効率が十分でない場合、パネルの光透過率は乏しい。また、製造されている時、不透明な金属線も、パネルの光透過率を乏しくさせる。一般的に言えば、画素電極の設計は、光透過率を最適化することができる。例えば、設計者は、低い液晶効率を有する領域の減少を試すことができるがしかしながら、いくつかの光学的な問題が生じる。例えば、過度の容量結合の効果は、クロストークを生じるか、または非対称の正／負の半周期の電圧は、製造を困難にし、産出高と製品の信頼性などを低下させる。 With a wide viewing angle of vertical alignment (VA), if the efficiency of the liquid crystal at the boundary between two regions having different liquid crystal alignments is not sufficient, the light transmittance of the panel is poor. Also, when manufactured, opaque metal lines also make the panel less light transmissive. Generally speaking, pixel electrode design can optimize light transmission. For example, designers can try to reduce the area with low liquid crystal efficiency, however, some optical problems arise. For example, excessive capacitive coupling effects can cause crosstalk or asymmetrical positive / negative half-cycle voltages can make manufacturing difficult and reduce yields, product reliability, and the like.
“フィードスルー”は、トランジスタがオンにされて、次いでオフにされた時に発生される容量結合の効果である。電圧は、高圧から低圧（ＣＭＩ社を例に）であるため、結合方向は、画素電極の電圧を引き下げる。液晶は、その元の特性を失う偏光から液晶を防ぐために、正／負の半周期ＡＣ状態で駆動される。この時、“フィードスルー”が過大な場合、正／負の半周期の対称性は、低下し、製造上および光学上の問題を招く。 “Feed-through” is the effect of capacitive coupling that occurs when a transistor is turned on and then turned off. Since the voltage is from high voltage to low voltage (CMI company as an example), the coupling direction lowers the voltage of the pixel electrode. The liquid crystal is driven in a positive / negative half-cycle AC state to prevent the liquid crystal from polarized light that loses its original properties. At this time, if the “feedthrough” is excessive, the symmetry of the positive / negative half-cycle is lowered, resulting in manufacturing and optical problems.
フィードスルーを効果的に制御することができる、高い光透過率を有する画素構造を提供する。 Provided is a pixel structure having a high light transmittance capable of effectively controlling feedthrough.
本発明の１つの実施形態は、第１のスキャンラインに電気的接続された複数のサブピクセルを含む第１のサブピクセル列、および複数のサブピクセルを含み、第１のスキャンラインは、そのサブピクセルの領域を通過する第２のサブピクセル列を含む画素構造を提供する。 One embodiment of the present invention includes a first sub-pixel column including a plurality of sub-pixels electrically connected to the first scan line, and a plurality of sub-pixels, the first scan line including the sub-pixels. A pixel structure is provided that includes a second sub-pixel column that passes through a region of pixels.
第１のサブピクセル列および第２のサブピクセル列のサブピクセルは、長方形、ひし形、または多角形の形状である。 The subpixels of the first subpixel column and the second subpixel column have a rectangular shape, a rhombus shape, or a polygonal shape.
第１のサブピクセル列のサブピクセルは、赤、青、および緑色ピクセル、またはその組み合わせの中の１つを含む。 The subpixels in the first subpixel column include one of red, blue, and green pixels, or a combination thereof.
第２のサブピクセル列のサブピクセルは、赤、青、および緑色ピクセル、またはその組み合わせの中の１つを含む。 The sub-pixels in the second sub-pixel column include one of red, blue, and green pixels, or a combination thereof.
第１のスキャンラインが通過する第２のサブピクセル列のサブピクセルの領域は、液晶の斜線領域に対応する。 The sub-pixel region of the second sub-pixel row through which the first scan line passes corresponds to the shaded region of the liquid crystal.
第２のサブピクセル列のサブピクセルは、第１のサブピクセル列のサブピクセルの間にそれぞれ配置されるため、第１のサブピクセル列のサブピクセルおよび第２のサブピクセル列のサブピクセルが千鳥配列される。 Since the subpixels of the second subpixel column are respectively arranged between the subpixels of the first subpixel column, the subpixels of the first subpixel column and the subpixels of the second subpixel column are staggered. Arranged.
画素構造は、第１のサブピクセル列のサブピクセルの領域を通過する複数の第１のデータラインを更に含む。 The pixel structure further includes a plurality of first data lines that pass through a subpixel region of the first subpixel column.
第１のデータラインが通過する第１のサブピクセル列のサブピクセルの領域は、液晶の斜線領域に対応する。 The subpixel region of the first subpixel column through which the first data line passes corresponds to the shaded region of the liquid crystal.
画素構造は、第２のサブピクセル列のサブピクセルの領域を通過する複数の第２のデータラインを更に含む。 The pixel structure further includes a plurality of second data lines that pass through the subpixel region of the second subpixel column.
第２のデータラインが通過する第２のサブピクセル列のサブピクセルの領域は、液晶の斜線領域に対応する。 The sub-pixel region of the second sub-pixel column through which the second data line passes corresponds to the shaded region of the liquid crystal.
画素構造は、第１のサブピクセル列および第２のサブピクセル列のサブピクセルのエッジに配置された複数の共通電極を更に含む。 The pixel structure further includes a plurality of common electrodes disposed on the edges of the subpixels of the first subpixel column and the second subpixel column.
共通電極は、ジグザグ状または凹凸状である。 The common electrode has a zigzag shape or an uneven shape.
第１のスキャンラインは、第１のサブピクセル列のサブピクセルのエッジを通過し、第１のデータラインに垂直する。 The first scan line passes through the edge of the subpixel of the first subpixel column and is perpendicular to the first data line.
第１のスキャンラインは、第２のサブピクセル列のサブピクセルの中心を通過する。 The first scan line passes through the center of the subpixel of the second subpixel column.
画素構造は、複数の駆動装置を更に含み、各駆動装置は、１つの第１のデータラインおよび１つの第２のデータラインを同時に制御する。 The pixel structure further includes a plurality of driving devices, and each driving device controls one first data line and one second data line simultaneously.
画素構造は、複数の駆動トランジスタを更に含み、第１のサブピクセル列のサブピクセルに電気的接続され、第２のサブピクセル列の２つの隣接するサブピクセルの間に配置される。 The pixel structure further includes a plurality of driving transistors, electrically connected to the subpixels of the first subpixel column, and disposed between two adjacent subpixels of the second subpixel column.
本発明の１つの実施形態は、表示パネルを組み込んだ電子機器を提供し、前記表示パネルは、第１のスキャンラインに電気的接続された複数のサブピクセルを含む第１のサブピクセル列、および複数のサブピクセルを含み、第１のスキャンラインは、そのサブピクセルの領域を通過する第２のサブピクセル列を含む。 One embodiment of the present invention provides an electronic device incorporating a display panel, wherein the display panel includes a first subpixel column including a plurality of subpixels electrically connected to a first scan line, and The first scan line includes a plurality of subpixels, and the second scan line includes a second subpixel column that passes through the region of the subpixels.
詳細な説明は、添付の図面と併せて以下の実施形態に説明される。 The detailed description is described in the following embodiments in conjunction with the accompanying drawings.
本発明は、添付の図面と併せて後に続く詳細な説明と実施例を解釈することによって、より完全に理解されることができる。
図１Ａを参照に、本発明の１つの実施形態に基づいた画素構造が提供される。画素構造１０は、第１のサブピクセル列１２および第２のサブピクセル列１４を含む。第１のサブピクセル列１２は、第１のスキャンライン１８に電気的接続された複数のサブピクセル１６を含む。第２のサブピクセル列１４は、複数のサブピクセル２０を含む。特に、第１のスキャンライン１８は、第２のサブピクセル列１４のサブピクセル２０の領域を通過する。例えば、第１のスキャンライン１８は、第２のサブピクセル列１４のサブピクセル２０の中心２４を通過する。 Referring to FIG. 1A, a pixel structure according to one embodiment of the present invention is provided. The pixel structure 10 includes a first subpixel column 12 and a second subpixel column 14. The first subpixel column 12 includes a plurality of subpixels 16 electrically connected to the first scan line 18. The second subpixel column 14 includes a plurality of subpixels 20. In particular, the first scan line 18 passes through the area of the subpixel 20 of the second subpixel column 14. For example, the first scan line 18 passes through the center 24 of the sub-pixel 20 of the second sub-pixel row 14.
この実施形態では、第１のサブピクセル列１２および第２のサブピクセル列１４のサブピクセル（１６、２０）は、ひし形の形状であるが、本発明はこれに限定されない。他の実施形態では、第１のサブピクセル列１２および第２のサブピクセル列１４のサブピクセル（１６、２０）は、長方形または多角形の形状であることができる。図１Ｂを参照に、本発明のもう１つの実施形態に基づいた画素構造が提供される。画素構造１００は、第１のサブピクセル列１２０および第２のサブピクセル列１４０を含む。第１のサブピクセル列１２０は、第１のスキャンライン１８０に電気的接続された複数のサブピクセル１６０を含む。第２のサブピクセル列１４０は、複数のサブピクセル２００を含む。特に、第１のスキャンライン１８０は、第２のサブピクセル列１４０のサブピクセル２００の領域を通過する。例えば、第１のスキャンライン１８０は、第２のサブピクセル列１４０のサブピクセル２００の中心２４０を通過する。 In this embodiment, the subpixels (16, 20) of the first subpixel column 12 and the second subpixel column 14 have a rhombus shape, but the present invention is not limited thereto. In other embodiments, the sub-pixels (16, 20) of the first sub-pixel column 12 and the second sub-pixel column 14 may have a rectangular or polygonal shape. Referring to FIG. 1B, a pixel structure according to another embodiment of the present invention is provided. The pixel structure 100 includes a first subpixel column 120 and a second subpixel column 140. The first subpixel column 120 includes a plurality of subpixels 160 electrically connected to the first scan line 180. The second subpixel column 140 includes a plurality of subpixels 200. In particular, the first scan line 180 passes through the region of the subpixel 200 of the second subpixel column 140. For example, the first scan line 180 passes through the center 240 of the subpixel 200 of the second subpixel column 140.
この実施形態では、第１のサブピクセル列１２０および第１のサブピクセル列１４０のサブピクセル（１６０、２００）は、長方形の形状である。 In this embodiment, the subpixels (160, 200) of the first subpixel column 120 and the first subpixel column 140 have a rectangular shape.
次いで、図３Ａおよび図３Ｂを参照に、第１のサブピクセル列１２のサブピクセル１６は、赤、青、および緑のサブピクセルの組み合わせを含んでもよい。例えば、赤色サブピクセルＲ、青色サブピクセルＢ、および緑色サブピクセルＧは、図３Ａに表されるように水平配置される。同様に、第２のサブピクセル列１４のサブピクセル２０は、赤、青、および緑のサブピクセルの組み合わせを含んでもよい。例えば、赤色サブピクセルＲ、青色サブピクセルＢ、および緑色サブピクセルＧは、図３Ａに表されるように水平配置される。また、図３Ｂを参照に、第１のサブピクセル列１２のサブピクセル１６は、例えば、赤色サブピクセルＲなど、赤、青、または緑のサブピクセルの中の１つを含むこともできる。第２のサブピクセル列１４のサブピクセル２０は、例えば、緑色サブピクセルＧなど、赤、青、または緑のサブピクセルの中の１つを含むこともできる。第３のサブピクセル列１５のサブピクセル２１は、例えば、青色サブピクセルＢなど、赤、青、または緑のサブピクセルの中の１つを含むこともできる。第４のサブピクセル列１７のサブピクセル２３は、例えば、赤色サブピクセルＲなど、赤、青、または緑のサブピクセルの中の１つを含むこともできる。第５のサブピクセル列１９のサブピクセル２５は、例えば、緑色サブピクセルＧなど、赤、青、または緑のサブピクセルの中の１つを含むこともでき、例えば、赤色サブピクセル１６（Ｒ）、青色サブピクセル２１（Ｂ）、および緑色サブピクセル２５（Ｇ）は、水平配置される。 3A and 3B, the subpixel 16 of the first subpixel column 12 may include a combination of red, blue, and green subpixels. For example, the red subpixel R, the blue subpixel B, and the green subpixel G are horizontally arranged as shown in FIG. 3A. Similarly, subpixel 20 of second subpixel column 14 may include a combination of red, blue, and green subpixels. For example, the red subpixel R, the blue subpixel B, and the green subpixel G are horizontally arranged as shown in FIG. 3A. Referring also to FIG. 3B, the sub-pixel 16 of the first sub-pixel column 12 may include one of red, blue, or green sub-pixels, such as a red sub-pixel R, for example. The sub-pixel 20 of the second sub-pixel row 14 can also include one of red, blue, or green sub-pixels, such as a green sub-pixel G, for example. The sub-pixels 21 of the third sub-pixel row 15 can also include one of red, blue, or green sub-pixels, such as a blue sub-pixel B, for example. The sub-pixels 23 of the fourth sub-pixel row 17 can also include one of red, blue, or green sub-pixels, such as a red sub-pixel R, for example. The sub-pixels 25 of the fifth sub-pixel row 19 can also include one of red, blue, or green sub-pixels, such as, for example, the green sub-pixel G, for example, the red sub-pixel 16 (R) , The blue sub-pixel 21 (B), and the green sub-pixel 25 (G) are horizontally arranged.
具体的に言うと、第１のスキャンライン１８が通過する第２のサブピクセル列１４のサブピクセル２０の領域は、液晶の斜線領域に対応する。液晶の斜線領域は、電場における異なる液晶配向を有する２つの領域の間の境界にある液晶の不適切な配列によって形成される。また、図１Ａに示されるように、第２のサブピクセル列１４のサブピクセル２０は、第１のサブピクセル列１２のサブピクセル１６の間にそれぞれ配置されるため、第１のサブピクセル列１２のサブピクセル１６および第２のサブピクセル列１４のサブピクセル２０が千鳥配列される。 Specifically, the region of the subpixel 20 of the second subpixel column 14 through which the first scan line 18 passes corresponds to the shaded region of the liquid crystal. The shaded region of the liquid crystal is formed by an improper alignment of the liquid crystal at the boundary between two regions having different liquid crystal orientations in the electric field. Further, as shown in FIG. 1A, the subpixels 20 of the second subpixel column 14 are disposed between the subpixels 16 of the first subpixel column 12, respectively. The sub-pixels 16 and the sub-pixels 20 of the second sub-pixel row 14 are staggered.
また、さらに図１Ａを参照すると、画素構造１０は、第１のサブピクセル列１２のサブピクセル１６の液晶の斜線領域に対応する領域を通過する複数の第１のデータライン２６を更に含む。例えば、第１のデータライン２６は、第１のサブピクセル列１２のサブピクセル１６の中心２８を通過する。画素構造１０は、第２のサブピクセル列１４のサブピクセル２０の液晶の斜線領域に対応する領域を通過する複数の第１のデータライン２６’を更に含む。例えば、第１のデータライン２６’は、第２のサブピクセル列１４のサブピクセル２０の中心２４を通過する。 Still referring to FIG. 1A, the pixel structure 10 further includes a plurality of first data lines 26 that pass through an area corresponding to the shaded area of the liquid crystal of the subpixel 16 of the first subpixel column 12. For example, the first data line 26 passes through the center 28 of the subpixel 16 of the first subpixel column 12. The pixel structure 10 further includes a plurality of first data lines 26 ′ that pass through a region corresponding to the shaded region of the liquid crystal of the subpixel 20 of the second subpixel column 14. For example, the first data line 26 ′ passes through the center 24 of the subpixel 20 of the second subpixel column 14.
具体的に言うと、第１のスキャンライン１８は、第１のサブピクセル列１２のサブピクセル１６のエッジ２２を通過し、第１のデータライン２６に垂直する。 Specifically, the first scan line 18 passes through the edge 22 of the subpixel 16 of the first subpixel column 12 and is perpendicular to the first data line 26.
画素構造１０は、第１のサブピクセル列１２および第２のサブピクセル列１４のサブピクセル（１６、２０）のエッジに配置された複数の共通電極３０を更に含む。例えば、図１Ａに表されるように共通電極３０は、ジグザグ状である。 The pixel structure 10 further includes a plurality of common electrodes 30 disposed at the edges of the subpixels (16, 20) of the first subpixel column 12 and the second subpixel column 14. For example, as shown in FIG. 1A, the common electrode 30 has a zigzag shape.
画素構造１０は、第１のサブピクセル列１２のサブピクセル１６に電気的接続された複数の駆動トランジスタ３４を更に含み、第２のサブピクセル列１４の２つの隣接するサブピクセル（２０、２０）の間に配置される。 The pixel structure 10 further includes a plurality of driving transistors 34 electrically connected to the subpixels 16 of the first subpixel column 12, and two adjacent subpixels (20, 20) of the second subpixel column 14. It is arranged between.
図１Ｂを参照すると、もう１つの実施形態では、画素構造１００は、第１のサブピクセル列１２０のサブピクセル１６０の液晶の斜線領域に対応する領域を通過する複数の第１のデータライン２６０を更に含む。例えば、第１のデータライン２６０は、第１のサブピクセル列１２０のサブピクセル１６０の中心２８０を通過する。画素構造１００は、第２のサブピクセル列１４０のサブピクセル２００の液晶の斜線領域に対応する領域を通過する複数の第１のデータライン２６０’を更に含む。例えば、第１のデータライン２６０’は、第２のサブピクセル列１４０のサブピクセル２００の中心２４０を通過する。 Referring to FIG. 1B, in another embodiment, the pixel structure 100 includes a plurality of first data lines 260 that pass through a region corresponding to the shaded region of the liquid crystal of the subpixel 160 of the first subpixel column 120. In addition. For example, the first data line 260 passes through the center 280 of the subpixel 160 of the first subpixel column 120. The pixel structure 100 further includes a plurality of first data lines 260 ′ that pass through a region corresponding to the shaded region of the liquid crystal of the subpixel 200 of the second subpixel column 140. For example, the first data line 260 ′ passes through the center 240 of the subpixel 200 of the second subpixel column 140.
具体的に言うと、第１のスキャンライン１８０は、第１のサブピクセル列１２０のサブピクセル１６０のエッジ２２０を通過し、第１のデータライン２６０に垂直する。 Specifically, the first scan line 180 passes through the edge 220 of the sub-pixel 160 of the first sub-pixel column 120 and is perpendicular to the first data line 260.
画素構造１００は、第１のサブピクセル列１２０および第２のサブピクセル列１４０のサブピクセル（１６０、２００）のエッジに配置された複数の共通電極３００を更に含む。例えば、図１Ｂに表されるように共通電極３００は、凹凸状である。 The pixel structure 100 further includes a plurality of common electrodes 300 disposed at the edges of the sub-pixels (160, 200) of the first sub-pixel column 120 and the second sub-pixel column 140. For example, as shown in FIG. 1B, the common electrode 300 is uneven.
画素構造１００は、第１のサブピクセル列１２０のサブピクセル１６０に電気的接続された複数の駆動トランジスタ３４０を更に含み、第２のサブピクセル列１４０の２つの隣接するサブピクセル（２００、２００）の間に配置される。 The pixel structure 100 further includes a plurality of driving transistors 340 electrically connected to the subpixels 160 of the first subpixel column 120, and two adjacent subpixels (200, 200) of the second subpixel column 140. It is arranged between.
また、図２を参照すると、画素構造１０は、複数の駆動装置３２を更に含む。具体的に言うと、各駆動装置３２は、１つの第１のデータライン２６および１つの第２のデータライン２６’を同時に制御する。 Referring to FIG. 2, the pixel structure 10 further includes a plurality of driving devices 32. Specifically, each driving device 32 controls one first data line 26 and one second data line 26 'simultaneously.
本発明では、例えば、第１のサブピクセル列のスキャンラインは、隣接のサブピクセル（異なる列のサブピクセル）の千鳥配列により、第２のサブピクセル列の液晶の斜線領域に対応する領域に埋設される。即ち、不透明な金属線（例えばスキャンラインおよびデータライン）は、低い液晶効率を有する液晶の斜線領域と結合され、光透過率を最大化する。同時に、第１のサブピクセル列のスキャンラインにわたる第２のサブピクセル列の画素電極（ＩＴＯ）により、低容量結合の効果（フィードスルー）は、そのままである。 In the present invention, for example, the scan line of the first subpixel column is embedded in a region corresponding to the oblique line region of the liquid crystal of the second subpixel column by a staggered arrangement of adjacent subpixels (subpixels of different columns). Is done. That is, opaque metal lines (e.g., scan lines and data lines) are combined with slanted areas of liquid crystal having low liquid crystal efficiency to maximize light transmission. At the same time, the low-capacitance coupling effect (feedthrough) remains the same due to the pixel electrode (ITO) of the second subpixel column across the scan line of the first subpixel column.
この発明は、実施例の方法及び望ましい実施の形態によって記述されているが、本発明は、これらを限定するものではないことは理解される。逆に、種々の変更及び同様の配置をカバーするものである（当業者には明白なように）。よって、添付の請求の範囲は、最も広義な解釈が与えられ、全てのこのような変更及び同様の配置を含むべきである。 While this invention has been described in terms of example methods and preferred embodiments, it is understood that this invention is not limited thereto. On the contrary, various modifications and similar arrangements are covered (as will be apparent to those skilled in the art). Accordingly, the appended claims are to be accorded the broadest interpretation and should include all such modifications and similar arrangements.
１０、１００ 画素構造
１２、１２０ 第１のサブピクセル列
１４、 １４０ 第２のサブピクセル列
１５ 第３のサブピクセル列
１６、２０、１６０、２００、２１、２３、２５ サブピクセル
１７ 第４のサブピクセル列
１８、１８０ 第１のスキャンライン
１９ 第５のサブピクセル列
２２、２２０ サブピクセルのエッジ
２４、２８、２４０、２８０ サブピクセルの中心
２６、２６０ 第１のデータライン
２６’、２６０’ 第２のデータライン
３０、３００ 共通電極
３２ 駆動装置
３４、３４０ 駆動トランジスタ
Ｂ 青色サブピクセル
Ｇ 緑色サブピクセル
Ｒ 赤色サブピクセル
10, 100 Pixel structure 12, 120 First sub-pixel column 14, 140 Second sub-pixel column 15 Third sub-pixel column 16, 20, 160, 200, 21, 23, 25 Sub-pixel 17 Fourth sub Pixel column 18, 180 First scan line 19 Fifth subpixel column 22, 220 Subpixel edge 24, 28, 240, 280 Subpixel center 26, 260 First data line 26 ', 260' Second Data lines 30 and 300 Common electrode 32 Driving device 34 and 340 Driving transistor B Blue subpixel G Green subpixel R Red subpixel
Claims (14)
複数のサブピクセルを含む第２のサブピクセル列であって、前記第１のスキャンラインが前記第２のサブピクセル列のサブピクセルの領域を通過する、第２のサブピクセル列と、
前記第１のサブピクセル列のサブピクセルの領域を通過する複数の第１のデータラインと、
前記第２のサブピクセル列のサブピクセルの領域を通過する複数の第２のデータラインと、を含む画素構造であって、
１つの第１のデータラインおよび１つの第２のデータラインが、１つの駆動装置によって同時に制御される、画素構造。 A first sub-pixel column that contains electrically connected to a plurality of sub-pixels in the first scan line,
A plurality of sub-pixels A including the second sub-pixel columns, the first scan line passes through the area of the sub-pixels of the previous SL second subpixel columns, and the second sub-pixel columns,
A plurality of first data lines passing through a subpixel region of the first subpixel column;
A plurality of second data lines passing through a sub-pixel region of the second sub-pixel column ,
A pixel structure in which one first data line and one second data line are controlled simultaneously by one driver .
第１のスキャンラインに電気的に接続された複数のサブピクセルを含む第１のサブピクセル列と、
複数のサブピクセルを含む第２のサブピクセル列であって、前記第１のスキャンラインが前記第２のサブピクセル列のサブピクセルの領域を通過する、第２のサブピクセル列と、
前記第１のサブピクセル列のサブピクセルの領域を通過する複数の第１のデータラインと、
前記第２のサブピクセル列のサブピクセルの領域を通過する複数の第２のデータラインと、を含む電子機器であって、
１つの第１のデータラインおよび１つの第２のデータラインが、１つの駆動装置によって同時に制御される、電子機器。 An electronic device incorporating a display panel, wherein the display panel is
A first sub-pixel column that contains electrically connected to a plurality of sub-pixels in the first scan line,
A plurality of sub-pixels A including the second sub-pixel columns, the first scan line passes through the area of the sub-pixels of the previous SL second subpixel columns, and the second sub-pixel columns,
A plurality of first data lines passing through a subpixel region of the first subpixel column;
A plurality of second data lines passing through a sub-pixel region of the second sub-pixel column ,
An electronic device in which one first data line and one second data line are simultaneously controlled by one driving device.
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