CN106054476A - Array substrate and manufacturing method therefor, and display device - Google Patents

Array substrate and manufacturing method therefor, and display device Download PDF

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Publication number
CN106054476A
CN106054476A CN201610454741.6A CN201610454741A CN106054476A CN 106054476 A CN106054476 A CN 106054476A CN 201610454741 A CN201610454741 A CN 201610454741A CN 106054476 A CN106054476 A CN 106054476A
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China
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electrode
plural
base palte
wire
array base
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CN201610454741.6A
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Chinese (zh)
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不公告发明人
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上海纪显电子科技有限公司
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Priority to CN201610454741.6A priority Critical patent/CN106054476A/en
Publication of CN106054476A publication Critical patent/CN106054476A/en

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    • GPHYSICS
    • G02OPTICS
    • G02FDEVICES OR ARRANGEMENTS, THE OPTICAL OPERATION OF WHICH IS MODIFIED BY CHANGING THE OPTICAL PROPERTIES OF THE MEDIUM OF THE DEVICES OR ARRANGEMENTS FOR THE CONTROL OF THE INTENSITY, COLOUR, PHASE, POLARISATION OR DIRECTION OF LIGHT, e.g. SWITCHING, GATING, MODULATING OR DEMODULATING; TECHNIQUES OR PROCEDURES FOR THE OPERATION THEREOF; FREQUENCY-CHANGING; NON-LINEAR OPTICS; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating, or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating, or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating, or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/1343Electrodes
    • G02F1/134309Electrodes characterised by their geometrical arrangement
    • GPHYSICS
    • G02OPTICS
    • G02FDEVICES OR ARRANGEMENTS, THE OPTICAL OPERATION OF WHICH IS MODIFIED BY CHANGING THE OPTICAL PROPERTIES OF THE MEDIUM OF THE DEVICES OR ARRANGEMENTS FOR THE CONTROL OF THE INTENSITY, COLOUR, PHASE, POLARISATION OR DIRECTION OF LIGHT, e.g. SWITCHING, GATING, MODULATING OR DEMODULATING; TECHNIQUES OR PROCEDURES FOR THE OPERATION THEREOF; FREQUENCY-CHANGING; NON-LINEAR OPTICS; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating, or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating, or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating, or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/136286Wiring, e.g. gate line, drain line
    • GPHYSICS
    • G02OPTICS
    • G02FDEVICES OR ARRANGEMENTS, THE OPTICAL OPERATION OF WHICH IS MODIFIED BY CHANGING THE OPTICAL PROPERTIES OF THE MEDIUM OF THE DEVICES OR ARRANGEMENTS FOR THE CONTROL OF THE INTENSITY, COLOUR, PHASE, POLARISATION OR DIRECTION OF LIGHT, e.g. SWITCHING, GATING, MODULATING OR DEMODULATING; TECHNIQUES OR PROCEDURES FOR THE OPERATION THEREOF; FREQUENCY-CHANGING; NON-LINEAR OPTICS; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating, or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating, or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating, or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/1368Active matrix addressed cells in which the switching element is a three-electrode device
    • GPHYSICS
    • G02OPTICS
    • G02FDEVICES OR ARRANGEMENTS, THE OPTICAL OPERATION OF WHICH IS MODIFIED BY CHANGING THE OPTICAL PROPERTIES OF THE MEDIUM OF THE DEVICES OR ARRANGEMENTS FOR THE CONTROL OF THE INTENSITY, COLOUR, PHASE, POLARISATION OR DIRECTION OF LIGHT, e.g. SWITCHING, GATING, MODULATING OR DEMODULATING; TECHNIQUES OR PROCEDURES FOR THE OPERATION THEREOF; FREQUENCY-CHANGING; NON-LINEAR OPTICS; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating, or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating, or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating, or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/1343Electrodes
    • G02F1/134309Electrodes characterised by their geometrical arrangement
    • G02F2001/134318Electrodes characterised by their geometrical arrangement having a patterned common electrode
    • GPHYSICS
    • G02OPTICS
    • G02FDEVICES OR ARRANGEMENTS, THE OPTICAL OPERATION OF WHICH IS MODIFIED BY CHANGING THE OPTICAL PROPERTIES OF THE MEDIUM OF THE DEVICES OR ARRANGEMENTS FOR THE CONTROL OF THE INTENSITY, COLOUR, PHASE, POLARISATION OR DIRECTION OF LIGHT, e.g. SWITCHING, GATING, MODULATING OR DEMODULATING; TECHNIQUES OR PROCEDURES FOR THE OPERATION THEREOF; FREQUENCY-CHANGING; NON-LINEAR OPTICS; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating, or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating, or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating, or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F2001/136218Shield electrode

Abstract

The invention provides an array substrate and a manufacturing method therefor, and a display device, and relates to the display technical field. The array substrate includes: a substrate body which is provided with a plurality of data lines and a plurality of scanning lines which are arranged in a cross-shaped manner; a plurality of common electrode lines, wherein one common electrode line is arranged between two adjacent scanning lines; active components which are arranged in crossed zones formed by the plurality of data lines and the plurality of scanning lines; pixel electrodes which form a plurality of pixel electrode units which are arranged repeatedly with each crossed zone as a center, wherein the plurality of pixel electrode units are electrically connected to the active components through first contact holes; and transparent electrodes which form a plurality of transparent electrode units which are arranged repeatedly in the zones defined by the plurality of data lines and the plurality of scanning lines, wherein the transparent electrode units are electrically connected to the common electrode lines. The invention also discloses the manufacturing method for the array substrate.

Description

Array base palte and manufacture method, display device

Technical field

The present invention relates to Display Technique field, particularly to a kind of array base palte with high transmission rate and manufacture method, Display device.

Background technology

Vertical electric field type liquid crystal display mode is most basic liquid crystal display mode, including TN (Twisted Nematic, Twisted nematic), the liquid crystal display mode such as VA (Vertical Alignment, vertical orientation).TN panel in the market It is mostly that the TN+film, film of modified form i.e. compensates film, for making up the deficiency of TN panel visible angle, the TN face of improvement at present The visible angle of plate all reaches 160 °.VA class panel is the panel type that the application of present advanced liquid crystal is more, belongs to wide viewing angle face Plate.VA class panel be divided into again MVA (Multi-domain Vertical Alignment, many quadrants vertical orientation technology) panel, PVA (Patterned Vertical Alignment) panel, PSVA (Polymer Stabilization Vertical Alignment, polymer stabilizing vertical orientation) panel, UV2A (UV Vertical Alignment, UV light vertical orientation) face Plate, etc..

The dot structure of vertical electric field type liquid crystal display mode is divided into the dot structure of TFT side and the dot structure two of CF side Part.The dot structure of TFT side mainly realizes the electrical functions of TFT-LCD, is to determine that pixel capacitance effect, orientation postpone effect Should, gray scale voltage write diagnostics and the main aspect of retention performance.The dot structure of CF side mainly realizes the optics merit of TFT-LCD Can, it is to determine TFT-LCD contrast and the main aspect in colourity territory.

The dot structure of TFT side typically uses Cs on COM structure.The feature of Cs on COM structure is that pixel electrode covers Cover on metal public electrode wire, form storage electric capacity.The position of public electrode wire can be in the both sides up and down of pixel, it is also possible to Central authorities in pixel.The structure of data wire both sides of extending to public electrode wire plays the effect of shading.Pixel electrode and common electrical The region of polar curve overlap is exactly the storage capacity area of pixel.

The pixel of CF side generally comprises the structures such as black matrix" BM, RGB color resistance, spacer, public electrode.CF side pixel Structure is mainly made up of optical filtering and shading two parts: filtering structure is made up of RGB color layer, and light-shielding structure is made up of black matrix". The design key of CF side dot structure is the shading size holding black matrix", and RGB color layer and black matrix" light shield layer Lap.The design of black matrix" light-shielding structure, it is therefore an objective to occur that light leak is existing after CF substrate to be prevented and TFT substrate laminating skew As.If the Anawgy accuracy of CF and TFT substrate is 6um, then the shading line segment of public electrode wire is near the limit of data wire side And black matrix" distance between the limit of chromatograph side at least to ensure at more than 6um.The existence of this design rule, makes The actual aperture rate obtaining pixel is the lowest, reduces the light utilization ratio of pixel.

In order to improve the light utilization ratio of pixel, a kind of way is as FFS (Fringe Field Switching, edge Electric field switchs) like that metal public electrode wire is replaced by transparency electrode.FFS needs in the lower section of scan line layer by together ITO-PR technique, the bottom in each pixel forms the COM electrode of planar distribution.The scan line of FFS pixel, data wire and TFT With other, the function of switch shows that patterns are common, be to bottom with scan line with the major function of the fine strip shape metal COM line of layer Planar COM electrode provides stable COM voltage, and pixel electrode connects in surrounding ring-type, TFT switch is powered.Top layer The ITO pattern of the ITO pattern and bottom connection COM voltage that connect pixel voltage overlaps to form the storage electric capacity Cs of pixel.

Use for reference the method for designing of the transparent underlayer planar COM electrode of FFS, can be in vertical orientation type liquid crystal such as TN, VA Show importing transparent underlayer planar COM electrode in pattern, promote the light utilization ratio of pixel.

Summary of the invention

Patent of the present invention technical problem to be solved be to provide the transparent liquid crystal display of a kind of high transmission rate and The manufacture method of array base palte.

In order to reach above-mentioned or other purpose, one aspect of the present invention proposes the array base palte of a kind of liquid crystal indicator, Including: a substrate, it is provided with the plural data line in cross arranged crosswise and plural number bar scan line;Plural number bar public electrode Line, this public electrode wire is arranged between two adjacent scan lines;Active member, is arranged on this plural number data line multiple with this The cross intersection region of several scan lines;Pixel electrode, is formed a plurality of centered by each this cross intersection region The pixel electrode unit of repeated arrangement, and be electrically connected with this active member by one first contact hole;Transparency electrode, multiple at this In the region that several data wires and this plural number bar scan line limit, forming the transparency electrode unit of a plurality of repeated arrangement, this is saturating Prescribed electrode unit is electrically connected with this public electrode wire.

Further, this transparency electrode has on the direction vertical with this array base palte with this pixel electrode and partly overlaps Region, this overlapping region forms storage capacitor.

Further, it is provided with spacing distance between the pixel electrode unit of these a plurality of repeated arrangement.

Further, in the region that two adjacent data wires and two adjacent scan lines limit, a transparency electrode list is formed Unit, the surrounding border of this transparency electrode unit and this two adjacent data wire and this two adjacent scan line spacings certain away from From.

Further, this transparency electrode is dispensed directly onto the top of public electrode wire or the lower section of public electrode wire.

Further, this transparency electrode is distributed in the top of public electrode wire or public electrode wire across dielectric Lower section, is electrically connected with this public electrode wire by one second contact hole.

Further, this transparency electrode material use tin dope three Indium sesquioxide., aluminium-doped zinc oxide, nano-silver thread or Person's Graphene.

In order to reach above-mentioned or other purpose, another aspect of the invention proposes a kind of liquid crystal indicator, including: above-mentioned Array base palte;Counter substrate, is oppositely arranged with this array base palte;Liquid crystal layer, be interposed in this array base palte and this counter substrate it Between;Also include public electrode, be distributed in this counter substrate in face electrode pattern;Wherein, this public electrode and this transparency electrode Apply same potential voltage simultaneously.

In order to reach above-mentioned or other purpose, another aspect of the present invention proposes the array base palte of a kind of liquid crystal indicator Manufacture method, comprise the following steps: provide array basal plate, formed transparency electrode;Form first layer metal Thinfilm pattern, should First layer metal Thinfilm pattern includes plural number bar scan line, public electrode wire, and this public electrode wire is arranged in two adjacent scannings Between line, and this public electrode wire covers in the surface of this transparency electrode;The pattern of this first metal layer is formed grid Pole insulating barrier, forms semiconductor pattern above this gate insulator;On this semiconductor pattern, form second layer metal thin Film figure, this second layer metal Thinfilm pattern includes plural number data line, this plural number data line and this plural number bar scan line in Cross arranged crosswise;Also include the drain electrode of thin film transistor (TFT);This second layer metal Thinfilm pattern is distributed insulating barrier, at this Being distributed pixel electrode on insulating barrier, this pixel electrode is with ten between each this plural number data line and this plural number bar scan line Centered by font intersection region, forming the pixel electrode unit of a plurality of repeated arrangement, this pixel electrode unit is by running through this One contact hole of insulating barrier is electrically connected with drain electrode realization;Wherein, limit at this plural number data line and this plural number bar scan line Region in, form the transparency electrode unit of a plurality of repeated arrangement, this transparency electrode unit electrically connects with this public electrode wire Connect.

In order to reach above-mentioned or other purpose, further aspect of the present invention proposes the array base palte of a kind of liquid crystal indicator Manufacture method, comprise the following steps: provide array basal plate, formed first layer metal Thinfilm pattern, this first layer metal is thin Film figure includes plural number bar scan line, public electrode wire, and this public electrode wire is arranged between two adjacent scan lines;Formed thoroughly Prescribed electrode, and the covering of this transparency electrode is in the surface of this public electrode wire;Form gate insulator, at this gate insulator Top formed semiconductor pattern;On this semiconductor pattern, form second layer metal Thinfilm pattern, this second layer metal thin film Pattern includes plural number data line, and this plural number data line and this plural number bar scan line are cross arranged crosswise;Also include thin The drain electrode of film transistor;This second layer metal Thinfilm pattern is distributed insulating barrier, is distributed pixel electrode on which insulating layer, should Pixel electrode is centered by the cross intersection region between each this plural number data line and this plural number bar scan line, is formed The pixel electrode unit of a plurality of repeated arrangement, this pixel electrode unit is real with drain electrode by the contact hole running through this insulating barrier Now it is electrically connected;Wherein, in the region that this plural number data line and this plural number bar scan line limit, form a plurality of repetition and arrange The transparency electrode unit of row, this transparency electrode unit is electrically connected with this public electrode wire.

The present invention compared with prior art, has an advantage in that: the metal wire area of use is little, the metal interference shadow to light Ring and reduce;The aperture opening ratio of pixel improves, and the utilization ratio of light is high.

Accompanying drawing explanation

Fig. 1 is for schematically showing array base palte side of the present invention dot structure floor map;

Fig. 2 is for schematically showing array base palte side plane structure schematic diagram in Fig. 1 of the present invention;

Fig. 3 A is for schematically showing array base palte side of the present invention dot structure floor map;

Fig. 3 B is to schematically show dot structure cross-sectional view along AA ' direction in Fig. 3 A of the present invention;

Fig. 4 is to schematically show the storage capacitor structures schematic diagram shown in Fig. 3 B;

Fig. 5 is for schematically showing liquid crystal indicator cross-sectional view of the present invention;

Fig. 6 is for schematically showing liquid crystal indicator counter substrate planar structure schematic diagram of the present invention;

Fig. 7 descends cross-sectional view in working order for schematically showing liquid crystal indicator of the present invention;

Fig. 8 A~8E is for schematically showing array base palte difference making step planar structure schematic diagram of the present invention.

Detailed description of the invention

Below in conjunction with the accompanying drawings and specific embodiment, it is further elucidated with the present invention, it should be understood that these embodiments are merely to illustrate The present invention rather than limit the scope of the present invention, after having read the present invention, each to the present invention of those skilled in the art The amendment planting the equivalent form of value all falls within the application claims limited range.

Fig. 1 is for schematically showing array base palte side of the present invention dot structure floor map.As it is shown in figure 1, the present invention carries Supply the dot structure of a kind of array base palte, including: scan line 101, public electrode wire 102, transparency electrode 103, semiconductor layer 104, data wire 105, source electrode (data wire), drain electrode the 106, first contact hole 107, pixel electrode 108.

As it is shown in figure 1, scan line 101 and data wire 105 are entreated in cross arranged crosswise within the pixel, this public electrode Line 102 is arranged between two adjacent scan lines 101, is provided with at the cross intersection region of scan line 101 at data wire 105 Thin film transistor (TFT).The grid of thin film transistor (TFT) is scan line 101 pattern, source of thin film transistor (TFT) at this cross intersection region Extremely data wire 105 pattern at this cross intersection region, and the drain electrode 106 of thin film transistor (TFT), the ditch of thin film transistor (TFT) Road 104.Thin film transistor (TFT) drain electrode 106 be arranged over contact hole 107, pixel electrode 108 covers contact hole 107 and pixel electrode 108 realize equipotential link.Transparency electrode 103, in the region that this data wire 105 and this scan line 101 limit.Pixel electrode 108 is overlapping in the direction upper part vertical with this array base palte with transparency electrode 103, forms storage capacitor.This transparency electrode 103 are electrically connected with accordingly one this public electrode wire 102.The voltage of transparency electrode 103 passes through public electrode wire 102 from display Import outside screen.

Fig. 2 is for schematically showing array base palte side plane structure schematic diagram in Fig. 1 of the present invention.As in figure 2 it is shown, the present invention carries Having supplied a kind of array base palte, including the dot structure described in a plurality of Fig. 3, pixel electrode 108, with each this cross intersection The pixel electrode unit of a plurality of repeated arrangement it is formed with centered by region, and by one first contact hole and this active member electricity Property connect;Transparency electrode 103, in the region that this plural number data line 105 and this plural number bar scan line 101 limit, is formed multiple The transparency electrode unit of several repeated arrangement, this transparency electrode unit is electrically connected with this public electrode wire 102.

Gap, left and right S1, upper and lower gap S2 is there is between the pixel electrode unit of neighbor.Gap S1 and S2 is the least, as The light utilization ratio of element is the highest.The factor limiting S1 with S2 size includes: the exposure accuracy of exposure machine;Adjacent pixel electrodes voltage Between interference strength.Typically, gap S1 and S2 is at about 5um.

Transparency electrode 103 is distributed in the region surrounded by scan line 101 and data wire 105.Transparency electrode 103 is in left side And data wire 105 keeps interval L1, keep interval L3 on right side and data wire 105;Transparency electrode 103 is protected with scan line in upside Hold interval L2, keep interval L4 in downside and scan line 101.The current potential of transparency electrode 103 passes through public electrode wire 102 from display Input outside device.In fig. 2, pixel electrode 108 partly overlaps with transparency electrode 103, forms the storage capacitor Cs of pixel.

In the dot structure that the present invention provides, transparency electrode 103 is transparent conductive film, mainly has metal film system, oxidation Thing film system, other compound film systems, polymeric membrane system, compound film system etc..Specifically there are ITO (tin dope three Indium sesquioxide .), AZO (aluminium-doped zinc oxide), nano-silver thread, Graphene etc..Preferably, ITO material is used.

In the dot structure shown in Fig. 1, transparency electrode 103 can be distributed in the top of scan line layer, i.e. public electrode The top of line 102;The lower section of scan line layer, the i.e. lower section of public electrode wire 102 can also be distributed in.This transparency electrode can be led to Cross and directly cover this public electrode wire, it is achieved be electrically connected with.Selectively, this transparency electrode is across transparent dielectric distribution Above public electrode wire or the lower section of public electrode wire, public with this through this dielectric by one second contact hole Electrode wires electrically connects.

Fig. 3 A is for schematically showing array base palte side of the present invention dot structure floor map;Fig. 3 B is for schematically showing this Dot structure cross-sectional view along AA ' direction in invention Fig. 3 A.In conjunction with Fig. 3 A, 3B, in pixel A A ' cross section in direction Figure, corresponding hierarchical relationship is: distributing transparent electrode 103 above the underlay substrate such as glass, plastics 111, at this transparent electrical The top distribution scan line 101 of pole 103 and public electrode wire 102, be distributed above scan line 101 and public electrode wire 102 Gate insulator 112, is distributed semiconductor layer 104, distribution number above semiconductor layer 104 above gate insulator 112 According to line (source electrode) 105 and drain electrode 106, distribution protection insulating barrier 113 above data wire 105, protecting the upper of insulating barrier 113 Side's distribution insulating thick film layer 114, is distributed pixel electrode 108 above insulating thick film layer 114, and pixel electrode 108 is by running through The contact hole 107 of insulating thick film layer 114 and protection insulating barrier 113 is electrically connected with drain electrode 106 realization.According to actual needs, may be used To omit protection insulating barrier 113.

In conjunction with in the section structure shown in Fig. 2, Fig. 3 A, 3B, public electrode wire 102 directly covers and this square transparency electrode 103 realize being electrically connected, and this scan line 101 maintains a certain distance L2/L4 with this transparency electrode 103.

In conjunction with Fig. 1 and Fig. 3 A, 3B, Fig. 4, the storage electric capacity that pixel electrode and square transparency electrode are formed in overlapping region Cs.Because pixel electrode and transparency electrode are all transparent conductive films, the region of lap is still that transmission region, such Structure design can improve the light utilization ratio of pixel.

The above embodiment of the present invention uses square transparency electrode and is positioned at the distribution mode above public electrode wire, this Bright another embodiment proposes again a kind of array base palte, roughly the same with the structure of above-described embodiment, differs only in transparency electrode It is positioned at above public electrode wire.

Fig. 5 is for schematically showing liquid crystal indicator cross-sectional view of the present invention.As it is shown in figure 5, the present invention also carries Supply a kind of liquid crystal indicator, including: the respective embodiments described above and the array base palte 100 of corresponding each embodiment, opposed base Plate 200, and it is located in the liquid crystal functional layer 300 between this array base palte 100 and this counter substrate 200.

Fig. 6 is for schematically showing liquid crystal indicator counter substrate planar structure schematic diagram of the present invention.As shown in Figure 6, should The counter substrate 200 that liquid crystal display device uses, including underlay substrate 211 (not shown), public electrode 201, light-shielding pattern 202, spacer 203.As required, it is convenient to omit light-shielding pattern 202.In the figure 7, at counter substrate 200 and array base palte 100 Between be liquid crystal functional layer 300, including counter substrate side alignment film 303, liquid crystal 301, array base palte side alignment film 302.

This liquid crystal display device use counter substrate 200 structure as shown in Figure 6, including underlay substrate 211 (in figure not Show), public electrode 201, light-shielding pattern 202, spacer 203.As required, it is convenient to omit light-shielding pattern 202.As required, Redness, green, blue isochrome resistance layer can be used.

As it is shown in figure 5, transparency electrode 103 and the public electrode 201 in counter substrate, current potential is fixed, not with pixel voltage Change and change.Preferably, transparency electrode 103 is equal with the current potential of the public electrode 201 in counter substrate.At gap S1 and S2 region, owing to the potential difference between transparency electrode 103 and public electrode 201 is 0, is positioned at the Liquid Crystal Molecules Alignment shape in this region State is fixed, and does not changes with the change of pixel voltage, and the state of liquid crystal molecule is controlled.Even if as it is shown in fig. 7, at pixel electrode Applying various different current potential between 108 from public electrode 201, at gap S1 and the liquid crystal molecule in S2 region, ordered state is all It is fixing.

For using UV2The liquid crystal display mode of A technology, in order to block gap S1 and the transmitted light in S2 region, often Under black pattern, the potential difference between the square transparency electrode on array base palte and the public electrode in counter substrate is set to 0, often One high voltage is set between the square transparency electrode on array base palte and the public electrode in counter substrate under white mode, typically More than 5V.

The invention provides the manufacture method of array base palte, as a example by the section structure shown in Fig. 3, be given shown in Fig. 2 The Making programme of the different layers of dot structure:

First, as shown in Figure 8 A, square transparency electrode 103 pattern it is initially formed on the transparent substrate.

Then, as shown in Figure 8 B, above square transparency electrode 103, scan line 101, public electrode wire are directly formed 102.Public electrode wire 102 is directly covered in the top of square transparency electrode 103.Square transparency electrode 103 and the scanning of upside Line keeps interval L2, and the scan line of downside keeps interval L4.

Then, as shown in Figure 8 C, above scan line, form gate insulator, above gate insulator, form quasiconductor Raceway groove 104 pattern.

Then, as in fig. 8d, above semiconductor channel 104, data wire (source electrode) 105 pattern and drain electrode 106 are formed Pattern.The data wire in square transparency electrode 103 and left side keeps interval L1, and the data wire on right side keeps interval L2.

Then, as illustrated in fig. 8e, side's successively covering protection insulating barrier and insulating thick film layer on the data line, in drain electrode 106 Top by etching formed contact hole 106 pattern, form pixel electrode 108 pattern the most again, eventually form the basic of pixel Structure, as shown in Figure 1.

Further aspect of the present invention proposes the manufacture method of the array base palte of a kind of liquid crystal indicator, including following step Rapid: array basal plate is provided, form first layer metal Thinfilm pattern, this first layer metal Thinfilm pattern includes plural number bar scanning Line, public electrode wire, this public electrode wire is arranged between two adjacent scan lines;Form transparency electrode, and this transparency electrode Cover in the surface of this public electrode wire;Form gate insulator, above this gate insulator, form quasiconductor figure Case;On this semiconductor pattern, forming second layer metal Thinfilm pattern, this second layer metal Thinfilm pattern includes plural number data Line, this plural number data line and this plural number bar scan line are cross arranged crosswise;Also include the drain electrode of thin film transistor (TFT);At this Being distributed insulating barrier on second layer metal Thinfilm pattern, be distributed pixel electrode on which insulating layer, this pixel electrode is should with each Centered by cross intersection region between plural number data line and this plural number bar scan line, form the picture of a plurality of repeated arrangement Element electrode unit, this pixel electrode unit is electrically connected with drain electrode realization by running through a contact hole of this insulating barrier;Wherein, exist In the region that this plural number data line and this plural number bar scan line limit, form the transparency electrode unit of a plurality of repeated arrangement, This transparency electrode unit is electrically connected with this public electrode wire.

The dot structure that patent of the present invention proposes, has a following features:

(1) metal wire is less but also carefully: only scan line, public electrode wire and data wire three metal line.Metal wire is few, gold Belong to shading the least with reflective impact.Across protective layer with thick between scan line, public electrode wire, data wire and pixel electrode Film layer, the coupling electric capacity between pixel is little, and it is the thinnest that metal wire can do.Metal wire is thin, and metal shading is with reflective impact just Little.

(2) LCDs is in order to reduce flicker, and the voltage using some reversion drive pattern, i.e. neighbor is positive and negative Opposite polarity.The planar public electrode of patent of the present invention is distributed in the lower section of adjacent four pixels, serves shielding neighbor Power line interference between electrode, it is ensured that the liquid crystal between pixel electrode is interference-free.

(3) for using UV2The liquid crystal display mode of A technology, scan line is exactly that liquid crystal display farmland is with adjacent with data wire Demarcation line between liquid crystal display farmland, the black stricture of vagina between display farmland is dispensed directly onto above metal wire, the most additionally takies light tight Region, the light utilization ratio of pixel is high.

(4) for using in the VA Display Technique of normally black mode, the transparency electrode on array base palte and counter substrate Potential difference between public electrode is set to 0, in gap S1 and S2 region, and the black state that liquid crystal display is stable, such that it is able between Sheng Lveing The black matrix" in counter substrate directly over gap S1 and S2.Use technical scheme, transparency electrode and pixel electrode Between overlapping area abundant, the electric lines of force of pixel electrode focuses primarily upon between pixel electrode and transparency electrode, is dispersed into picture Electric lines of force outside element electrode is few, and the disturbance to gap S1 and the liquid crystal in S2 region is faint, can solve pixel electrode voltage (electricity The line of force) leakage problem of gap S1 and S2 that causes of disturbance.

(5) for using in the VA Display Technique of normal white mode, the transparency electrode on array base palte and counter substrate Potential difference between public electrode is set to 6V, in gap S1 and S2 region, and the black state that liquid crystal display is stable, such that it is able between Sheng Lveing The black matrix" in counter substrate directly over gap S1 and S2.Use technical scheme, transparency electrode and pixel electrode Between overlapping area abundant, the electric lines of force of pixel electrode focuses primarily upon between pixel electrode and transparency electrode, is dispersed into picture Electric lines of force outside element electrode is few, and the disturbance to gap S1 and the liquid crystal in S2 region is faint, can solve pixel electrode voltage (electricity The line of force) leakage problem of gap S1 and S2 that causes of disturbance.

The preferred embodiment of the present invention described in detail above, but, the present invention is not limited in above-mentioned embodiment Detail, in the technology concept of the present invention, technical scheme can be carried out multiple equivalents, this A little equivalents belong to protection scope of the present invention.

It is further to note that each the concrete technical characteristic described in above-mentioned detailed description of the invention, at not lance In the case of shield, can be combined by any suitable means.In order to avoid unnecessary repetition, the present invention to various can The compound mode of energy illustrates the most separately.

Claims (10)

1. an array base palte for liquid crystal indicator, including:
One substrate, is provided with the plural data line in cross arranged crosswise and plural number bar scan line;
Plural number bar public electrode wire, this public electrode wire is arranged between two adjacent scan lines;
Active member, is arranged on the cross intersection region of this plural number data line and this plural number bar scan line;
Pixel electrode, is formed with the pixel electrode unit of a plurality of repeated arrangement centered by each this cross intersection region, And be electrically connected with this active member by one first contact hole;
Transparency electrode, in the region that this plural number data line and this plural number bar scan line limit, forms a plurality of repeated arrangement Transparency electrode unit, this transparency electrode unit and this public electrode wire are electrically connected with.
Array base palte the most according to claim 1, it is characterised in that also include: this transparency electrode and this pixel electrode exist Having, on the direction vertical with this array base palte, the region that partly overlaps, this overlapping region forms storage capacitor.
Array base palte the most according to claim 2, it is characterised in that also include: the pixel electricity of these a plurality of repeated arrangement Spacing distance it is provided with between pole unit.
Array base palte the most according to claim 2, it is characterised in that also include: two adjacent data wires and two adjacent In the region that scan line limits, forming a transparency electrode unit, the surrounding border of this transparency electrode unit is two adjacent with this Data wire and this two adjacent scan line spacings a certain distance.
Array base palte the most according to claim 1, it is characterised in that this transparency electrode is dispensed directly onto public electrode wire Top or the lower section of public electrode wire.
Array base palte the most according to claim 1, it is characterised in that this transparency electrode is distributed in public across dielectric The top of electrode wires or the lower section of public electrode wire, electrically connected with this public electrode wire by one second contact hole.
7. according to the array base palte described in any one of claim 1-6, it is characterised in that the material of this transparency electrode uses stannum to mix Miscellaneous three Indium sesquioxide .s, aluminium-doped zinc oxide, nano-silver thread or Graphene.
8. a liquid crystal indicator, including:
Array base palte as described in claim 1-7;
Counter substrate, is oppositely arranged with this array base palte;
Liquid crystal layer, is interposed between this array base palte and this counter substrate;
Also include public electrode, be distributed in this counter substrate in face electrode pattern;
Wherein, this public electrode and this transparency electrode apply same potential voltage simultaneously.
9. a manufacture method for the array base palte of liquid crystal indicator, comprises the following steps:
Array basal plate is provided, forms transparency electrode;
Forming first layer metal Thinfilm pattern, this first layer metal Thinfilm pattern includes plural number bar scan line, public electrode wire, should Public electrode wire is arranged between two adjacent scan lines, and this public electrode wire covers in the surface of this transparency electrode;
The pattern of this first metal layer is formed gate insulator, above this gate insulator, forms semiconductor pattern;
On this semiconductor pattern, forming second layer metal Thinfilm pattern, this second layer metal Thinfilm pattern includes plural number bar number According to line, this plural number data line and this plural number bar scan line are cross arranged crosswise;Also include the drain electrode of thin film transistor (TFT);
Being distributed insulating barrier on this second layer metal Thinfilm pattern, be distributed pixel electrode on which insulating layer, this pixel electrode is Centered by the cross intersection region between each this plural number data line and this plural number bar scan line, form a plurality of repetition The pixel electrode unit of arrangement, this pixel electrode unit realizes electricity even by running through a contact hole of this insulating barrier with drain electrode Connect;
Wherein, in the region that this plural number data line and this plural number bar scan line limit, the saturating of a plurality of repeated arrangement is formed Prescribed electrode unit, this transparency electrode unit is electrically connected with this public electrode wire.
10. a manufacture method for the array base palte of liquid crystal indicator, comprises the following steps:
Thering is provided array basal plate, form first layer metal Thinfilm pattern, this first layer metal Thinfilm pattern includes plural number bar scanning Line, public electrode wire, this public electrode wire is arranged between two adjacent scan lines;
Form transparency electrode, and this transparency electrode covers in the surface of this public electrode wire;
Form gate insulator, above this gate insulator, form semiconductor pattern;
On this semiconductor pattern, forming second layer metal Thinfilm pattern, this second layer metal Thinfilm pattern includes plural number bar number According to line, this plural number data line and this plural number bar scan line are cross arranged crosswise;Also include the drain electrode of thin film transistor (TFT);
Being distributed insulating barrier on this second layer metal Thinfilm pattern, be distributed pixel electrode on which insulating layer, this pixel electrode is Centered by the cross intersection region between each this plural number data line and this plural number bar scan line, form a plurality of repetition The pixel electrode unit of arrangement, this pixel electrode unit realizes electricity even by running through a contact hole of this insulating barrier with drain electrode Connect;
Wherein, in the region that this plural number data line and this plural number bar scan line limit, the saturating of a plurality of repeated arrangement is formed Prescribed electrode unit, this transparency electrode unit is electrically connected with this public electrode wire.
CN201610454741.6A 2016-06-21 2016-06-21 Array substrate and manufacturing method therefor, and display device CN106054476A (en)

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CN105223749A (en) * 2015-10-10 2016-01-06 京东方科技集团股份有限公司 Array base palte and preparation method thereof, display device
CN105487300A (en) * 2016-01-27 2016-04-13 京东方科技集团股份有限公司 Pixel unit, array substrate and manufacturing method of array substrate
CN205787507U (en) * 2016-06-21 2016-12-07 上海纪显电子科技有限公司 Display device and array base palte

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Publication number Priority date Publication date Assignee Title
US20120307172A1 (en) * 2010-02-04 2012-12-06 Sharp Kabushiki Kaisha Liquid-crystal display device
JP2013148902A (en) * 2012-01-20 2013-08-01 Innolux Display Corp Pixel structure and electronic apparatus using the same
CN102651371A (en) * 2012-04-06 2012-08-29 北京京东方光电科技有限公司 Array substrate and manufacturing method and display device thereof
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