JP5617319B2 - Display device and electronic device - Google Patents

Description

  The present invention relates to a display device including a pixel circuit (also referred to as a pixel) including a display element (also referred to as an electro-optical element), an electronic apparatus including the display device, and a method for driving the display device. More specifically, the present invention relates to a technique for reducing the wiring resistance (sheet resistance) of an electrode on the display surface side when a top emission method in which display light is emitted from the display surface opposite to a support substrate is adopted.

  As a display element of a pixel, there is a display device using an electro-optical element whose luminance changes depending on an applied voltage or a flowing current. For example, a liquid crystal display element is a typical example of an electro-optical element whose luminance changes depending on an applied voltage, and an organic electroluminescence (Organic Electro Luminescence, Organic EL, Organic) (Light Emitting Diode, OLED; hereinafter referred to as “organic EL”) A typical example is an element. The organic EL display device using the latter organic EL element is a so-called self-luminous display device using an electro-optic element which is a self-luminous element as a pixel display element.

  By the way, in a display device using an electro-optic element, a simple (passive) matrix method and an active matrix method can be adopted as the driving method. However, a simple matrix display device has problems such as a simple structure and a difficulty in realizing a large and high-definition display device.

  Therefore, in recent years, a pixel signal supplied to a light emitting element in a pixel has been converted into an active element, for example, an insulated gate field effect transistor (generally a thin film transistor (TFT)) as a switching transistor. Active matrix systems that are used and controlled have been actively developed.

  When performing display with an electro-optical element, there are two methods for extracting the display light of the electro-optical element to the outside: a bottom emission method for extracting from the support substrate side, and a top emission method for extracting from the display surface facing the support substrate. (See Patent Document 1).

JP 2002-318556 A

  In the bottom emission type display device, the circuit member on the support substrate hinders the display light, and there is a difficulty in the aperture ratio. In particular, when an active matrix method is employed, since a circuit such as a thin film transistor that blocks transmission of display light is disposed on the support substrate, it is difficult to ensure a sufficient aperture ratio. Improvement is an issue.

  On the other hand, since the display device of the top emission method takes out display light from the display surface side facing the support substrate, the aperture ratio can be determined without being restricted by the circuit member arranged on the support substrate side, so that it is high. Light utilization efficiency can be ensured.

  However, in the top emission method, it is necessary to use a light-transmitting conductive film for the electrode on the light extraction side. In general, a light-transmitting conductive material has a higher resistivity than a normal metal material. For this reason, the electrode voltage may become non-uniform within the screen surface of the electrode on the light extraction side, causing a problem of degrading display quality.

  With respect to this problem, in Patent Document 1, in order to reduce the sheet resistance of the electrode on the display surface side, auxiliary wiring is provided in the wiring layer separately from the electrode on the display surface side, and this auxiliary wiring is connected to the electrode on the display surface side. A mechanism for reducing the resistance of the electrode on the display surface side by electrical connection has been proposed.

  However, as the definition and size increase progress, even if the technique of Patent Document 1 is adopted, it is difficult to achieve a sufficiently low resistance, and there is still a problem of deterioration in display quality.

  The present invention has been made in view of the above-described present situation, and when adopting the top emission method, the display unevenness in the display surface due to the large wiring resistance of the light transmissive upper electrode can be reduced. The purpose is to provide a simple mechanism.

  The present invention first includes a display panel unit in which electro-optic elements that emit display light are arranged in a matrix on a support substrate. The display panel section typically includes a drive transistor that generates a drive signal, an electro-optic element connected to the output terminal of the drive transistor, a storage capacitor that holds information according to the signal amplitude of the video signal, and a signal amplitude. Pixel circuits having sampling transistors for writing corresponding information to the storage capacitor are arranged in a matrix.

  The present invention employs a top emission method in which a light transmissive electrode is formed on the display surface side of the display panel unit, and display light is emitted through the light transmissive electrode. In adopting the top emission method, in the present invention, a conductive substrate is used as the support substrate, and the conductive support substrate is electrically connected to the light transmissive electrode. As a result, in terms of electrical circuit, the conductive support substrate functions as a parallel wiring with respect to the light transmissive electrode. Overall, the electrode on the reference terminal side of the electro-optic element (parallel connection) The wiring resistance of each electrode) is reduced.

  According to one embodiment of the present invention, when the top emission method is employed, the wiring resistance of the electrode on the reference terminal side of the electro-optic element can be reduced, so that display unevenness in the display surface can be reduced.

It is a block diagram which shows the outline of the display apparatus of a COG mounting structure. It is a block diagram which shows the outline of the display apparatus of a peripheral circuit panel outside arrangement structure. It is a figure explaining the pixel circuit of this embodiment. It is a figure explaining the whole outline | summary of the mounting example of a pixel array part. It is a layout figure of the 1st example of the lower electrode of an organic EL element, and auxiliary wiring. It is a layout figure of the 2nd example of the lower electrode and auxiliary wiring of an organic EL element. It is a top view of the electrode structure for 1 pixel in a general organic electroluminescence display. It is sectional drawing of the electrode structure for 1 pixel in a general organic EL display apparatus. It is explanatory drawing of the layer structure of the 1st example for connecting a support substrate and an upper electrode. It is explanatory drawing of the layer structure of the 2nd example for connecting a support substrate and an upper electrode. It is explanatory drawing of the layer structure of the 3rd example for connecting a support substrate and an upper electrode. It is explanatory drawing of the layer structure of the 4th example for connecting a support substrate and an upper electrode. It is a figure (the 1) which shows an example of the electronic device to which this embodiment is applied. It is FIG. (2) which shows an example of the electronic device to which this embodiment is applied. It is FIG. (3) which shows an example of the electronic device to which this embodiment is applied.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. When distinguishing each functional element according to the embodiment, an uppercase English reference such as A, B,... Is added and described, and when not particularly described, this reference is omitted. To be described. The same applies to the drawings.

The description will be made in the following order.
1. Basic concepts (Outline of display device, basics of pixel driving, low resistance of cathode wiring)
2. 2. Overall overview of display device Pixel circuit Problems and countermeasures for cathode wiring (overall outline of mounting example, layout of auxiliary wiring, electrode layer structure, cathode contact (first to fourth examples))
5. Electronics

<Basic concept>
[Outline of display device]
First, an outline of a display device including an electro-optic element will be described. The display device includes a plurality of pixels. Each pixel includes a light emitting element (an example of an electro-optical element) including a light emitting unit and a driving circuit thereof. As the light emitting part, for example, an organic electroluminescence light emitting part, an inorganic electroluminescence light emitting part, an LED light emitting part, a semiconductor laser light emitting part, or the like can be used.

  In the example described below, the light emitting element includes an organic electroluminescence light emitting unit. More specifically, the light emitting element is an organic electroluminescent element (organic EL element) having a structure in which organic electroluminescent light emitting parts (light emitting parts ELP) connected to a drive circuit are stacked. The light emitting portion of the organic EL element has a known configuration and structure such as an anode electrode, a hole transport layer, a light emitting layer, an electron transport layer, and a cathode electrode.

  The display device includes at least a horizontal driving unit (signal output circuit) that supplies a signal potential to the pixel circuit P, a writing scanning unit that performs scanning to supply the signal potential supplied from the horizontal driving unit to the gate of the driving transistor, A pixel array unit in which the pixel circuits P are arranged is provided.

  The number of pixel array sections is H in the first direction (for example, the horizontal direction), and in a second direction different from the first direction (specifically, a direction orthogonal to the first direction, for example, the vertical direction). V, a total of H × V light-emitting elements arranged in a two-dimensional matrix, V write scan lines connected to the write scan unit and extending in the first direction, and connected to the horizontal drive unit and second H video signal lines (data lines) extending in the direction are provided. The configurations and structures of the horizontal driving unit, the writing scanning unit, and the pixel array unit can be a known configuration and structure.

  There are various circuits as drive circuits (pixel circuits) for driving a light emitting unit (light emitting element). For example, as a known circuit, a drive circuit basically composed of 5 transistors / 1 capacitor section (5Tr / 1C drive circuit), a drive circuit basically composed of 4 transistors / 1 capacitor section (4Tr / 1C). Driving circuit) A driving circuit basically composed of 3 transistors / 1 capacitor section (3Tr / 1C driving circuit) and a driving circuit basically composed of 2 transistors / 1 capacitor section (2Tr / 1C driving circuit) is there.

  As a minimum structure, the transistor includes a driving transistor that drives the light emitting element and a sampling transistor (writing transistor) that is switched by a writing scanning unit. In the present embodiment, the capacitor is connected between the gate and the source of the driving transistor in order to realize the bootstrap function.

  The connection point of the gate of the driving transistor, the source / drain region of the sampling transistor, and one terminal of the capacitor is defined as the first node, and the connection point of the source of the driving transistor, one terminal of the light emitting element, and the other terminal of the capacitor. Let it be the second node.

  When color display is supported, typically, one pixel circuit includes three subpixels (a red light emitting subpixel that emits red light, a green light emitting subpixel that emits green light, and a blue light emitting subpixel that emits blue light). Consists of.

[Basics of pixel driving]
In the following description, it is assumed that the light-emitting elements constituting each pixel are line-sequentially driven and the display frame rate is FR (times / second). That is, (V / 3) pixels arranged in the v-th row (where v = 1, 2, 3,..., V), more specifically, each of V sub-pixels are configured. The light emitting elements are driven simultaneously. In other words, in each light-emitting element constituting one row, the timing of light emission / non-light emission is controlled in units of rows to which they belong. Note that the process of writing the video signal for each pixel constituting one row may be a process of simultaneously writing the video signal for all the pixels (hereinafter, may be simply referred to as a simultaneous writing process). It may be a process of sequentially writing video signals every time (hereinafter, simply referred to as a sequential writing process). Which writing process is used may be appropriately selected according to the configuration of the drive circuit.

  In principle, the driving and operation related to the light emitting element located in the vth row and the hth column (h = 1, 2, 3,..., H) will be described. The (h, v) th light emitting element will be described below. Alternatively, it is referred to as the (h, v) th subpixel. Various processes (threshold voltage canceling process, writing process, mobility correcting process) are performed before the end of the horizontal scanning period (vth horizontal scanning period) of each light emitting element arranged in the vth row. Done. The writing process and the mobility correction process need to be performed within the v-th horizontal scanning period. On the other hand, depending on the type of the drive circuit, the threshold voltage canceling process and the accompanying preprocessing can be performed prior to the v-th horizontal scanning period.

  Then, after all the various processes are completed, the light emitting units constituting the light emitting elements arranged in the vth row are caused to emit light. The light emitting unit may emit light immediately after all the various processes are completed, or the light emitting unit may emit light after a predetermined period (for example, a horizontal scanning period for a predetermined number of rows) has elapsed. This predetermined period can be set as appropriate according to the specifications of the display device, the configuration of the drive circuit, and the like. In the following description, for convenience of explanation, it is assumed that the light emitting unit emits light immediately after the completion of various processes. The light emission of the light emitting units constituting the light emitting elements arranged in the vth row is continued until just before the start of the horizontal scanning period of the light emitting elements arranged in the (v + v ′) th row.

  “V” is determined by the design specifications of the display device. That is, the light emission of the light emitting units constituting the light emitting elements arranged in the vth row of a certain display frame is continued until the (v + v′−1) th horizontal scanning period. On the other hand, from the beginning of the (v + v ′) th horizontal scanning period to the completion of the writing process and the mobility correction process within the vth horizontal scanning period in the next display frame, they are arranged in the vth row. As a general rule, the light-emitting portion constituting each light-emitting element maintains a non-light-emitting state. By providing the non-light emitting period (non-light emitting period), the afterimage blur caused by the active matrix driving is reduced, and the moving image quality can be further improved.

  However, the light emission state / non-light emission state of each sub-pixel (light-emitting element) is not limited to the state described above. The time length of the horizontal scanning period is a time length of less than (1 / FR) × (1 / V) seconds. When the value of (v + v ′) exceeds V, the excess horizontal scanning period is processed in the next display frame.

  Regardless of the configuration of the driving circuit, the driving method of the light emitting unit is, for example, as follows.

  a) The potential difference between the first node and the second node exceeds the threshold voltage of the driving transistor, and the potential difference between the second node and the cathode electrode provided in the light emitting unit is the threshold voltage of the light emitting unit. So that the first node initialization voltage is applied to the first node and the second node initialization voltage is applied to the second node. This process is called a pretreatment process. This pretreatment process may be classified into a discharge process and an initialization process.

  b) In a state where the potential of the first node is maintained, a threshold voltage canceling process for changing the potential of the second node is performed toward a potential obtained by subtracting the driving transistor threshold voltage from the potential of the first node. This process is called a threshold voltage correction process.

  c) A writing process is performed in which the video signal is applied from the video signal line to the first node through the sampling transistor turned on by the signal from the write scanning line. This process is called a signal writing process.

  d) The sampling transistor is turned off by a signal from the write scanning line, whereby the first node is brought into a floating state, and a current corresponding to the value of the potential difference between the first node and the second node is emitted by the driving transistor. The light emitting part is driven by flowing it through the part. This process is called a light emission process.

  There is a mode in which a mobility correction step is further added between the threshold voltage correction step and the signal writing step, and there is also a mode in which the mobility correction step is performed simultaneously with the signal writing step.

  Here, in the threshold voltage correction step, a threshold voltage canceling process is performed in which the potential of the second node is changed toward the potential obtained by subtracting the threshold voltage of the driving transistor from the potential of the first node. More specifically, in order to change the potential of the second node toward the potential obtained by subtracting the threshold voltage of the driving transistor from the potential of the first node, the threshold voltage of the driving transistor is changed to the potential of the second node in the preprocessing step. Is applied to one of the source / drain regions of the driving transistor.

  Qualitatively, in the threshold voltage cancellation processing, the potential difference between the first node and the second node (in other words, the potential difference between the gate and the source of the driving transistor) approaches the threshold voltage of the driving transistor. Depending on the threshold voltage cancel processing time. Therefore, for example, in a configuration in which the threshold voltage cancel processing time is sufficiently long, the potential of the second node reaches the potential obtained by subtracting the threshold voltage of the drive transistor from the potential of the first node. Then, the potential difference between the first node and the second node reaches the threshold voltage of the driving transistor, and the driving transistor is turned off. On the other hand, for example, in a case where the threshold voltage cancellation processing time has to be set short, the potential difference between the first node and the second node is larger than the threshold voltage of the drive transistor, and the drive transistor is in the off state. May not be. As a result of the threshold voltage canceling process, the driving transistor does not necessarily need to be turned off.

[Low resistance of cathode wiring]
In the display device of this embodiment, when the top emission method that is taken out to the side facing the support substrate is adopted, the wiring resistance of the upper electrode connected to the reference terminal on the side opposite to the drive transistor of the electro-optic element is made smaller. The feature is that it can be done. In the top emission method, the aperture ratio can be determined without being restricted by the circuit arranged on the support substrate side, and high light utilization efficiency can be ensured. However, the upper electrode arranged on the light extraction side is made of a light-transmitting conductive film. It is necessary to make with. However, in general, a light-transmitting conductive film has a higher resistivity than a normal metal material, and the electrode voltage becomes non-uniform in the screen surface of the upper electrode, which causes display quality deterioration such as display unevenness. There is a difficult point.

  As a countermeasure, in the present embodiment, the support substrate is made conductive, and the support substrate having conductivity and the upper electrode are electrically connected. In this way, in terms of electrical circuit, the conductive support substrate functions as a parallel wiring with respect to the upper electrode, and overall, the entire (synthetic) side of the reference terminal side of the electro-optic element. The wiring resistance of the electrode can be reduced.

  As a conductive support substrate, the substrate itself (the whole) may be conductive, or a non-metallic substrate and a metal layer formed on the non-metallic substrate constitute a conductive support substrate. Also good. In the latter case, the metal layer is electrically connected to the upper electrode.

  The electrical connection between the upper electrode and the conductive support substrate may be made in the inner area of the pixel array section (that is, in the display area) or in the peripheral area of the pixel array section (that is, outside the display area). Further, the number and area of the electrical connection between the upper electrode and the conductive support substrate should be as large as possible and as wide as possible to ensure electrical connection. For example, when connection is made in the inner region of the pixel array unit, the number of connection points should be increased, and when connection is made in the peripheral region of the pixel array unit, connection should be made all around the pixel array unit. .

  If there is an existing wiring (referred to as auxiliary wiring) for reducing the wiring resistance of the electrode on the reference terminal side of the electro-optic element, using the connection point between the auxiliary wiring and the light transmissive upper electrode, It is conceivable to establish electrical connection between the upper electrode and the conductive support substrate.

<Overview of display device>
FIG. 1 and FIG. 1A are block diagrams showing an outline of the configuration of an active matrix display device which is an embodiment of a display device. Here, FIG. 1 shows a case of a COG mounting configuration in which a semiconductor chip for a control unit is directly mounted on a substrate of a predetermined material on which a pixel array unit is mounted by COG mounting technology. FIG. 1A shows a case of a peripheral circuit panel outside arrangement configuration (display module) in which a pixel array unit is mounted on a display panel unit and a control unit is mounted on another substrate (for example, a flexible substrate). As the substrate material, for example, any non-metallic material (not a conductor) such as glass and stainless steel (SUS: Stainless Used Steel) having the entire substrate can be used.

  In the present embodiment, for example, an organic EL element is used as a display element (electro-optical element) of a pixel, a thin film transistor (TFT) is used as an active element, and the organic EL element is formed on a semiconductor substrate on which a thin film transistor is formed. A case where the present invention is applied to a type organic EL display (hereinafter referred to as “organic EL display device”) will be described as an example. Such an organic EL display device is used for a display unit of a portable music player or other electronic device using a recording medium such as a semiconductor memory, a mini disk (MD), or a cassette tape.

  In the following, an organic EL element will be specifically described as an example of a pixel display element. However, this is merely an example, and the target display element is not limited to an organic EL element. In general, the embodiments described later can be similarly applied to all display elements that emit light by current drive.

  As shown in FIGS. 1 and 1A, in the organic EL display device 1, a pixel circuit (also referred to as a pixel) P having organic EL elements (not shown) as a plurality of display elements has a display aspect ratio. An example of a display panel unit 100 arranged so as to constitute an effective video area having an aspect ratio of X: Y (for example, 9:16), and a panel control unit for generating various pulse signals for driving and controlling the display panel unit 100 A drive signal generation unit 200 and a video signal processing unit 300. The drive signal generation unit 200 and the video signal processing unit 300 are built in a one-chip IC (Integrated Circuit).

  In the panel type display device, a pixel array unit 102 in which elements constituting a pixel circuit such as a TFT or an electro-optical element are arranged in a matrix form, and arranged around the pixel array unit 102 to drive each pixel circuit P. A control unit 109 whose main part is a scanning unit (horizontal driving unit or vertical driving unit) connected to the scanning line, a drive signal generation unit 200 that generates various signals for operating the control unit 109, and a video signal Generally, the entire apparatus is configured to include the processing unit 300.

  On the other hand, as a product form, as shown in the figure, the display panel unit 100 on which the pixel array unit 102 and the control unit 109 are mounted on the same support substrate 101, the drive signal generation unit 200, and the video signal processing unit 300 are separated. In addition, the present invention is not limited to being provided as the organic EL display device 1 in the form of a module (composite part) including all of these. It is also possible to mount the pixel array unit 102 on the display panel unit 100 and provide the organic EL display device 1 only with the display panel unit 100. In this case, peripheral circuits such as the control unit 109, the drive signal generation unit 200, and the video signal processing unit 300 are mounted on a substrate (for example, a flexible substrate) different from the organic EL display device 1 configured only by the display panel unit 100. Form (referred to as a peripheral circuit panel outside arrangement configuration).

  In the case of the on-panel arrangement configuration in which the display array unit 100 is configured by mounting the pixel array unit 102 and the control unit 109 serving as a display area on the same support substrate 101, in the process of generating the TFT of the pixel array unit 102 At the same time, a pixel array is formed by a mechanism (referred to as a TFT integrated configuration) for generating each TFT for the control unit 109 (and the drive signal generation unit 200 and the video signal processing unit 300 as necessary) and COG (Chip On Glass) mounting technology. A structure (referred to as a COG mounting configuration) in which a semiconductor chip for the control unit 109 (and the drive signal generation unit 200 and the video signal processing unit 300 as necessary) is directly mounted on the support substrate 101 on which the unit 102 is mounted. Good.

  In the case of the organic EL display device 1A having the COG mounting configuration shown in FIG. 1, the display panel unit 100 includes a pixel array unit 102 in which pixel circuits P are arranged in a matrix of n rows × m columns on a support substrate 101. Further, a vertical driving unit 103 that scans the pixel circuit P in the vertical direction and a horizontal driving unit (also referred to as a horizontal selector or a data line driving unit) 106 that scans the pixel circuit P in the horizontal direction are mounted by COG mounting technology. In addition, a terminal portion (pad portion) 108 for external connection is disposed at an end portion of one side of the display panel portion 100. If necessary, an interface (IF) unit that interfaces each of the drive units 103 and 106 with an external circuit may be mounted by a COG mounting technique.

  The vertical drive unit 103 includes, for example, a write scan unit (write scanner WS; Write Scan) 104 and a drive scan unit 105 (drive scanner DS; Drive Scan) that functions as a power supply scanner having power supply capability. For example, the pixel array unit 102 is driven by the writing scanning unit 104 and the driving scanning unit 105 from one side or both sides in the horizontal direction shown in the figure, and is driven by the horizontal driving unit 106 from one side or both sides in the vertical direction shown in the figure. It is like that.

  The vertical driving unit 103 (the writing scanning unit 104 and the driving scanning unit 105) and the horizontal driving unit 106 control writing of the signal potential to the holding capacitor, threshold correction operation, mobility correction operation, and bootstrap operation. The control unit 109 is configured to function as a drive circuit that drives the pixel circuit P of the pixel array unit 102. The control unit 109 is a signal supply circuit that supplies a signal to the pixel circuit P of the pixel array unit 102.

  The configuration of the illustrated vertical drive unit 103 and the corresponding scanning line is shown in conformity with the case where the pixel circuit P has a 2TR configuration of the present embodiment described later. However, depending on the configuration of the pixel circuit P, other configurations may be used. A scanning unit and a scanning line may be provided.

  Thus, in the mounted state, peripheral drive circuits such as the vertical drive unit 103 and the horizontal drive unit 106 are mounted on the same support substrate 101 as the pixel array unit 102. In the illustrated example, the writing scanning unit 104, the driving scanning unit 105, and the horizontal driving unit 106 constituting the control unit 109 are configured by semiconductor chips and mounted on the display panel unit 100 by COG mounting technology. In order to clarify this also from the drawing, the control unit 109 (the writing scanning unit 104, the driving scanning unit 105, and the horizontal driving unit 106) is indicated by a dotted line. In addition, an electrical connection terminal PAD1 (Contact Pad) for connecting to the wiring on the display panel unit 100 when the COG is mounted is schematically shown.

  As a method of mounting an IC chip (IC: Integrated Circuit) such as the control unit 109 on the display panel unit 100 by the COG mounting technique, for example, a gold bump by electrolytic plating is used for an electrical connection terminal (bump), and the display panel A method of mounting on an electrode on the unit 100 by an ACF (Anisotropic Conductive Film) is known. Of course, other methods may be applied.

  In the example shown in FIG. 1, a pulse signal is input from the outside of the display panel unit 100 via the terminal unit 108. However, the drive signal generation unit 200 that generates these various timing pulses is configured by a semiconductor chip. You may mount on the display panel part 100 by COG mounting technology.

  Various pulse signals are supplied to the terminal unit 108 from the drive signal generation unit 200 arranged outside the organic EL display device 1. Similarly, the video signal Vsig is supplied from the video signal processing unit 220. In the case of color display compatibility, video signals Vsig_R, G, and B for each color (in this example, three primary colors of R (red), G (green), and B (blue)) are supplied.

  For example, as a pulse signal for vertical driving, shift start pulses SPDS and SPWS which are examples of vertical write start pulses and vertical scanning clocks CKDS and CKWS (vertical scanning clocks xCKDS and xCKWS whose phases are reversed as necessary) ) And other necessary pulse signals are supplied. In addition, as a pulse signal for horizontal driving, necessary pulse signals such as a horizontal start pulse SPH, which is an example of a horizontal write start pulse, and a horizontal scanning clock CKH (and a horizontal scanning clock xCKH whose phase is inverted as necessary) are supplied. Is done.

  Each terminal of the terminal unit 108 is connected to the vertical driving unit 103 and the horizontal driving unit 106 via a signal line 199. For example, each pulse supplied to the terminal unit 108 is internally adjusted to a voltage level by a level shifter unit (not shown) as necessary, and then supplied to each unit of the vertical driving unit 103 and the horizontal driving unit 106 via a buffer. Supplied.

  Although the pixel array unit 102 is not shown in the drawing (details will be described later), pixel circuits P in which pixel transistors are provided with respect to an organic EL element as a display element are two-dimensionally arranged in a matrix form. On the other hand, scanning lines are wired for each row, and signal lines are wired for each column.

  For example, in the pixel array unit 102, the scanning lines 104WS and 105DSL on the vertical scanning side and video signal lines (data lines) 106HS which are scanning lines on the horizontal scanning side are formed in the pixel array unit 102. An organic EL element (not shown) and a thin film transistor for driving the organic EL element are omitted at the intersection between the vertical scanning lines and the horizontal scanning lines. A pixel circuit P is configured by a combination of an organic EL element and a thin film transistor.

  Specifically, for each pixel circuit P arranged in a matrix, the write scanning lines 104WS_1 to 104WS_n for n rows driven by the write scanning unit 104 with the write drive pulse WS and the drive scanning unit Power supply lines 105DSL_1 to 105DSL_n for n rows driven by the power supply drive pulse DSL by 105 are wired for each pixel row.

  The writing scanning unit 104 and the driving scanning unit 105 are configured by a combination of logic gates (including latches and shift registers), and select each pixel circuit P of the pixel array unit 102 in units of rows, that is, drive signal generation. Each pixel circuit P is sequentially selected through the write scanning line 104WS and the power supply line 105DSL based on the vertical drive system pulse signal supplied from the unit 200.

  The horizontal drive unit 106 is configured by a combination of logic gates (including latches and shift registers), and selects each pixel circuit P of the pixel array unit 102 in units of columns, that is, supplied from the drive signal generation unit 200. Based on the pulse signal of the horizontal drive system, a predetermined potential in the video signal Vsig is sampled and written to the storage capacitor via the video signal line 106HS for the selected pixel circuit P.

  The organic EL display device 1 according to the present embodiment can be driven in line-sequential driving or dot-sequential driving, and the writing scanning unit 104 and the driving scanning unit 105 of the vertical driving unit 103 are line-sequential (that is, in units of rows). The horizontal drive unit 106 scans the pixel array unit 102 in synchronization with this, and the horizontal drive unit 106 outputs the image signal for one horizontal line simultaneously (in the case of line sequential) or in units of pixels (in the case of dot sequential). Write to the array unit 102.

  As shown in the figure, the product form is not limited to being provided as an organic EL display device 1 in the form of a module (composite part) including all of the display panel unit 100, the drive signal generation unit 200, and the video signal processing unit 220. For example, the display panel unit 100 alone can be provided as a display device, or the pixel array unit 102 alone can be provided as a display device.

  For example, the organic EL display device 1 includes a module-shaped one having a sealed configuration. For example, the case of an arrangement configuration outside the peripheral circuit panel corresponds to the organic EL display device 1B shown in FIG. 1A. In this case, the pixel array unit 102 is configured as a display module including only the display panel unit 100 that is formed by being attached to an opposing unit such as transparent glass. The transparent facing portion is provided with a display layer (in this example, an organic layer and electrode layers on both sides thereof), a color filter, a protective film, a light shielding film, and the like.

  In the case of the arrangement outside the peripheral circuit panel shown in FIG. 1A, it becomes an external connection terminal when connecting with an FPC (flexible printed circuit) on which a circuit member is mounted in addition to the pixel array unit 102 by various methods. An electrical connection terminal PAD <b> 2 is provided on the edge of the display panel unit 100. As a circuit member mounted on the FPC, for example, a circuit unit (corresponding to the vertical driving unit 103 or the horizontal driving unit 106) for inputting / outputting a video signal Vsig and various driving pulses to / from the pixel array unit 102 from the outside. Or its output driver).

  As a connection method, for example, a TCP (Tape Carrier Package) method or a COF (Chip On Flexible) method can be considered. TCP is a name for a driver tape (Large Scale Integrated Circuit) mounted on a flexible tape by bonding, and the method is usually TAB (Tape Automated Bonding). FIG. 1A shows an example of the COF method. Other points are basically the same as those in the COG mounting configuration.

  1 and 1A show a configuration in which each element (the writing scanning unit 104 and the driving scanning unit 105) of the vertical driving unit 103 is arranged only on one side of the pixel array unit 102. It is also possible to adopt a configuration in which both are arranged on both the left and right sides of 102. Similarly, FIG. 1 and FIG. 1A show a configuration in which the horizontal drive unit 106 is disposed only on one side of the pixel array unit 102, but a configuration in which these are disposed on both upper and lower sides with the pixel array unit 102 interposed therebetween is employed. May be.

  As for the mounting form of the control unit 109, FIG. 1 shows the case of a COG mounting configuration as an example of the on-panel arrangement configuration, and FIG. 1A shows the case of the arrangement configuration outside the peripheral circuit panel. Not only the mounting configuration but also a TFT integrated configuration may be used.

  The vertical drive unit 103 includes, for example, a write scan unit (write scanner WS; Write Scan) 104 and a drive scan unit (drive scanner DS; Drive Scan) 105 that functions as a power supply scanner having power supply capability. The vertical drive unit 103 and the horizontal drive unit 106 constitute a control unit 109 that controls writing of a signal potential to a storage capacitor, threshold correction operation, mobility correction operation, and bootstrap operation.

  The configuration of the illustrated vertical drive unit 103 and the corresponding scanning line is shown in conformity with the case where the pixel circuit P has a 2TR configuration of the present embodiment described later. However, depending on the configuration of the pixel circuit P, other configurations may be used. A scanning unit may be provided.

  For example, the pixel array unit 102 is driven by the writing scanning unit 104 and the driving scanning unit 105 from one side or both sides in the horizontal direction shown in the figure, and driven by the horizontal driving unit 106 from one side or both sides in the vertical direction shown in the figure. It has come to be.

  Various pulse signals are supplied to the terminal unit 108 from the drive signal generation unit 200 arranged outside the organic EL display device 1. Similarly, the video signal Vsig is supplied from the video signal processing unit 300. When color display is supported, video signals Vsig_R, Vsig_G, and Vsig_B for each color (in this example, three primary colors of R (red), G (green), and B (blue)) are supplied.

  For example, pulse signals such as shift start pulses SPDS, SPWS and vertical scanning clocks CKDS, CKWS, which are examples of vertical write start pulses, are supplied as pulse signals for vertical driving. In addition, necessary pulse signals such as a horizontal start pulse SPH and a horizontal scanning clock CKH, which are examples of horizontal write start pulses, are supplied as pulse signals for horizontal driving.

  Each terminal of the terminal unit 108 is connected to the vertical driving unit 103 and the horizontal driving unit 106 via a wiring 199. For example, each pulse supplied to the terminal unit 108 is internally adjusted to a voltage level by a level shifter unit (not shown) as necessary, and then supplied to each unit of the vertical driving unit 103 and the horizontal driving unit 106 via a buffer. Supplied.

  Although the pixel array unit 102 is not shown in the drawing (details will be described later), pixel circuits P in which pixel transistors are provided with respect to an organic EL element as a display element are two-dimensionally arranged in a matrix form. On the other hand, a vertical scanning line is wired for each row, and a signal line (an example of a horizontal scanning line) is wired for each column.

  For example, the pixel array unit 102 includes video signal lines (vertical scanning lines: writing scanning lines 104WS and power supply lines 105DSL) and horizontal scanning side scanning lines (horizontal scanning lines). Data line) 106HS is formed. An organic EL element (not shown) and a thin film transistor (TFT) for driving the organic EL element are omitted at the intersection of the vertical scanning line and the horizontal scanning line. A pixel circuit P is configured by a combination of an organic EL element and a thin film transistor.

  Specifically, for each pixel circuit P arranged in a matrix, the write scanning lines 104WS_1 to 104WS_n for n rows driven by the write scanning unit 104 with the write drive pulse WS and the drive scanning unit Power supply lines 105DSL_1 to 105DSL_n for n rows driven by the power supply drive pulse DSL by 105 are wired for each pixel row.

  The writing scanning unit 104 and the driving scanning unit 105 sequentially select the pixel circuits P via the writing scanning line 104WS and the power supply line 105DSL based on the vertical driving system pulse signal supplied from the driving signal generation unit 200. To do. The horizontal driving unit 106 samples a predetermined potential in the video signal Vsig to the selected pixel circuit P via the video signal line 106HS based on the horizontal driving system pulse signal supplied from the driving signal generation unit 200. To write to the holding capacity.

  The organic EL display device 1 of the present embodiment can be driven by line sequential driving, surface sequential driving, or other methods. For example, the writing scanning unit 104 and the driving scanning unit 105 of the vertical driving unit 103 are The pixel array unit 102 is scanned in units of rows, and in synchronization with this, the horizontal driving unit 106 writes an image signal to the pixel array unit 102 simultaneously for one horizontal line.

  The horizontal driving unit 106 includes, for example, a driver circuit that turns on switches that are not shown in the figure provided on the video signal lines 106HS of all the columns, and receives the pixel signals input from the video signal processing unit 300. In order to simultaneously write in all the pixel circuits P for one line of the row selected by the vertical drive unit 103, the switches provided on the video signal lines 106HS of all the columns are turned on all at once, and the driver circuit The video signal Vsig (an example of the horizontal scanning signal) is supplied to the horizontal scanning line (video signal line 106HS) via the.

  Each unit of the vertical drive unit 103 is configured by a combination of logic gates (including latches) and a driver circuit, and each pixel circuit P of the pixel array unit 102 is selected in units of rows by the logic gates, and is vertically connected via the driver circuit. A vertical scanning signal is supplied to the scanning line. FIG. 1 shows a configuration in which the vertical drive unit 103 is disposed only on one side of the pixel array unit 102. However, a configuration in which the vertical drive unit 103 is disposed on both the left and right sides with the pixel array unit 102 interposed therebetween is employed. Is also possible. Similarly, FIG. 1 shows a configuration in which the horizontal drive unit 106 is disposed only on one side of the pixel array unit 102, but a configuration in which the horizontal drive unit 106 is disposed on both upper and lower sides with the pixel array unit 102 interposed therebetween is employed. It is also possible.

<Pixel circuit>
FIG. 2 is a diagram illustrating the pixel circuit P of the present embodiment. The pixel circuit P uses an n-type drive transistor 121. In addition, the circuit for suppressing the fluctuation of the drive current Ids to the organic EL element due to the change with time of the organic EL element, that is, the change of the current-voltage characteristic of the organic EL element which is an example of the electro-optical element is corrected. The present invention is characterized in that a drive signal stabilizing circuit for maintaining the drive current Ids constant is provided. Further, the organic EL element is characterized in that it has a function of keeping the driving current constant even when the current-voltage characteristic of the organic EL element changes with time.

  In other words, a 2TR drive configuration using one switching transistor (sampling transistor 125) for scanning in addition to the drive transistor 121 is employed. The on / off timing (switching timing) of the power supply drive pulse DSL and the write drive pulse WS for controlling each switching transistor is set as the operation timing described later. This prevents the influence on the drive current Ids due to the change with time of the organic EL element 127 and the characteristic variation of the drive transistor 121 (for example, variations and fluctuations in threshold voltage, mobility, etc.). Since it is a 2TR drive configuration and the number of elements and wirings are small, high definition can be achieved.

  Specifically, the pixel circuit P includes a storage capacitor 120, an n-type drive transistor 121, an n-type transistor 125 to which an active H (high) write drive pulse WS is supplied, and an electro-optic that emits light when a current flows. It has the organic EL element 127 which is an example of an element (light emitting element).

  The storage capacitor 120 is connected between the gate (node ND122) and the source of the driving transistor 121, and the source of the driving transistor 121 is directly connected to the anode end of the organic EL element 127. A cathode end, which is an example of a reference terminal of the organic EL element 127, is connected to a common cathode line 127K common to all pixels, and is supplied with a cathode potential Vcath (for example, ground potential GND).

  The storage capacitor 120 functions also as a bootstrap capacitor. That is, the pixel circuit P first has a feature in the connection mode of the storage capacitor 120, and constitutes a bootstrap circuit which is an example of a drive signal stabilization circuit as a circuit for preventing fluctuations in the drive current due to changes over time of the organic EL element 127. In the point. As a method of suppressing the influence on the drive current Ids due to the characteristic variation of the drive transistor 121 (for example, variation or fluctuation in threshold voltage, mobility, etc.), this is dealt with by devising the drive timing of each of the transistors 121 and 125.

  The drain of the drive transistor 121 is connected to a power supply line 105DSL from the drive scanning unit 105 that functions as a power scanner. The power supply line 105DSL is characterized in that the power supply line 105DSL itself has a power supply capability to the drive transistor 121.

  Specifically, the drive scanning unit 105 supplies power to the drain of the drive transistor 121 by switching between the first voltage Vcc_H on the high voltage side and the second voltage Vcc_L on the low voltage side corresponding to the power supply voltage. A voltage switching circuit is provided.

  The second potential Vcc_L is a potential sufficiently lower than the offset potential Vofs (also referred to as a reference potential) of the video signal Vsig in the video signal line 106HS. Specifically, the gate-source voltage Vgs of the drive transistor 121 (the difference between the gate potential Vg and the source potential Vs) is larger than the threshold voltage Vth of the drive transistor 121. Two potential Vcc_L is set. The offset potential Vofs is used for an initialization operation prior to the threshold correction operation and also used for precharging the video signal line 106HS in advance.

  Sampling transistor 125 has a gate connected to write scan line 104WS from write scan unit 104, a drain connected to video signal line 106HS, and a source connected to the gate (node ND122) of drive transistor 121. An active H write drive pulse WS is supplied to the gate from the write scanning unit 104.

  The sampling transistor 125 may have a connection mode in which the source and the drain are reversed. As the sampling transistor 125, either a depletion type or an enhancement type can be used.

<Problems and countermeasures for cathode wiring>
In order to facilitate understanding of the structure of the organic EL display device of the present embodiment (particularly, the layer structure for electrically connecting the light-transmissive upper electrode and the conductive support substrate 101), first, the base and The connection structure of this embodiment is demonstrated after that.

[Overview of implementation example]
FIG. 3 is a diagram for explaining an overall outline of a mounting example of the pixel array unit 102. Here, a case where connection is made by the COF method is shown.

  As shown in FIG. 3, the pixel array portion 102 on the support substrate 101 has a module shape that is sealed with a sealing substrate 170. An electrical connection terminal PAD2 for connection by the COF method is provided at an edge portion of the support substrate 101 of the display panel unit 100. On the support substrate 101, a pixel array unit 102 serving as a display region is provided, and an auxiliary wiring 515 is provided outside the pixel array unit 102. The auxiliary wiring 515 is a cathode common wiring 127K common to all pixels together with the upper electrode not shown. For example, the reference terminal voltage is supplied to the auxiliary wiring 515 from the power supply TCP 520 which is an example of the electrical connection terminal PAD2A provided at the edge portion of the support substrate 101 of the display panel unit 100. In general, the reference terminal voltage is a reference point potential (for example, ground potential) of the entire apparatus.

  The auxiliary wiring 515 is provided so as to surround the pixel array unit 102, and is electrically and structurally (physically) connected to the upper electrode on the upper layer thereof by a cathode contact KC (cathode deposition area). The cathode contact KC is preferably formed on the entire periphery of the pixel array unit 102 so as to ensure electrical connection and prevent moisture from entering the pixel array unit 102 side.

  The electrical connection terminal PAD2 for the control unit 109 is also substantially the same as the power supply TCP 520, and a write drive pulse that is an example of the electrical connection terminal PAD2B provided at the edge portion of the support substrate 101 of the display panel unit 100. Each signal is supplied from the signal supply TAB 530_WS for the WS, the power input unit 530_DSL for the power supply driving pulse DSL, and the signal supply TAB 530_sig for the video signal Vsig which is an example of the electrical connection terminal PAD2C. A driver LSI is bonded to each signal supply TAB 530 by the TAB method, the driver output is connected to the edge of the support substrate 101, and the driver LSI is mounted outside the support substrate 101. Although not shown, a circuit board on which a preceding circuit (for example, a shift register) for supplying a signal to the driver LSI is connected to the opposite side of each signal supply TAB 530 to the support substrate 101.

  Although not shown, the power supply TCP 520 is provided with a plurality of cathode electrode pads serving as connection ends with the FPC at a predetermined pitch, and the cathode electrode pads are the edges of the auxiliary wiring 515 (periphery of the pixel array unit 102 which is a display region) ) To be connected in common at the contact portion.

  The signal supply TAB 530 is also substantially the same as the power supply TCP 520, and although not shown, a plurality of signal electrode pads (for the write drive pulse WS and the power drive pulse DSL) provided at a predetermined pitch are provided as connection ends with the FPC. The signal electrode pads are connected to the scanning lines (two types of writing scanning lines 104WS and power supply lines 105DSL) extending from the pixel array portion 102 and the contact portions. Although not shown, the write drive pulse WS is also provided with a plurality of signal electrode pads that are connected to the FPC at a predetermined pitch, and a scanning line (video signal line 106HS) in which the signal electrode pads extend from the pixel array unit 102. ) And the contact part.

[Auxiliary wiring layout]
FIG. 4 is an overall schematic diagram of the layout of the first example of the lower electrode and the auxiliary wiring of the organic EL element 127. FIG. 4A is an overall schematic diagram of a layout of a second example which is a modification to FIG. For the sake of convenience, the figure shows 3 (horizontal) × 2 (vertical) pixels.

  A layout of the first example of the lower electrode and the auxiliary wiring of the organic EL element 127 is shown in FIG. As shown in this figure, the lower electrodes 504 of the organic EL elements 127 are arranged in a two-dimensional matrix corresponding to the arrangement of the pixel circuits P arranged in a matrix. The organic EL element 127 has a laminated structure of a lower electrode 504, an organic layer 506, and an upper electrode 508. Between the lower electrodes 504, auxiliary wirings 515 configured in the same layer as the lower electrodes 504 are arranged in a lattice shape so as to surround the lower electrodes 504 (that is, the pixel circuits P), and further on the outer periphery of the pixel array section. The configuration is wired so as to surround the whole 102. The auxiliary wiring 515 in the anode layer in which the lower electrode 504 is formed is connected to the upper electrode 508 in the upper layer by a cathode contact KC at an appropriate location (in the example in the figure, the center and the outer periphery between the pixels). .

  Further, in the layout of the second example shown in FIG. 4A, a high-definition pixel structure in a top emission method (a top emission method, a top emission method) in which display light is emitted from the display surface side opposite to the support substrate is used. In order to increase the pixel aperture ratio, the auxiliary wiring 515 is merely disposed so as to surround the entire pixel array unit 102, and a layout in which the auxiliary wiring 515 is arranged in a lattice shape, a column, or a row in the pixel array portion 102 is not used. For example, a high-definition pixel may not use an auxiliary wiring layout in the pixel in order to increase the aperture ratio.

  In any configuration, the auxiliary wiring 515 is wired so as to surround the entire pixel array unit 102, and the contact with the upper electrode is taken over the entire outer periphery, thereby reducing the contact resistance with the upper electrode (cathode electrode). ing.

[Layer structure of electrode]
5 and 5A are diagrams schematically showing an electrode structure for one pixel in a general organic EL display device. Here, FIG. 5A is a plan view of the electrode structure for one pixel after completion of the TFT process, and FIG. 5B is a plan view of the electrode structure for one pixel after completion of the anode process. The pixel circuit P is shown as a circuit diagram instead of a layer structure. FIG. 5A (1) is a cross-sectional view (after the end of the cathode process) taken along line AA ′ passing through a connection hole 504a (anode contact pad CPa described later) in FIG. 5 (2). FIG. 5A (2) is a cross-sectional view (after the completion of the anode process) taken along the line BB ′ passing through a connection hole 508a (corresponding to a cathode contact pad CPk_1 described later) in FIG. 5 (2). FIG. 5A (3) is a cross-sectional view (after the end of the cathode process) taken along the line BB ′ of the connection hole 508a portion in FIG. In FIG. 5 (2), the anode electrode is shown superimposed on the state after the TFT process shown in FIG. 5 (1).

  In the case of the pixel circuit P shown in FIG. 2, in the pixel array unit 102, at least the write scanning line 104WS and the power supply line 105DSL related to the vertical scanning system become one vertical / horizontal wiring (for example, a horizontal wiring). On the other hand, the video signal line 106HS related to the horizontal scanning system is the other vertical / horizontal wiring (for example, vertical wiring). If the cathode potential Vcath of the organic EL element 127 is not a solid wiring but a normal wiring, the cathode common wiring 127K for the cathode potential Vcath is a horizontal wiring or a vertical wiring.

  Here, each of the above-mentioned wirings (the write scanning line 104WS, the power supply line 105DSL, and the video signal line 106HS) extends in the horizontal direction or the vertical direction, and the corresponding scanning unit (write) provided around the pixel array unit 102. , The scanning unit 104, the driving scanning unit 105, and the horizontal driving unit 106).

  When the horizontal direction of the screen is considered, the detailed description is omitted, but the write drive pulse WS is commonly supplied from the write scanning unit 104 to all the pixel circuits P in one row. The pixel circuit P (referred to as a far-side pixel) that is farther from the writing scanning unit 104 is closer to the writing scanning unit 104 (referred to as a near-side pixel) because the waveform of WS is affected by the wiring capacitance or wiring resistance. Rather, the waveform becomes dull. For this reason, the distribution characteristics of the wiring capacitance and the wiring resistance may affect the operations of threshold correction and mobility correction. The same can be said for the power supply line 105DSL and the video signal line 106HS (or the cathode common wiring 127K), and the distribution characteristics of the wiring capacity and wiring resistance affect the operation of threshold correction and mobility correction. Sometimes.

  Considering these points, each wiring is generally wired using a metal wiring that does not have optical transparency such as aluminum Al, molybdenum Mo, titanium Ti or the like in order to reduce resistance. As described above, since vertical wiring and horizontal wiring are necessary, basically, at least two layers of metal wiring are required for the overlap at the intersection of the vertical wiring and the horizontal wiring.

  For example, in the layout example shown in FIG. 5, the write scanning line 104WS for driving the gate terminal of the sampling transistor 125 and the power supply voltage at the drain terminal of the driving transistor 121 are switched between the first potential Vcc and the second potential Vss. The power supply line 105DSL for this purpose is a metal wiring on one of the upper layer side and the lower layer side (here, the upper layer side).

  Regarding the video signal line 106HS for supplying the video signal Vsig to the source end of the sampling transistor 125, in the pixel circuit P portion, the metal wiring is one of the upper layer side and the lower layer side (here, the upper layer side). On the other hand, since it is necessary to overlap the portion that intersects the write scanning line 104WS and the power supply line 105DSL in the same layer (which is the metal wiring on the upper layer side), the other of the upper layer side and the lower layer side (here, the lower layer side) And metal wiring.

  Connection for establishing connection with the contact hole connected to the connection hole 504a for establishing connection with the lower electrode 504_1 (in this example, the anode electrode) of the organic EL element 127 and the upper electrode 508 (in this example, cathode electrode). A contact pad (cathode contact KC) connected to the hole 508a is also formed as a metal wiring on the upper layer side. Since the contact pad connected to the anode electrode connection hole 504a is connected to the lower electrode 504_1 forming the EL opening 127a, the contact pad is provided on the EL opening 127a side. The cathode contact KC connected to the cathode electrode connection hole 508a is provided in the vicinity of a boundary portion with an adjacent pixel in the vertical direction and / or horizontal direction (the example in the vertical direction in the figure).

  Here, as shown in the plan view of one pixel shown in FIG. 5B, a lower electrode 504_1 (for example, an anode electrode) is disposed on the support substrate 101, and an opening of the organic EL element 127 is formed on the lower electrode 504_1. (Hereinafter referred to as EL opening 127a) is formed. The lower electrode 504_1 is provided with a connection hole 504a (for example, TFT-anode contact), and is connected to the input / output terminal (source electrode in this example) of the drive transistor 121 disposed below the lower electrode 504_1 through the connection hole 504a. An electrode 504 is connected.

  The periphery of the lower electrode 504_1 is covered with an opening defining insulating film 505 (not shown in FIG. 5B, see FIG. 5A) that is an insulating film pattern, and the lower electrode 504_1 and the organic layer that constitute the organic EL element 127 The EL opening 127a is widely exposed so that only the portion where the upper electrode 508 and the upper electrode 508 are stacked becomes an effective light emission region. A connection hole 508a (for example, cathode contact KC) to be connected to the upper electrode 508 is provided, and the upper electrode 508 is connected through the connection hole 508a.

  FIG. 5A (1) shows a cross-sectional view taken along line A-A ′ of the connection hole 504a portion in FIG. 5 (2). As shown in FIG. 5A (1), in the element formation layer 500 on the support substrate 101, a thin film transistor Q such as a driving transistor 121 and a sampling transistor 125 that form the pixel circuit and a holding element are held at positions corresponding to the pixel circuits P. A capacitor 120 (capacitance value Cs) is disposed, and an interlayer insulating film 502 is provided thereon.

  A source electrode line Qs and a drain electrode line Qd connected to the thin film transistor Q are provided further above the interlayer insulating film 502. In addition, the conductive layer constituting each element (the thin film transistor Q, the storage capacitor 120) and the conductive layer constituting the source electrode line Qs and the drain electrode line Qd (only the source electrode 121s of the driving transistor 121 are shown in the figure) Other wiring (not shown) constituting the circuit P is formed.

  Further, an upper interlayer insulating film 503 is provided so as to cover the layers of the source electrode line Qs and the drain electrode line Qd, and the organic EL element 127 is formed on the interlayer insulating film 503. The organic EL element 127 includes a lower electrode 504_1, an organic layer 506, and an upper electrode (for example, a cathode electrode) 508 that are sequentially stacked from the lower layer side.

  The lower electrode 504_1 is patterned as a pixel electrode, and is connected to the source electrode 121s of the driving transistor 121 through a connection hole 504a formed in the interlayer insulating film 503. The upper electrode 508 facing the lower electrode 504_1 is typically formed as a solid film covering all the pixel circuits P.

  5A (2) and 5 (3) are cross-sectional views taken along the line B-B 'passing through the connection hole 508a in FIG. 5 (2). As shown in FIG. 5A (2), the pixel circuit P is disposed at a position corresponding to each pixel circuit P on the support substrate 101, such as a thin film transistor (TFT) such as a driving transistor 121 or a sampling transistor 125 that constitutes the pixel circuit P. A lowermost layer (first wiring layer L1) and a polysilicon layer for forming circuit elements such as the storage capacitor 120 (capacitance value Cs) are disposed. An interlayer insulating film 502a (oxide film) functioning as a gate insulating film (GI) is provided on the first wiring layer L1. A polysilicon layer serving as one electrode of the source and drain of the thin film transistor or the storage capacitor 120 is provided further on the interlayer insulating film 502a.

  Various wirings constituting the pixel circuit P are formed by the conductive layer constituting each element (thin film transistor, storage capacitor 120) and the conductive layer constituting the source electrode and the drain electrode. These circuit elements are covered with an interlayer insulating film 502b (oxide film) that functions as a channel protective film (etching stop layer, PSV). The interlayer insulating films 502a and 502b are collectively referred to as an interlayer insulating film 502.

  Further above the interlayer insulating film 502, a second wiring layer L2 for a scanning line connected to the source electrode, drain electrode, and gate electrode of the thin film transistor is provided. Then, an interlayer insulating film 503 that functions as a planarizing film (PLNR) is provided as an upper layer in a state of covering the second wiring layer L2, and the organic EL element 127 is formed on the interlayer insulating film 503. The organic EL element 127 includes a lower electrode 504 (for example, an anode electrode), an organic layer 506, and an upper electrode 508 (for example, a cathode electrode) stacked in order from the lower layer side. Since the organic layer 506 that is a dielectric is sandwiched between the lower electrode 504 and the upper electrode 508, the organic EL element 127 has a capacitance component (parasitic capacitance Cel).

  Specifically, the organic layer 506 has a multilayer structure made of, for example, a low molecular material. For example, a hole injection layer, a hole transport layer, and a light emitting layer are sequentially arranged from the lower electrode 504 side to the upper electrode 508 side. Layer, and an electron transport layer (also serving as an electron injection layer). And in the case of a color display correspondence, the thing suitable for a display color is used as an organic material of a light emitting layer.

  The first wiring layer L1 provided first on the support substrate 101 is also used as a layer for forming circuit elements such as thin film transistors (the drive transistor 121 and the sampling transistor 125). Although illustration is omitted, a light shielding metal layer is provided on the surface of the support substrate 101 opposite to the side on which the transistors and the organic EL elements 127 are disposed for light leakage and temperature diffusion.

  In forming the connection hole 508a, first, in the TFT process, as shown in FIG. 5A (1), an anode contact pad CPa is formed at a position corresponding to the connection hole 504a, and also shown in FIG. 5A (2). Thus, the cathode contact pad CPk_1 is formed at a position corresponding to the connection hole 508a. Thereafter, the cathode contact pad CPk_1 is connected to the cathode auxiliary electrode 504_2 (corresponding to the auxiliary wiring 515) formed of the anode metal.

  Although not shown, with respect to the auxiliary wiring 515 around the pixel array portion 102, the cathode contact pad CPk_2 is formed, and the cathode contact pad CPk_2 and the cathode auxiliary electrode 504_2 formed of the anode metal are connected (see FIG. 6A described later). ).

  Although not shown, in the connection hole 504a, the anode contact pad CPa and the lower electrode 504_1 (anode electrode) are connected in the anode process.

  In the EL process and the cathode process, as shown in FIG. 5A (3), when the organic layer 506 is stacked on the lower electrode 504_1 and further the upper electrode 508 is stacked on the upper layer of the organic layer 506, the cathode contact pad CPk_1 The upper electrode 508 (cathode electrode) is connected. The upper electrode 508 facing the lower electrode 504_1 is formed as a solid film covering all the pixel circuits P.

  Here, as various wiring materials, for example, the following are used as suitable combinations. Considering the resistivity of the wiring resistance, it is considered preferable to use aluminum Al-based metal. For example, the metal layer uses molybdenum Mo for the gate electrode, aluminum Al for the wiring layer, aluminum neodymium alloy AlNd for the anode electrode (lower electrode 504_1), and magnesium silver alloy MgAg for the cathode electrode. As the light shielding metal, aluminum Al, aluminum neodymium alloy AlNd, or the like is used. Incidentally, since the transistor (TFT) is disposed under the anode electrode (lower electrode 504_1), there is no other metal layer (wiring). The auxiliary wiring 515 (the cathode auxiliary electrode 504_2) is made of the same aluminum neodymium alloy AlNd as the anode electrode (lower electrode 504_1), and the pure cathode wiring (cathode electrode, upper electrode 508) is made of the same aluminum Al as the power supply line.

  Incidentally, the reason why the cathode auxiliary electrode 504_2 is provided is as follows. This configuration employs a top emission method, in which the lower electrode 504_1 (EL anode) and the cathode auxiliary electrode 504_2 are formed in the anode layer, and then the upper electrode 508 (cathode metal) is deposited on the entire surface. Since the upper electrode 508 deposited on the entire surface is required to have light transmission, the resistance value must be increased. Without the cathode auxiliary electrode 504_2, the cathode voltage rises too much, and the power supply voltage increases and the power consumption increases. May rise or image quality defects such as shading may occur. As a countermeasure, the cathode auxiliary electrode 504_2 of the anode layer is used as the auxiliary wiring 515 so as to reduce the resistance value of the cathode wiring.

  In this example, the cathode auxiliary electrode 504_2 is formed of the same material as the anode metal in the formation process of the lower electrode 504, but this is not essential, and the auxiliary wiring 515 is formed in the formation process of another wiring layer. May be. For example, in general, the aperture ratio of the organic EL element 127 is determined by a taper portion (referred to as WIN) of the anode layer and the aperture defining insulating film 505. If the cathode auxiliary electrode 504_2 is not provided, the lower electrode 504_1 (anode electrode) of the organic EL element 127 can be further increased, and the aperture ratio increases. Since the lifetime of the organic EL element 127 increases as the aperture ratio increases, making the cathode auxiliary electrode 504_2 thinner leads to a longer lifetime. However, if the cathode auxiliary electrode 504_2 is thinned and the resistance value is increased, a defect such as shading occurs, so that it cannot be simply thinned. On the other hand, since the resistance value of the cathode auxiliary electrode 504_2 is lowered by wiring a low resistance metal such as aluminum Al as the cathode auxiliary electrode 504_2, the cathode auxiliary electrode 504_2 can be made thinner and the aperture ratio can be increased. it can.

  The organic EL display device 1 having such a layer structure may be configured as a so-called top emission method in which the emitted light L1 is extracted from the side opposite to the support substrate 101 on which the organic EL elements 127 are arranged. Effective in securing the rate. Further, with such a top emission method, the aperture ratio of the organic EL element 127 does not depend on the layout of the thin film transistors that constitute the pixel circuit P. For this reason, the pixel circuit P using the plurality of thin film transistors Q and the storage capacitors 120 can be arranged corresponding to each pixel.

  In the case of a top emission display device, the lower electrode 504_1 on the support substrate 101 side is formed using a metal having high light shielding properties and high reflectivity. On the other hand, a conductive material having a high light transmittance is used for the upper electrode 508 on the side from which the emitted light L1 is extracted. Such a material has a high resistance value. Therefore, the wiring resistance of the upper electrode 508 is increased. Even if the upper electrode 508 is a solid wiring, there is a limit in reducing the resistance value. The auxiliary wiring 515 contributes to reducing the resistance value of the entire cathode wiring by wiring in parallel with the high resistance upper electrode 508 in electrical circuit.

  However, as high definition and large size progress, even if the auxiliary wiring 515 is used to reduce the resistance of the cathode wiring, it becomes difficult to reduce the resistance sufficiently, and the display quality deteriorates. Still remains.

  As a countermeasure, in the present embodiment, the support substrate 101 is made conductive, and the support substrate 101 having the conductivity and the upper electrode 508 are electrically connected. By doing so, the electrically conductive support substrate 101 functions as a parallel wiring with respect to the upper electrode 508 in terms of electric circuit, and as a whole, the reference terminal (cathode) side of the organic EL element 127. The wiring resistance of these electrodes can be reduced. As a result, the organic EL display device 1 that does not cause display unevenness can be realized.

  Although the circuit configuration and the basic layer structure are as described above, the conductive support substrate 101 and the upper electrode 508 are electrically connected in the display panel unit 100 based on the display panel unit 100 described above. Various methods are conceivable as the method of performing the above. This point will be described in detail below.

[Cathode contact: First example]
FIG. 6 is a diagram illustrating a layer structure of a first example for connecting the support substrate 101 and the upper electrode 508 in the display panel unit 100. In the first example, the support substrate 101 (specifically, a metal layer provided in an upper layer thereof) and the upper electrode 508 are electrically connected to each other by using a cathode contact KC provided in the pixel (specifically, between pixels). It is. As the support substrate 101, for example, a non-metallic material such as glass (not a conductor) is used.

  As shown in the drawing, a metal layer 630 is laminated on the entire surface of the support substrate 101, an insulating film 632 is formed thereon, and an element formation layer 500 for the pixel array unit 102 is formed thereon. Yes. The non-metallic support substrate 101 and the metal layer 630 substantially constitute a support substrate having conductivity.

  A portion of the metal layer 630 on the support substrate 101 facing the cathode contact pad CPk_1 is directly electrically connected to the cathode contact pad CPk_1 without the insulating film 632 interposed therebetween. The cathode contact pad CPk_1 connects the cathode auxiliary electrode 504_2 serving as the auxiliary wiring 515 (metal layer) and the upper electrode 508 (that is, the cathode electrode) and has a cathode potential. Therefore, the cathode contact pad CPk_1 is connected to the cathode auxiliary electrode 504_2. The contact pad CPk_2 is also at the cathode potential. Therefore, the metal layer 630 of the support substrate 101 also has a cathode potential (the metal layer 630 functions as part of the cathode wiring), which contributes to reducing the resistance value of the entire cathode wiring.

  By using the metal layer 630 of the support substrate 101 in combination with the upper electrode 508 having a high resistivity, the resistance of the entire cathode wiring can be reduced. As a result, a display device without display unevenness due to the voltage drop of the cathode electrode can be realized.

[Cathode contact: second example]
FIG. 6A is a diagram illustrating a layer structure of a second example for connecting the support substrate 101 and the upper electrode 508 in the display panel unit 100. FIG. 6A is a cross-sectional view taken along line CC ′ through the cathode contact KC portion in FIGS. 3, 4, and 4A.

  The second example uses the cathode contact KC connected to the auxiliary wiring 515 arranged so as to surround the entire pixel array portion 102, and the upper portion of the support substrate 101 (specifically, a metal layer provided thereabove) and the upper portion. This is an embodiment in which the electrode 508 is electrically connected. As the support substrate 101, for example, a non-metallic material such as glass (not a conductor) is used.

  As shown in the drawing, a metal layer 630 is laminated on the entire surface of the support substrate 101, an insulating film 632 is formed thereon, and an element formation layer 500 for the pixel array unit 102 is formed thereon. Yes. A portion of the metal layer 630 on the support substrate 101 facing the cathode contact pad CPk_2 is electrically connected directly to the cathode contact pad CPk_1 without the insulating film 632 interposed therebetween. The cathode contact pad CPk_2 connects the cathode auxiliary electrode 504_2 and the upper electrode 508 (that is, the cathode electrode) serving as the auxiliary wiring 515 (metal layer) that surrounds the entire circumference of the pixel array unit 102, and has a cathode potential. The cathode contact pad CPk_2 connected to the cathode auxiliary electrode 504_2 is also at the cathode potential. Therefore, the metal layer 630 of the support substrate 101 also has a cathode potential (the metal layer 630 functions as part of the cathode wiring), which contributes to reducing the resistance value of the entire cathode wiring.

  By using the metal layer 630 of the support substrate 101 in combination with the upper electrode 508 having a high resistivity, the resistance of the entire cathode wiring can be reduced. As a result, a display device without display unevenness due to the voltage drop of the cathode electrode can be realized.

  Although not shown, the resistance value of the entire cathode wiring may be further reduced by combining the first example and the second example.

[Cathode contact: third example]
FIG. 6B is a diagram for explaining a layer structure of a third example for connecting the support substrate 101 and the upper electrode 508 in the display panel unit 100. In the third example, a conductive substrate such as stainless steel SUS is used as the support substrate 101. This is similar to the first example, in which the conductive support substrate 101 and the upper electrode 508 are electrically connected using the cathode contact KC connected to the auxiliary wiring 515 between the pixels.

  The third example has a structure in which an insulating film 620 is laminated on the entire surface of a conductive substrate (in this example, a SUS substrate) which is the support substrate 101, and an element formation layer 500 for the pixel array unit 102 is formed thereon. Yes. The insulating film 620 is, for example, an organic insulating film 620a on the support substrate 101 side and an inorganic insulating film 620b on the metal layer 622 side so as to be in close contact with an electrostatic chuck.

  A portion of the support substrate 101 facing the cathode contact pad CPk_1 is directly electrically connected to the cathode contact pad CPk_1 without the insulating film 620 interposed therebetween. The cathode auxiliary electrode 504_2 connected to the upper electrode 508 (cathode electrode) in the pixel array portion 102 and the conductive support substrate 101 are electrically connected. Hereinafter, it is the same as that of the 1st example. By using the support substrate 101 having conductivity itself in combination with the upper electrode 508 having a high resistivity, the resistance of the entire cathode wiring can be reduced.

[Cathode contact: Fourth example]
FIG. 6C is a diagram illustrating a layer structure of a fourth example for connecting the support substrate 101 and the upper electrode 508 in the display panel unit 100. In the fourth example, a conductive substrate such as stainless steel SUS is used as the support substrate 101. Similar to the second example, the support substrate 101 and the upper electrode 508 are electrically connected using the cathode contact KC connected to the auxiliary wiring 515 arranged so as to surround the entire pixel array unit 102. It is an aspect to do.

  In the fourth example, similarly to the third example, an insulating film 620 is laminated on the entire surface of a conductive substrate (SUS substrate) which is the support substrate 101, and an element formation layer 500 for the pixel array unit 102 is formed thereon. It has a structure. The insulating film 620 is, for example, an organic insulating film 620a on the support substrate 101 side and an inorganic insulating film 620b on the metal layer 622 side so as to be in close contact with an electrostatic chuck.

  The portion of the support substrate 101 that faces the cathode contact pad CPk_2 is electrically connected directly to the cathode contact pad CPk_2 without the insulating film 620 interposed therebetween. The cathode auxiliary electrode 504_2 provided so as to surround the pixel array portion 102 and connected to the upper electrode 508 (cathode electrode) is electrically connected to the conductive support substrate 101. Hereinafter, it is the same as that of the 2nd example. By using the support substrate 101 having conductivity itself in combination with the upper electrode 508 having a high resistivity, the resistance of the entire cathode wiring can be reduced.

  Although not shown, the resistance value of the entire cathode wiring may be further reduced by combining the third example and the fourth example.

  As described above, in any of the first to fourth examples, the support substrate 101 having conductivity is configured to function as a part of the cathode wiring. Therefore, even when the upper electrode 508 having a high resistivity is used, Even when the auxiliary wiring 515 is not used, the resistance of the entire cathode wiring can be reduced. There is an advantage that the existing metal layer (cathode contact pads CPk_1, CPk_2) can be used as a member for connecting the conductive support substrate 101 and the upper electrode 508. By applying such a mechanism, it is possible to realize a display device that does not have display unevenness such as shading.

  In any of the methods of the first to fourth examples, when there is an auxiliary wiring 515 that reduces the wiring resistance of the cathode electrode of the organic EL element 127, the cathode contact KC that connects the auxiliary wiring 515 and the upper electrode 508 is used. By utilizing this, the upper electrode 508 and the electrically conductive support substrate 101 are electrically connected. In the case of the display panel unit 100 in which the auxiliary wiring 515 is not provided, the upper electrode 508 and the conductive support substrate 101 are physically connected by a connection structure having a mechanism similar to that of the cathode contact KC (cathode contact pad CPk). It is only necessary to establish an electrical connection between the two by connecting them to each other.

<Electronic equipment>
The display devices to which the countermeasures for reducing the resistance of the cathode wiring of the present embodiment, including the organic EL display device 1 of the present embodiment described above, are generated in the video signal input to the electronic device or in the electronic device. The present invention can be applied to display devices for electronic devices in various fields that display video signals as images or videos. As an example, the present invention can be applied to various electronic devices shown in FIGS. 7 to 7B, for example, digital cameras, notebook personal computers, mobile terminal devices such as mobile phones, and display devices such as video cameras.

  Note that the display device includes a module-shaped device having a sealed configuration. The display module may be provided with a circuit portion, an FPC, and the like for inputting / outputting a signal to / from the pixel array portion from the outside.

  Hereinafter, a specific example of an electronic device on which the display device to which the countermeasure for reducing the resistance of the cathode wiring according to this embodiment is applied will be described.

  FIG. 7A is a perspective view showing an appearance of a television set on which a display device to which the cathode wiring resistance reduction measure of the present embodiment is applied is mounted. The television set includes a video display screen unit 901 including a front panel 902, a filter glass 903, and the like, and is manufactured by using the display device according to the present embodiment as the video display screen unit 901.

  FIG. 7 (2) is a perspective view showing the external appearance of a digital camera equipped with a display device to which the cathode wiring resistance reduction measure of the present embodiment is applied, and FIG. 7 (2-1) is a perspective view seen from the front side. FIG. 7 and FIG. 7 (2-2) are perspective views seen from the back side. The digital camera includes a flash light emitting unit 911, a display unit 912, a menu switch 913, a shutter button 9114, and the like, and is manufactured by using the display device according to the present embodiment as the display unit 912.

  FIG. 7A (1) is a perspective view showing the appearance of a notebook personal computer on which a display device to which the countermeasure for reducing the resistance of the cathode wiring according to this embodiment is applied is mounted. The notebook personal computer includes a main body 921 that includes a keyboard 122 that is operated when characters and figures are input, a display unit 923 that displays an image, and the like, and the display device according to the present embodiment is used as the display unit 923. Produced.

  FIG. 7A (2) is a perspective view showing an appearance of a video camera equipped with a display device to which the countermeasure for reducing the resistance of the cathode wiring according to this embodiment is applied. The video camera includes a main body 931, a lens 932 for shooting an object on the side facing forward, a start / stop switch 933 at the time of shooting, a display unit 934, and the like, and the display device according to the present embodiment is used as the display unit 934. It is produced by this.

  FIG. 7B is an external view showing a mobile phone (an example of a mobile terminal device) on which the display device to which the countermeasure for reducing the resistance of the cathode wiring according to the present embodiment is applied is mounted. 7B (1) is a front view in an open state, FIG. 7B (2) is a side view thereof, FIG. 7B (3) is a front view in a closed state, FIG. 7B (4) is a left side view, and FIG. (5) is a right side view, FIG. 7B (6) is a top view, and FIG. 7B (7) is a bottom view. The cellular phone includes an upper housing 941, a lower housing 942, a connecting portion 943 (here, a hinge portion), a display 944, a sub display 945, a picture light 946, a camera 947, and the like. Then, by using the display device according to the present embodiment as the display 944 or the sub display 945, a mobile phone is manufactured.

  As mentioned above, although this invention was demonstrated using embodiment, the technical scope of this invention is not limited to the range as described in the said embodiment. Various changes or improvements can be added to the above-described embodiment without departing from the gist of the invention, and embodiments to which such changes or improvements are added are also included in the technical scope of the present invention.

  Further, the above embodiments do not limit the invention according to the claims (claims), and all combinations of features described in the embodiments are not necessarily essential to the solution means of the invention. Absent. The embodiments described above include inventions at various stages, and various inventions can be extracted by appropriately combining a plurality of disclosed constituent elements. Even if some constituent requirements are deleted from all the constituent requirements shown in the embodiment, as long as an effect is obtained, a configuration from which these some constituent requirements are deleted can be extracted as an invention.

<Modification of Pixel Circuit>
For example, the change from the side surface of the pixel circuit P is possible. For example, since “dual theory” holds in circuit theory, the pixel circuit P can be modified from this point of view. In this case, although illustration is omitted, first, the image circuit P shown in the above-described embodiment is configured using the n-type drive transistor 121, whereas the pixel circuit using the p-type drive transistor 121 is used. P is constructed. In accordance with this, a change according to the dual reason, such as reversing the polarity of the signal amplitude ΔVin with respect to the offset potential Vofs of the video signal Vsig and the magnitude of the power supply voltage, is added.

  In the organic EL display device of the modified example in which the drive transistor 121 is made p-type by applying such dual reason, the threshold correction operation and the mobility are similar to the organic EL display device made of the n-type drive transistor 121. The correction operation and the bootstrap operation can be executed, and a countermeasure for reducing the cathode wiring resistance can be applied.

  The modified example of the pixel circuit P described here is obtained by adding a change according to “dual theory” to the configuration shown in the above embodiment, but the method of changing the circuit is not limited thereto. It is not something. In executing the threshold correction operation, the video signal Vsig that is switched between the offset potential Vofs and the signal potential Vin (= Vofs + ΔVin) within each horizontal period in accordance with the scanning by the writing scanning unit 104 is transmitted to the video signal line 106HS. The pixel circuit P is configured as long as the drive is performed in such a manner that the drain side (power supply side) of the drive transistor 121 is switched between the first potential and the second potential for the threshold correction initialization operation. Any number of transistors can be used. Furthermore, as long as there is a problem that the wiring resistance of the electrode having light transmittance on the display surface side when the top emission method is adopted, the number of transistors and the number of storage capacitors constituting the pixel circuit P are not limited. The number of transistors may be three or more, and the above-described measures for reducing the resistance of the cathode wiring according to the present embodiment can be applied to all of them.

  Further, the mechanism for supplying the offset potential Vofs and the signal potential Vin to the gate of the drive transistor 121 in executing the threshold correction operation is not limited to the video signal Vsig as in the 2TR configuration, As described in Japanese Patent Laid-Open No. 2006-215213, a mechanism for supplying via another transistor may be employed.

  In these modified examples, when the top emission method is adopted, the phenomenon that the wiring resistance of the upper electrode having light transmittance on the display surface side increases and the display quality is deteriorated is caused by the upper support substrate having conductivity. It is possible to apply the idea of this embodiment, which is solved by making it function as a part of the electrode (a measure for reducing the resistance of the cathode wiring).

  DESCRIPTION OF SYMBOLS 1 ... Organic EL display device, 100 ... Display panel part, 101 ... Support substrate, 102 ... Pixel array part, 103 ... Vertical drive part, 104 ... Write scanning part, 104WS ... Write scanning line, 105 ... Drive scanning part, 105DSL ... Power supply line 106 ... Horizontal drive unit 106HS ... Video signal line 109 ... Control unit 120 ... Retention capacitor 121 ... Drive transistor 125 ... Sampling transistor 127 ... Organic EL element 200 ... Drive signal generation unit , 300: Video signal processing unit, 620, 632 ... Insulating film, 630 ... Metal layer, P ... Pixel circuit

Claims (5)

A display panel unit including a display region in which electro-optic elements that emit display light are arranged in a matrix on a support substrate;
A light transmissive electrode constituting the electro-optic element is formed on the display surface side of the display panel portion so as to correspond to the display region, and the display light is emitted through the light transmissive electrode. And
The display panel portion is provided so as to surround the outside of the display region and pass between the adjacent electro-optic elements, and an auxiliary wiring connected to the light-transmissive electrode is formed.
The support substrate has electrical conductivity, and is connected to the auxiliary wiring and the light transmissive electrode by a contact portion continuously provided so as to surround the outside of the display region. It is connected to the auxiliary wiring and the light transmissive electrode by a contact portion provided between optical elements,
Display device. The display panel unit includes a driving transistor that generates a driving signal, the electro-optic element connected to an output terminal of the driving transistor, a holding capacitor that holds information according to the signal amplitude of a video signal, and the signal amplitude Pixel circuits having sampling transistors for writing the information to the storage capacitor are arranged in a matrix,
The display device according to claim 1. The entire support substrate has conductivity.
The display device according to claim 1. The conductive support substrate is constituted by a non-metallic substrate and a metal layer formed on the non-metallic substrate,
A metal layer formed on the non-metallic substrate is electrically connected to the auxiliary wiring and the light-transmissive electrode by the contact portion;
The display device according to claim 1. A display device having a display panel unit including a display region in which electro-optic elements that emit display light are arranged in a matrix on a support substrate;
A light transmissive electrode constituting the electro-optic element is formed on the display surface side of the display panel portion so as to correspond to the display region, and the display light is emitted through the light transmissive electrode. And
The display panel portion is provided so as to surround the outside of the display region and pass between the adjacent electro-optic elements, and an auxiliary wiring connected to the light-transmissive electrode is formed.
The support substrate has electrical conductivity, and is connected to the auxiliary wiring and the light transmissive electrode by a contact portion continuously provided so as to surround the outside of the display region. It is connected to the auxiliary wiring and the light transmissive electrode by a contact portion provided between optical elements,
Electronics.

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