JP5605026B2 - Electronic component manufacturing method and electronic component - Google Patents

Description

  The present invention relates to an electronic component having a wiring layer and a method for manufacturing the same.

  In order to suppress diffusion of elements in the conductive part to the surrounding insulating layer due to energization and heat generated by electronic parts such as circuit boards and semiconductor devices having conductive parts such as wiring provided in the insulating layer. A technique for providing a barrier metal layer around a conductive portion is known. For example, it is known to form tantalum (Ta), titanium (Ti), or a nitride thereof as a barrier metal layer by using a CVD (Chemical Vapor Deposition) method, a sputtering method, or the like. Also known is a method of forming cobalt tungsten phosphorus (CoWP), nickel phosphorus (NiP) or the like as a barrier metal layer using an electroless plating method.

JP 2005-206905 A JP 2001-316634 A JP 2004-260106 A JP 2007-246978 A

  However, even if a barrier metal layer is provided around the conductive part as described above, element diffusion from the conductive part to the insulating layer cannot be sufficiently suppressed depending on the material, thickness, film quality, etc. of the barrier metal layer There is. If the barrier metal layer is thickened, element diffusion can be suppressed. However, for example, depending on the pitch set between adjacent conductive parts, a sufficient thickness may not be secured for the barrier metal layer formed in each conductive part, and the resistance can be increased by increasing the thickness of the barrier metal layer. In some cases, a problem such as an increase occurs.

According to one aspect of the present invention, a step of forming a conductive portion on the first insulating layer, a step of forming a barrier metal layer on the conductive portion, and an unshared electron pair on the barrier metal layer A first layer including a first compound having at least two functional groups; and a second layer including a second compound provided on the first layer and including at least two functional groups having an unshared electron pair. There is provided a method of manufacturing an electronic component including a step of forming a compound layer and a step of forming a second insulating layer on the compound layer.

  According to the disclosed method, element diffusion from the conductive portion to the insulating layer can be effectively suppressed, and a highly reliable electronic component can be obtained.

It is explanatory drawing of an example of a wiring structure. It is a figure which shows an example of a circuit board. It is a principal part enlarged view of an example of a circuit board. It is a principal part cross-sectional schematic diagram of the 1st process of circuit board formation. It is a principal part cross-sectional schematic diagram of the 2nd process of circuit board formation. It is a principal part cross-sectional schematic diagram of the 3rd process of circuit board formation. It is a principal part cross-sectional schematic diagram of the 4th process of circuit board formation. It is a principal part cross-sectional schematic diagram of the 5th process of circuit board formation. It is a principal part cross-sectional schematic diagram of the 6th process of circuit board formation. It is a principal part cross-sectional schematic diagram of the 7th process of circuit board formation. It is a principal part cross-sectional schematic diagram of the 8th process of circuit board formation. It is a principal part cross-sectional schematic diagram of the 9th process of circuit board formation. It is a principal part cross-sectional schematic diagram of the 10th process of circuit board formation. It is a principal part cross-sectional schematic diagram of the 11th process of circuit board formation. It is explanatory drawing of element capture | acquisition by a compound layer. It is a figure which shows an example of a semiconductor device. It is a figure which shows another example of a semiconductor device.

  FIG. 1 is an explanatory diagram of an example of a wiring structure. 1A is a schematic cross-sectional view of the main part of the conductive part forming process, FIG. 1B is a schematic cross-sectional view of the main part of the barrier metal layer forming process, and FIG. 1C is a schematic cross-sectional view of the main part of the insulating layer forming process. is there.

  First, as shown in FIG. 1A, a conductive portion 2 to be a wiring is formed on the first insulating layer 1. The conductive portion 2 can be formed using, for example, a metal material mainly composed of copper (Cu) or a Cu alloy.

  Next, a barrier metal layer 3 is formed on the formed conductive portion 2 as shown in FIG. The barrier metal layer 3 can be formed using various metal materials capable of suppressing elements such as Cu contained in the conductive portion 2 from diffusing outside the conductive portion 2. Further, on the formed barrier metal layer 3, as shown in FIG. 1B, a compound layer 4 containing a compound having two or more functional groups having unshared electron pairs in one molecule is formed. . Such a compound layer 4 can be formed using, for example, a chelating agent or a coupling agent.

Then, as shown in FIG. 1C, a second insulating layer 5 is formed so as to cover the conductive portion 2 on which the barrier metal layer 3 and the compound layer 4 are formed.
In the wiring structure thus formed, the diffusion of an element such as Cu contained in the conductive portion 2 into the second insulating layer 5 is first suppressed by the barrier metal layer 3. However, depending on the material, thickness, film quality, and the like of the barrier metal layer 3, the barrier metal layer 3 alone may not sufficiently suppress such element diffusion from the conductive portion 2. Even in such a case, the diffusion of the element that has passed through the barrier metal layer 3 to the second insulating layer 5 is suppressed by the compound layer 4 provided on the outside thereof.

  As described above, the compound layer 4 includes a compound including two or more functional groups having an unshared electron pair. By forming such a compound layer 4, an element that has passed through the barrier metal layer 3 is coordinated to the compound in the compound layer 4 using a lone pair and trapped in the compound layer 4. To do. As a result, the element diffused from the conductive portion 2 due to energization to the conductive portion 2, heat generated thereby, heat transfer from the outside, etc., and has passed through the barrier metal layer 3 diffuses into the second insulating layer 5. Can be effectively suppressed.

  The compound layer 4 includes, for example, an amount of a compound (functional group) that can capture an element that diffuses from the conductive portion 2 and passes through the barrier metal layer 3. The compound layer 4 can be formed with an arbitrary thickness. For example, the compound layer 4 can be formed with a thin film thickness of one compound molecule to several layers.

  In forming the wiring structure as shown in FIG. 1C, the barrier metal layer 3 formed in the step of FIG. 1B can be formed using, for example, an electroless plating method. For example, a NiP layer, a CoWP layer, or the like can be formed as the barrier metal layer 3 using an electroless plating method.

  In terms of performance (barrier property) for suppressing diffusion of elements contained in the conductive portion 2, CoWP can exhibit higher barrier property than NiP. However, in CoWP electroless plating, it is not always easy to stabilize cobalt (Co) ions, tungsten (W) ions, etc. in the plating solution. Life is relatively short. On the other hand, NiP can exhibit lower barrier properties than CoWP, but the plating solution during electroless plating is excellent in stability, the plating solution life is relatively long, and the plating solution management is relatively easy. Although the barrier property of NiP is increased by increasing the film thickness, there is a risk of increasing the resistance of the wiring portion.

  In the wiring structure as shown in FIG. 1C, even if a material such as NiP that can exhibit a low barrier property is used for the barrier metal layer 3, it is relatively easy to form. Can be suppressed. That is, even when the barrier metal layer 3 is formed using a material such as NiP, a certain barrier property can be secured thereby. Even if the element of the conductive portion 2 passes through such a NiP barrier metal layer 3, the element can be captured by the compound layer 4 provided on the outside thereof, and element diffusion to the outside can be suppressed. .

  Furthermore, in the wiring structure as shown in FIG. 1C, since such a compound layer 4 is provided, the barrier metal layer 3 is thinner than the case where the compound layer 4 is not provided regardless of the material. Can be formed. Furthermore, the compound layer 4 itself can also be formed thin. Therefore, it is possible to miniaturize the wiring pattern including the conductive portion 2 and the barrier metal layer 3 around it. Alternatively, when a plurality of wiring patterns are formed in the same layer, the pitch between the wiring patterns can be reduced.

  Although the NiP layer and the CoWP layer have been described as an example of the barrier metal layer 3 here, other materials can be used for the barrier metal layer 3, and in that case, the fineness of the wiring pattern is also possible. It is possible to obtain the same effects as described above, such as a reduction in pitch and a reduction in pitch. For example, a nickel tungsten phosphorous (NiWP) layer, a nickel boron (NiB) layer, a cobalt phosphorous (CoP) layer, a cobalt boron (CoB) layer, or the like can be formed as the barrier metal layer 3.

  Here, the case where the barrier metal layer 3 is formed using an electroless plating method has been described as an example, but the barrier metal layer 3 is formed using a CVD method, a sputtering method, or the like depending on the material used. You can also Also in this case, it is possible to suppress element diffusion of the conductive portion 2 by providing the compound layer 4 thereon. However, when such a CVD method or sputtering method is used, the size of the substrate (wafer or the like) on which the wiring structure as described above is increased, resulting in an increase in the size of the CVD device or sputtering device, thereby increasing the cost. There is a possibility of inviting. On the other hand, the plating method has an advantage that it can cope with an increase in the size of the substrate.

  Various compounds can be used for the compound layer 4 formed in the step of FIG. 1B as long as the compound layer has two or more functional groups having an unshared electron pair in one molecule. . Moreover, the compound layer 4 should just contain at least 1 sort of such a compound, and may contain multiple types. Examples of the functional group having an unshared electron pair include a mercapto group, a hydroxyl group, a carboxyl group, a carbonyl group, an epoxy group, an amino group, and an imidazole group. Examples of the compound having such a functional group include chelating agents such as triazine thiols and organic acids (such as citric acid), and coupling agents such as silane coupling agents.

  By forming such a compound on the barrier metal layer 3, the compound layer 4 is formed. When forming the compound layer 4 in FIG. 1B, for example, first, a solution containing a predetermined amount of the predetermined compound as described above is prepared, and the solution is immersed on the barrier metal layer 3 by a dipping method, a spray method, It is made to adhere using a spin coating method or the like. And the compound contained in the solution is made to adhere on the barrier metal layer 3 by drying the solution.

  At this time, for example, at least one functional group among two or more functional groups having an unshared electron pair contained in the compound is directly bonded to the surface of the barrier metal layer 3. When there is a functional group that does not directly bond to the barrier metal layer 3, the functional group can be a trapping site for an element that diffuses from the conductive portion 2 and passes through the barrier metal layer 3. That is, an element passing through the barrier metal layer 3 is coordinated to the functional group via an unshared electron pair present in the functional group.

  In addition, depending on the type of the second insulating layer, such as when the second insulating layer 5 is formed using a resin material, a functional group in the compound that does not directly bond to the barrier metal layer 3 reacts with the second insulating layer 5. Can do. By such a reaction, the adhesion of the second insulating layer 5 is improved. Even when such a reaction occurs, if a non-shared electron pair exists in the functional group after the reaction, the functional group diffuses from the conductive portion 2 and passes through the barrier metal layer 3. It can be a trapping site for coming elements.

  Note that the compound layer 4 may contain a compound having a functional group that does not bind to either the barrier metal layer 3 or the second insulating layer 5. In such a case, any functional group having an unshared electron pair contained in the compound can function as a trapping site for an element that diffuses from the conductive portion 2 and passes through the barrier metal layer 3.

  A compound containing two or more functional groups having an unshared electron pair has an element (element on the surface of the barrier metal layer 3, element on the surface of the second insulating layer 5) in any functional group having an unshared electron pair in the molecule. When the element, the diffusion element from the conductive portion 2) is bonded, it is in a chemically stable state. Such a compound in a stable state does not easily desorb from the elements (elements on the surface of the barrier metal layer 3, elements on the surface of the second insulating layer 5, and diffusion elements from the conductive portion 2). If the element bonded to the compound in the stable state includes a diffusing element from the conductive portion 2, the element stays in the compound layer 4, thereby diffusing into the second insulating layer 5. Is effectively suppressed.

Hereinafter, as an electronic component using the wiring structure as described above, a circuit board will be described as an example with reference to the drawings.
FIG. 2 is a diagram illustrating an example of a circuit board. FIG. 2 schematically shows a cross section of an example of a circuit board.

  A circuit board 100 shown in FIG. 2 includes a support substrate 10 and a wiring layer 20 formed on the support substrate 10. In FIG. 2, a multilayer wiring is illustrated as the wiring layer 20, and a multilayer circuit board is illustrated as the circuit board 100.

  As the support substrate 10, in addition to a semiconductor substrate such as silicon (Si), a resin substrate mixed with glass fiber can be used. Although not shown in FIG. 2, a wiring pattern that is electrically connected to the wiring layer 20 may be formed on the surface of the support substrate 10.

  The wiring layer 20 has a wiring pattern 20 a including wiring and vias embedded in the insulating layer 21. For the insulating layer 21, for example, a resin material such as polyimide resin or epoxy resin can be used. For example, a metal material can be used for the wiring pattern 20a.

2 illustrates the circuit board 100 in which the wiring layers 20 are formed on both surfaces of the support substrate 10. However, the wiring layers 20 may be formed only on one surface of the circuit board 100.
FIG. 3 is an enlarged view of a main part of an example of the circuit board. FIG. 3 is an enlarged view of a portion X in FIG.

  As shown in FIG. 3, the lower wiring pattern 20 a is formed, for example, on a first insulating layer 21 a (a part of the insulating layer 21) formed on the support substrate 10. Here, as an example, the wiring pattern 20a on the lower layer side is formed on the conductive portion 22 including the adhesion layer 22a such as Ti, the seed layer 22b such as Cu, and the wiring 22c such as Cu, and the surface of the conductive portion 22. The case where the barrier metal layer 23 is included is shown. For the barrier metal layer 23, for example, NiP formed using an electroless plating method is used. A compound layer 24 is provided on the surface of the barrier metal layer 23. For the compound layer 24, a compound having two or more functional groups having an unshared electron pair in one molecule, such as a chelating agent or a coupling agent, is used.

  The lower wiring pattern 20a on which the compound layer 24 is formed is covered with a second insulating layer 21b (a part of the insulating layer 21), and is connected to the lower wiring pattern 20a on the second insulating layer 21b. The upper wiring pattern 20a thus formed is formed. Here, as an example, the upper wiring pattern 20a is formed on the surface of the conductive portion 22 including the adhesion layer 22a such as Ti, the seed layer 22b such as Cu, the via 22d such as Cu and the wiring 22c, and the surface of the conductive portion 22. The case where the formed barrier metal layer 23 is included is shown. The upper barrier metal layer 23 is formed on the surface of the upper conductive portion 22 exposed from the second insulating layer 21b. A compound layer 24 is provided on the surface of the upper barrier metal layer 23.

The upper wiring pattern 20a on which the compound layer 24 is formed is covered with a third insulating layer 21c (a part of the insulating layer 21).
Next, an example of a method for forming the circuit board 100 having the above configuration will be described in order with reference to FIGS. Here, FIG. 4 to FIG. 14 are schematic cross-sectional views of the relevant part of the first to eleventh steps of circuit board formation. Here, an example of a method of forming the circuit board 100 will be described by taking the X portion shown in FIG. 3 as an example.

  First, as shown in FIG. 4, the first insulating layer 21 a is formed on the support substrate 10. The first insulating layer 21a is formed using an insulating resin such as a thermosetting polyimide resin, for example. In this case, first, such an insulating resin is applied on the support substrate 10 using a technique such as spin coating, and then cured and cured.

  Next, as shown in FIG. 4, an adhesion layer 22a and a seed layer 22b are formed on the first insulating layer 21a. Here, a Ti layer is formed as the adhesion layer 22a, and a Cu layer is formed as the seed layer 22b. These Ti layer (adhesion layer 22a) and Cu layer (seed layer 22b) are formed by sputtering, for example. Next, as shown in FIG. 4, a resist 31 is formed on the seed layer 22b. The resist 31 is provided with an opening 31a in a region where the lower wiring 22c is formed.

  After the formation of the resist 31, as shown in FIG. 5, the wiring 22c is formed in the opening 31a. Here, a Cu layer or a Cu alloy layer is formed as the wiring 22c. The Cu layer or the Cu alloy layer (wiring 22c) is formed by electrolytic plating using the seed layer 22b exposed from the opening 31a of the resist 31. After the wiring 22c is formed by the electrolytic plating method, the resist 31 is removed as shown in FIG. After the removal of the resist 31, the portion of the seed layer 22b and the adhesion layer 22a covered with the resist 31 is removed by etching. As a result, as shown in FIG. 7, the lower conductive portion 22 is obtained in which the wiring 22c is formed on the first insulating layer 21a via the adhesion layer 22a and the seed layer 22b.

  Next, as shown in FIG. 8, a barrier metal layer 23 is formed on the surface of the conductive portion 22 exposed on the first insulating layer 21a. Here, a NiP layer is formed as the barrier metal layer 23. The NiP layer (barrier metal layer 23) is formed by an electroless plating method.

  After the formation of the barrier metal layer 23, as shown in FIG. 9, the surface includes a compound such as a chelating agent or a coupling agent having two or more functional groups having an unshared electron pair in one molecule. The compound layer 24 is formed. In that case, for example, first, a solution containing a predetermined amount of a predetermined compound (an aqueous solution, a solution containing water, etc.) is prepared, and the substrate that has been subjected to the formation of the barrier metal layer 23 is immersed in the solution. Or the process which sprays the solution with respect to the board | substrate which performed until formation of the barrier metal layer 23 is performed. Alternatively, the substrate that has been subjected to the formation of the barrier metal layer 23 is spin-coated with the solution. After performing such immersion treatment, spray treatment or spin coating treatment (solution adhesion treatment), the compound layer 24 is formed on the surface of the barrier metal layer 23 by drying.

  A compound such as a chelating agent or a coupling agent mainly has a predetermined functional group in the compound at a predetermined binding site (surface metal, surface hydroxyl group, etc.) existing on the surface of the barrier metal layer 3 at an early stage of formation. Bond through a group. A functional group in the compound that does not directly bond to the surface of the barrier metal layer 3 can serve as a capturing site for capturing Cu or the like that diffuses from the conductive portion 22 and passes through the barrier metal layer 23.

  When forming the compound layer 24, for example, the liquidity (pH, viscosity, etc.) of the treatment solution used for the solution adhesion treatment, the compound concentration in the treatment solution, treatment conditions (immersion time, spray time, substrate rotation conditions, etc.) ) And drying conditions (temperature, time, atmosphere, etc.).

  The liquidity such as the pH of the treatment solution is set in consideration of the stability of the treatment solution and the suppression of the reaction between the compounds, depending on the type of compound used, such as a chelating agent or a coupling agent. The amount of compound on the surface of the barrier metal layer 3 after drying can be controlled by controlling the compound concentration in the treatment solution with adjusted liquidity and the treatment conditions with the treatment solution. A compound can be formed with good uniformity over the entire surface. For example, the compound can be formed over the entire surface of the barrier metal layer 3 with a thickness of about a monomolecular layer, or with a thickness of about several molecular layers.

  For example, the compound concentration in the treatment solution is preferably set to 0.001 wt% to 10 wt%, and more preferably set to 0.01 wt% to 5 wt%. When the compound concentration in the treatment solution is less than 0.001 wt%, the compound layer 24 that sufficiently covers the surface of the barrier metal layer 23 may not be formed. In addition, when the compound concentration in the treatment solution exceeds 10 wt%, there is a possibility that the reaction between the compounds is likely to occur, whereby functional groups that can function as a capturing site for Cu or the like in the compound layer 24 are formed. There is a possibility that the number will decrease. The treatment conditions may be set such that, for example, when a treatment solution having such a compound concentration is used, the compound is formed uniformly over the entire surface of the barrier metal layer 3 with a predetermined thickness. preferable.

  Although FIG. 9 shows the case where the compound layer 24 is selectively formed on the surface of the barrier metal layer 23, the compound layer 24 includes the first insulating layer 21 a in addition to the surface of the barrier metal layer 23. It may also be formed on the surface of the film. In the case where the first insulating layer 21a is formed of an insulating resin such as a thermosetting polyimide resin as in this example, the compound layer 24 has already been cured until it is formed. Therefore, it is unlikely that the compound in the compound layer 24 reacts with the molecules in the first insulating layer 21a and is strongly bonded to the first insulating layer 21a. The compound adhering to the first insulating layer 21a in the solution adhering process using the processing solution containing the compound as described above may be detached together with the solvent in the drying stage, and may remain without being desorbed. However, since the circuit itself is insulative, no electrical failure occurs.

  After the formation up to the formation of the compound layer 24 as described above, the second insulating layer 21b is formed on the substrate that has been formed up to the formation of the compound layer 24, as shown in FIG. The second insulating layer 21b is formed, for example, by applying an insulating resin such as thermosetting polyimide using a technique such as spin coating, and then curing by curing.

  Depending on the material used for the insulating resin of the second insulating layer 21 b and the type of compound contained in the compound layer 24, the insulating resin and the compound in the compound layer 24 may vary between application and curing of the insulating resin. The reaction can occur. When such a reaction occurs, the adhesion of the second insulating layer 21b is improved.

  After the formation of the second insulating layer 21b, as shown in FIG. 11, the second insulating layer 21b, the compound layer 24, and the barrier metal layer 23 are etched to form a via hole 22da that reaches the lower wiring 22c.

  After the formation of the via hole 22da, as shown in FIG. 12, first, for example, a sputtering method is used to form a Ti layer as the adhesion layer 22a and a Cu layer as a seed layer 22b thereon. Subsequently, a resist 32 having an opening 32a formed so as to communicate with the via hole 22da is formed in a region where the upper layer side wiring 22c is to be formed. Then, using the seed layer 22b exposed from the opening 32a, Cu or Cu alloy is deposited in the via hole 22da and the opening 32a by electrolytic plating to form the via 22d and the upper layer side wiring 22c.

  After the vias 22d and the upper wirings 22c are formed in this way, the resist 32 is removed, and the seed layer 22b and the adhesion layer 22a covered with the resist 32 are removed by etching. As a result, as shown in FIG. 13, the upper conductive portion 22 in which the via 22d and the wiring 22c are formed on the second insulating layer 21b via the adhesion layer 22a and the seed layer 22b is obtained.

  After the formation of the upper conductive portion 22, as shown in FIG. 14, a barrier metal layer 23 is formed on the surface of the conductive portion 22 exposed on the second insulating layer 21b, and a compound layer is further formed on the surface. 24 is formed. Here, as the barrier metal layer 23, a NiP layer is formed using an electroless plating method. Further, the compound layer 24 is formed by performing a solution adhesion treatment and drying using a compound such as a chelating agent or a coupling agent having two or more functional groups having an unshared electron pair in one molecule.

  After the formation of the barrier metal layer 23 and the compound layer 24, the third insulating layer 21c is formed on the substrate that has been formed up to the formation of the barrier metal layer 23 and the compound layer 24. Thereby, the wiring structure as shown in FIG. 3 is obtained, and the circuit board 100 as shown in FIG. 2 is obtained. The third insulating layer 21c is formed, for example, by applying an insulating resin such as thermosetting polyimide using a technique such as spin coating, and then curing and curing. At this time, when the insulating resin of the third insulating layer 21c reacts with the compound in the compound layer 24, the adhesion of the third insulating layer 21c is improved.

  In the circuit board 100 formed by the process as described above, diffusion of elements such as Cu contained in the conductive portion 22 into the second insulating layer 21b and the third insulating layer 21c is first suppressed by the barrier metal layer 23. . Even if the diffusing element has passed through the barrier metal layer 23, the diffusing element that has passed through is trapped in the compound layer 24, whereby the second insulating layer 21b or the third insulating layer of the element is captured. Diffusion to 21c is suppressed.

  FIG. 15 is an explanatory diagram of element capture by a compound layer. 15A is an explanatory diagram when the compound layer and the insulating layer are not reacted, and FIG. 15B is an explanatory diagram when the compound layer and the insulating layer are reacted.

  15A and 15B, Cu is used for the wiring 22c, NiP is used for the barrier metal layer 23, and an amino-based silane coupling agent 24a having an amino group is used for the compound in the compound layer 24. The case is illustrated.

  The silane coupling agent is hydrolyzed in the presence of water to generate a silanol group. The silane coupling agent 24a in FIGS. 15A and 15B is a reaction between the silanol group generated during the above-described solution adhesion treatment and the barrier metal layer 23 (reaction with the surface hydroxyl group of the barrier metal layer 23). ) To bond to the surface of the barrier metal layer 23. In FIGS. 15A and 15B, the carbon chain between the silanol group and the amino group is shown in a simplified manner. In FIGS. 15A and 15B, the single molecule silane coupling agent 24a bonded in this way is illustrated, but a plurality of silane coupling agents are similarly formed on the surface of the barrier metal layer 23. The molecule of the agent 24a is bound.

The insulating layer 21 (the second insulating layer 21b or the third insulating layer 21c) is formed outside the compound layer 24 including the silane coupling agent 24a using, for example, an insulating resin.
FIG. 15A illustrates a case where the amino group of the silane coupling agent 24 a remains without reacting with the insulating layer 21. This amino group has an unshared electron pair on the nitrogen (N) atom. When Cu22ca of the wiring 22c diffuses due to heat generation or heat transfer and passes through the NiP barrier metal layer 23, the silane coupling agent 24a coordinates to Cu22ca using the unshared electron pair of the amino group. Thereby, Cu22ca can be captured.

  FIG. 15B illustrates a case where the amino group of the silane coupling agent 24a is bonded to the insulating layer 21 of the insulating resin. The insulating layer 21 reacts with the amino group of the silane coupling agent 24a, whereby the adhesion of the insulating layer 21 is improved. Thus, also in the case of the silane coupling agent 24a bonded to the insulating layer 21, an unshared electron pair exists on the N atom in the amino group. When Cu22ca of the wiring 22c diffuses and passes through the NiP barrier metal layer 23, the silane coupling agent 24a coordinates to Cu22ca by using the unshared electron pair of the amino group, and thereby Cu22ca is Can be captured.

  In FIG. 15, the capture of Cu22ca has been described using the amino silane coupling agent 24a as an example. In addition, when compounds such as an epoxy silane coupling agent having an epoxy group and a mercapto silane coupling agent having a mercapto group are used, the compound diffuses in the same manner as shown in FIG. It is possible to capture the coming Cu22ca with the compound. Using various coupling agents having a functional group capable of capturing Cu22ca, the diffusing Cu22ca can be captured by the coupling agent.

  Further, in order to capture the diffusing Cu22ca, it is possible to use a chelating agent having a predetermined functional group in addition to such a coupling agent. It is possible to capture with a predetermined functional group of the chelating agent.

  The compound contained in the compound layer 24 is not limited to one type and may be a plurality of types. For example, a single-layer compound layer 24 in which a plurality of types of compounds are mixed can be formed, or a compound layer 24 having a structure in which layers of different types of compounds are stacked can be formed. The combination of compounds can be set in consideration of the type of functional group contained therein, the material of the binding partner (barrier metal layer 23, insulating layer 21), and the like.

  For example, a compound that mainly binds to both the barrier metal layer 23 and the insulating layer 21 with one molecule and improves the adhesion thereof, and a compound that mainly plays a role of capturing the diffusing element. These can be mixed in the single compound layer 24.

  It is also possible to form different types of compound layers on the barrier metal layer 23 side and the insulating layer 21 side. For example, when NiP is used for the barrier metal layer 23 and polyimide resin is used for the insulating layer 21, triazine thiol is formed on the barrier metal layer 23 side, and an amino silane coupling agent is formed on the insulating layer 21 side. In addition, when an epoxy resin is used for the insulating layer 21, an amino-based, epoxy-based or mercapto-based silane coupling agent is formed on the insulating layer 21 side, and an amino-based silane coupling is formed on the barrier metal layer 23 side. Forming agent or triazine thiol. By such a combination of compounds, it is possible to capture the diffusion element by the compound layer 24 and improve the adhesion between the barrier metal layer 23 and the insulating layer 21 of the compound layer 24.

  When the compound layer 24 is formed by laminating layers of different kinds of compounds in this way, first, the first kind of compound is used, and the solution adhesion treatment using the treatment solution containing the compound and the subsequent drying are performed. carry out. Next, solution adhesion treatment and drying are similarly performed using the second compound. When the compound layer 24 has a laminated structure of three or more layers, such a process may be repeated.

  In addition, the same kind of compound can also be formed by repeatedly performing the solution adhesion treatment and drying in this way. Among the solution adhesion treatments, for example, in the immersion treatment, the compound concentration of the treatment solution can be changed by repeating the immersion treatment such as treatment of a plurality of lots. Therefore, the surface of the barrier metal layer 23 is sufficient under the same immersion time conditions. It can also happen that the amount of compound does not bind. Even in such a case, it is possible to sufficiently bond an amount of the compound that can be bonded to the surface of the barrier metal layer 23 by repeatedly performing the dipping process.

  When using a method of repeatedly performing solution adhesion treatment and drying, for example, lowering the compound concentration of the treatment solution used each time, and performing the solution adhesion treatment using such a low concentration treatment solution Can do. By reducing the compound concentration of the treatment solution used each time, it becomes possible to form the compound layer 24 in which the compound is bonded to the surface of the barrier metal layer 23 with good uniformity. In addition, by reducing the compound concentration of the treatment solution, it is possible to extend the life of the treatment solution, facilitate management, and the like.

Next, the wiring structure as described above will be described with further specific examples.
[Example 1]
A thermosetting polyimide resin is formed on a Si substrate and cured to form a lower insulating resin layer, and then a Ti layer as an adhesion layer and a Cu layer as a seed layer are sputtered. Thus, each film is formed with a film thickness of 100 nm. Next, a positive resist is used to form a resist pattern in which an opening for forming a wiring having an L / S of 5 μm is formed. In the opening portion of the resist pattern, a Cu layer exposed from the opening portion is used as a seed layer, and a 5 μm Cu wiring is formed by electrolytic plating. After removing the resist, the Cu layer of the seed layer covered with the resist is removed by etching with an aqueous ammonium persulfate solution, and the Ti layer of the adhesion layer is further removed by etching with an aqueous hydrogen peroxide solution. Next, an NiP layer having a thickness of 0.2 μm is formed as a barrier metal layer on the surfaces of the Ti layer, Cu layer, and Cu wiring (conductive portion) by electroless plating. The Si substrate thus formed up to the formation of the NiP layer is immersed in a triazine thiol aqueous solution containing 1 wt% of triazine thiol as a compound, and a triazine thiol film is formed as a compound layer on the NiP layer surface. Then, a thermosetting polyimide resin is formed so as to cover the conductive part on which the triazine thiol film and the NiP layer are formed, and the upper insulating resin layer is formed by curing the polyimide resin. A wiring structure in which a conductive portion is formed is formed.

  The wiring structure thus formed was subjected to a bias test under the conditions of a temperature of 121 ° C. and a humidity of 85%, and then its cross-section was observed, and it was not confirmed that Cu was diffused in the polyimide. It was. This wiring structure was confirmed to be excellent in electromigration resistance.

[Example 2]
A thermosetting polyimide resin is formed on a Si substrate and cured to form a lower insulating resin layer, and then a Ti layer as an adhesion layer and a Cu layer as a seed layer are sputtered. Thus, each film is formed with a film thickness of 100 nm. Next, a positive resist is used to form a resist pattern in which an opening for forming a wiring having an L / S of 5 μm is formed. In the opening portion of the resist pattern, a Cu layer exposed from the opening portion is used as a seed layer, and a 5 μm Cu wiring is formed by electrolytic plating. After removing the resist, the Cu layer of the seed layer covered with the resist is removed by etching with an aqueous ammonium persulfate solution, and the Ti layer of the adhesion layer is further removed by etching with an aqueous hydrogen peroxide solution. Next, an NiP layer having a thickness of 0.2 μm is formed as a barrier metal layer on the surfaces of the Ti layer, Cu layer, and Cu wiring (conductive portion) by electroless plating. The Si substrate thus formed up to the formation of the NiP layer is immersed in a silane coupling agent aqueous solution containing 1 wt% of an amino silane coupling agent as a compound, and a silane coupling agent film is formed as a compound layer on the NiP layer surface. Form. Then, a thermosetting polyimide resin is formed so as to cover the conductive part on which the silane coupling agent film and the NiP layer are formed, and the upper insulating resin layer is formed by curing the resin, thereby insulating resin A wiring structure in which a conductive portion is formed in the layer is formed.

  The wiring structure thus formed was subjected to a bias test under the conditions of a temperature of 121 ° C. and a humidity of 85%, and then its cross-section was observed, and it was not confirmed that Cu was diffused in the polyimide. It was. This wiring structure was confirmed to be excellent in electromigration resistance.

[Example 3]
For the wiring structure formed by the procedure as in Example 1, the upper insulating resin layer covering the conductive portion including the Ti layer, the Cu layer and the Cu wiring, and the NiP layer on the surface thereof is peeled off, and after the peeling. The NiP layer surface and the peeled surface of the upper insulating resin layer were analyzed. As a result of analysis, it was confirmed that triazine thiol was present on the surface of the NiP layer and the peeled surface of the upper insulating resin layer.

[Example 4]
For the wiring structure formed in the procedure as in Example 2, the upper insulating resin layer covering the conductive part including the Ti layer, the Cu layer and the Cu wiring, and the NiP layer on the surface thereof is peeled off, and after the peeling. The NiP layer surface and the peeled surface of the upper insulating resin layer were analyzed. As a result of analysis, it was confirmed that an amino-based silane coupling agent (structure after hydrolysis) was present on the NiP layer surface and the release surface of the upper insulating resin layer.

[Comparative Example 1]
A thermosetting polyimide resin is formed on a Si substrate and cured to form a lower insulating resin layer, and then a Ti layer as an adhesion layer and a Cu layer as a seed layer are sputtered. Thus, each film is formed with a film thickness of 100 nm. Next, a positive resist is used to form a resist pattern in which an opening for forming a wiring having an L / S of 5 μm is formed. In the opening portion of the resist pattern, a Cu layer exposed from the opening portion is used as a seed layer, and a 5 μm Cu wiring is formed by electrolytic plating. After removing the resist, the Cu layer of the seed layer covered with the resist is removed by etching with an aqueous ammonium persulfate solution, and the Ti layer of the adhesion layer is further removed by etching with an aqueous hydrogen peroxide solution. Then, a thermosetting polyimide resin is formed so as to cover the Ti layer, the Cu layer, and the Cu wiring (conductive portion), and the upper insulating resin layer is formed by curing the resin, whereby the insulating resin layer is formed. A wiring structure having a conductive portion formed therein is formed.

  The wiring structure thus formed was subjected to a bias test under conditions of a temperature of 121 ° C. and a humidity of 85%, and then its cross-section was observed, and it was confirmed that Cu was diffused in the polyimide. .

[Comparative Example 2]
A thermosetting polyimide resin is formed on a Si substrate and cured to form a lower insulating resin layer, and then a Ti layer as an adhesion layer and a Cu layer as a seed layer are sputtered. Thus, each film is formed with a film thickness of 100 nm. Next, a positive resist is used to form a resist pattern in which an opening for forming a wiring having an L / S of 5 μm is formed. In the opening portion of the resist pattern, a Cu layer exposed from the opening portion is used as a seed layer, and a 5 μm Cu wiring is formed by electrolytic plating. After removing the resist, the Cu layer of the seed layer covered with the resist is removed by etching with an aqueous ammonium persulfate solution, and the Ti layer of the adhesion layer is further removed by etching with an aqueous hydrogen peroxide solution. Next, an NiP layer having a thickness of 0.2 μm is formed as a barrier metal layer on the surfaces of the Ti layer, Cu layer, and Cu wiring (conductive portion) by electroless plating. Then, a thermosetting polyimide resin is formed so as to cover the conductive part on which the NiP layer is formed, and the upper insulating resin layer is formed by curing the resin, whereby the conductive part is formed in the insulating resin layer. The formed wiring structure is formed.

  The wiring structure thus formed was subjected to a bias test under conditions of a temperature of 121 ° C. and a humidity of 85%, and then its cross-section was observed, and it was confirmed that Cu was diffused in the polyimide. .

  As described above, a barrier metal layer is provided on the surface of a conductive portion such as a Cu wiring embedded in the insulating layer, and further, a functional group having an unshared electron pair is provided at least in one molecule on the surface of the barrier metal layer. A compound layer containing two compounds is provided. As a result, even when an element such as Cu diffuses from the conductive portion and the element passes through the barrier metal layer, the element is trapped in the compound layer and diffused to the outer insulating layer. Can be effectively suppressed. By forming such a compound layer, the barrier metal layer can be formed thin. Since the compound layer itself can also be formed thin, it is possible to reduce the wiring pattern and reduce the pitch. In addition, even when the barrier metal layer is formed using a material having a relatively low barrier property, element diffusion from the conductive portion to the insulating layer can be effectively suppressed.

  In the above description, the circuit board is taken as an example of the electronic component. However, the method of forming the compound layer as described above is not limited to the circuit board and can be similarly applied to various electronic components. For example, the above method can be applied to a wiring structure of a semiconductor device (electronic component).

FIG. 16 illustrates an example of a semiconductor device. 16A is a schematic cross-sectional view of an essential part of a semiconductor device, and FIG. 16B is an enlarged view of a Y part in FIG.
In FIG. 16, a wiring layer 530 having a plug 530b and a wiring pattern 530a embedded in an insulating layer 531 such as silicon oxide is formed on a semiconductor substrate 520 on which a MOS (Metal Oxide Semiconductor) transistor 510 is formed. A semiconductor device 500 is illustrated. The MOS transistor 510 is formed in an element region defined by the element isolation region 521.

  As shown in FIG. 16B, the wiring pattern 530a includes a wiring groove 531ba provided in the second insulating layer 531b (part of the insulating layer 531) on the first insulating layer 531a (part of the insulating layer 531). Is formed. The wiring pattern 530a includes a conductive portion 532 including a first barrier metal layer 532a and a wiring 532b. The first barrier metal layer 532a is formed using, for example, Ta, tantalum nitride (TaN), Ti, titanium nitride (TiN), or a material containing two or more of them. The wiring 532b is formed using Cu or Cu alloy, for example.

  The conductive portion 532 can be formed using a damascene process. That is, first, the second insulating layer 531b is formed on the first insulating layer 531a, and then the wiring groove 531ba is formed in the second insulating layer 531b. Next, the first barrier metal layer 532a is formed by sputtering or the like, and the wiring 532b is formed thereon by electrolytic plating or the like. Then, using CMP (Chemical Mechanical Polishing) technology, unnecessary portions on the second insulating layer 531b are removed, and residues and the like are removed by cleaning.

  As shown in FIG. 16B, a second barrier metal layer 533 that is a part of the wiring pattern 530a is formed on the surface of the conductive portion 532, and a predetermined barrier layer is formed on the surface of the second barrier metal layer 533. A compound layer 534 containing the above compound is formed. The second barrier metal layer 533 is formed using, for example, NiP or CoWP that can be formed by an electroless plating method. In addition, the compound layer 534 is formed using one or more compounds each including at least two functional groups having an unshared electron pair in one molecule. In the case where two or more kinds of compounds are used for the compound layer 534, a single-layer compound layer 534 containing these compounds or a compound layer 534 in which layers of these compounds are stacked can be formed.

  The second barrier metal layer 533 can be formed by performing electroless plating after forming the conductive portion 532 as described above. The compound layer 534 can be formed by performing immersion treatment, spray treatment, or spin coating treatment (solution adhesion treatment) on the substrate that has been subjected to the formation of the second barrier metal layer 533 and drying.

A third insulating layer 531c (a part of the insulating layer 531) is formed over the substrate that has been formed up to the formation of the second barrier metal layer 533 and the compound layer 534.
Even when the wiring layer 530 has such a wiring structure, element diffusion such as Cu in the wiring 532b is suppressed not only by the first barrier metal layer 532a but also by the second barrier metal layer 533. At this time, even if the element of the wiring 532b passes through the second barrier metal layer 533, the passed element can be captured by the compound layer 534, and thus the element to the third insulating layer 531c and the like. Diffusion can be effectively suppressed.

FIG. 17 is a diagram illustrating another example of a semiconductor device. 17A is a schematic cross-sectional view of an essential part of a semiconductor device, and FIG. 17B is an enlarged view of a Z part in FIG.
FIG. 17 illustrates a semiconductor device 600 in which a wiring layer 630 having a plug 630b and a wiring pattern 630a embedded in an insulating layer 631 such as silicon oxide is formed on a semiconductor substrate 620 on which a MOS transistor 610 is formed. doing. Note that the MOS transistor 610 is formed in an element region defined by the element isolation region 621.

  As shown in FIG. 17B, the wiring pattern 630a includes a first barrier metal layer 632a, a wiring 632b, and a second barrier metal layer 632c formed on the first insulating layer 631a (a part of the insulating layer 631). A conductive portion 632 including The first barrier metal layer 632a and the second barrier metal layer 632c are formed using, for example, Ta, TaN, Ti, TiN, or a material containing two or more of them. The wiring 632b is formed using, for example, aluminum (Al) or an Al alloy.

  The conductive portion 632 can be formed by a sputtering method. That is, first, the first barrier metal layer 632a, the wiring 632b, and the second barrier metal layer 632c are sequentially stacked on the first insulating layer 631a by sputtering, and the stacked structure is patterned. Thereby, the first barrier metal layer 632a, the wiring 632b, and the second barrier metal layer 632c are formed on the first insulating layer 631a.

  As shown in FIG. 17B, a third barrier metal layer 633 that is a part of the wiring pattern 630a is formed on the surface of the conductive portion 632, and further, a predetermined barrier layer is formed on the surface of the third barrier metal layer 633. A compound layer 634 containing the above compound is formed. The third barrier metal layer 633 is formed using, for example, NiP or CoWP that can be formed by an electroless plating method. In addition, the compound layer 634 is formed using one or more compounds including at least two functional groups having a lone pair in one molecule. In the case where two or more kinds of compounds are used for the compound layer 634, a single-layer compound layer 634 containing these compounds or a compound layer 634 obtained by stacking these compound layers can be formed.

  The third barrier metal layer 633 can be formed by performing electroless plating after forming the conductive portion 632 as described above. The compound layer 634 can be formed by performing immersion treatment, spray treatment, or spin coating treatment (solution adhesion treatment) on the substrate that has been subjected to the formation of the third barrier metal layer 633 and drying.

A second insulating layer 631b (a part of the insulating layer 631) is formed over the substrate that has been formed up to the formation of the third barrier metal layer 633 and the compound layer 634.
Even when the wiring layer 630 has such a wiring structure, element diffusion such as Al of the wiring 632b is suppressed by the first barrier metal layer 632a, the second barrier metal layer 632c, and further the third barrier metal layer 633. At this time, even if the element of the wiring 632b passes through the third barrier metal layer 633, the passed element can be captured by the compound layer 634, and thus the element to the second insulating layer 631b and the like. Diffusion can be effectively suppressed.

  In this way, it is possible to apply a method using a compound layer to the wiring structure of a semiconductor device. By forming such a compound layer, an element that diffuses from a conductive part such as a wiring can be effectively captured. can do. In addition, by forming such a compound layer, it is possible to reduce the wiring pattern and reduce the pitch.

Regarding the embodiment described above, the following additional notes are further disclosed.
(Appendix 1) A step of forming a conductive portion on the first insulating layer;
Forming a barrier metal layer on the conductive portion;
Forming a compound layer containing a compound having at least two functional groups having unshared electron pairs on the barrier metal layer;
Forming a second insulating layer on the compound layer;
The manufacturing method of the electronic component characterized by including.

(Additional remark 2) The said compound is a chelating agent or a coupling agent, The manufacturing method of the electronic component of Additional remark 1 characterized by the above-mentioned.
(Additional remark 3) The said compound layer contains a different kind of compound as said compound, The manufacturing method of the electronic component of Additional remark 1 or 2 characterized by the above-mentioned.

(Supplementary Note 4) The step of forming the compound layer includes:
Attaching a solution containing the compound to the barrier metal layer;
Drying the solution and depositing the compound on the barrier metal layer;
The manufacturing method of the electronic component in any one of the supplementary notes 1 thru | or 3 characterized by including.

(Additional remark 5) The manufacturing method of the electronic component of Additional remark 4 characterized by alternately repeating the process which makes the said solution adhere to the said barrier metal layer, and the process which dries the said solution.
(Additional remark 6) The said barrier metal layer is formed using an electroless-plating method, The manufacturing method of the electronic component in any one of Additional remark 1 thru | or 5 characterized by the above-mentioned.

(Appendix 7) a first insulating layer;
A conductive portion formed on the first insulating layer;
A barrier metal layer formed on the conductive portion;
A compound layer including a compound formed on the barrier metal layer and including at least two functional groups having an unshared electron pair;
A second insulating layer formed on the compound layer;
An electronic component comprising:

(Additional remark 8) The said compound is a chelating agent or a coupling agent, The electronic component of Additional remark 7 characterized by the above-mentioned.
(Additional remark 9) The said compound layer contains a different kind of compound as the said compound, The electronic component of Additional remark 7 or 8 characterized by the above-mentioned.

  (Additional remark 10) The electronic component in any one of additional remark 7 thru | or 9 with which the same kind of element as the element contained in the said electroconductive part is coordinated to the unshared electron pair of the said compound.

1, 21a, 531a, 631a First insulating layer 2, 22, 532, 632 Conductive portion 3, 23 Barrier metal layer 4, 24, 534, 634 Compound layer 5, 21b, 531b, 631b Second insulating layer 21c, 531c First 3 Insulating layer 10 Support substrate 20, 530, 630 Wiring layer 20a, 530a, 630a Wiring pattern 21, 531, 631 Insulating layer 22a Adhesion layer 22b Seed layer 22c, 532b, 632b Wiring 22ca Cu
22d via 22da via hole 24a silane coupling agent 31, 32 resist 31a, 32a opening 100 circuit board 500,600 semiconductor device 510,610 MOS transistor 520,620 semiconductor substrate 521,621 element isolation region 530b, 630b plug 531ba wiring groove 532a , 632a First barrier metal layer 533, 632c Second barrier metal layer 633 Third barrier metal layer

Claims (7)

Forming a conductive portion on the first insulating layer;
Forming a barrier metal layer on the conductive portion;
A first layer including a first compound having at least two functional groups having an unshared electron pair on the barrier metal layer, and at least two functional groups having an unshared electron pair provided on the first layer. Forming a compound layer having a second layer containing a second compound comprising :
Forming a second insulating layer on the compound layer;
The manufacturing method of the electronic component characterized by including.   The method for manufacturing an electronic component according to claim 1, wherein the compound is a chelating agent or a coupling agent. Wherein the first compound and the second compound, method for manufacturing the electronic component according to claim 1 or 2, characterized in that different types of compounds.   The method of manufacturing an electronic component according to claim 1, wherein the first compound and the second compound are the same type of compound. The step of forming the compound layer includes
The barrier metal layer, adhering a first solution containing the first compound,
Said first solution is dried, the barrier is deposited the first compound to the metal layer, that form a first layer step,
Attaching a second solution containing the second compound to the first layer;
Drying the second solution, depositing the second compound on the first layer, and forming the second layer;
Method of manufacturing an electronic component according to any of claims 1 to 4, characterized in that it comprises a. Method of manufacturing an electronic component according to any of claims 1 to 5, characterized in that said barrier metal layer is formed using an electroless plating method. A first insulating layer;
A conductive portion formed on the first insulating layer;
A barrier metal layer formed on the conductive portion;
A first layer including a first compound formed on the barrier metal layer and including at least two functional groups having an unshared electron pair; and a functional group provided on the first layer and having an unshared electron pair. A compound layer having a second layer comprising a second compound comprising at least two ;
A second insulating layer formed on the compound layer;
An electronic component comprising:

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