JP5495074B2 - 論理ユニット動作 - Google Patents
論理ユニット動作 Download PDFInfo
- Publication number
- JP5495074B2 JP5495074B2 JP2011534484A JP2011534484A JP5495074B2 JP 5495074 B2 JP5495074 B2 JP 5495074B2 JP 2011534484 A JP2011534484 A JP 2011534484A JP 2011534484 A JP2011534484 A JP 2011534484A JP 5495074 B2 JP5495074 B2 JP 5495074B2
- Authority
- JP
- Japan
- Prior art keywords
- memory
- command
- data
- commands
- logical units
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Links
- 238000010977 unit operation Methods 0.000 title description 4
- 230000015654 memory Effects 0.000 claims description 142
- 230000006870 function Effects 0.000 claims description 16
- 238000000034 method Methods 0.000 claims description 9
- 238000012546 transfer Methods 0.000 claims description 5
- 230000004044 response Effects 0.000 claims 2
- 239000007787 solid Substances 0.000 description 52
- 238000010586 diagram Methods 0.000 description 12
- 238000003491 array Methods 0.000 description 11
- 230000003321 amplification Effects 0.000 description 6
- 238000004891 communication Methods 0.000 description 6
- 230000000873 masking effect Effects 0.000 description 6
- 238000003199 nucleic acid amplification method Methods 0.000 description 6
- 230000003068 static effect Effects 0.000 description 5
- 238000013459 approach Methods 0.000 description 4
- 238000013500 data storage Methods 0.000 description 3
- 230000006399 behavior Effects 0.000 description 2
- 239000003990 capacitor Substances 0.000 description 2
- 238000006243 chemical reaction Methods 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 238000013519 translation Methods 0.000 description 2
- 230000006978 adaptation Effects 0.000 description 1
- 230000002457 bidirectional effect Effects 0.000 description 1
- 238000013479 data entry Methods 0.000 description 1
- 230000001934 delay Effects 0.000 description 1
- 238000001514 detection method Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000007667 floating Methods 0.000 description 1
- 230000002085 persistent effect Effects 0.000 description 1
- 229920001690 polydopamine Polymers 0.000 description 1
- 230000000630 rising effect Effects 0.000 description 1
- 230000001360 synchronised effect Effects 0.000 description 1
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
- G06F3/0671—In-line storage system
- G06F3/0673—Single storage device
- G06F3/0679—Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/16—Error detection or correction of the data by redundancy in hardware
- G06F11/1666—Error detection or correction of the data by redundancy in hardware where the redundant component is memory or memory area
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
- G06F3/0604—Improving or facilitating administration, e.g. storage management
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
- G06F3/061—Improving I/O performance
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
- G06F3/0638—Organizing or formatting or addressing of data
- G06F3/064—Management of blocks
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
- G06F3/0655—Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
- G06F3/0659—Command handling arrangements, e.g. command buffers, queues, command scheduling
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
- G06F3/0671—In-line storage system
- G06F3/0683—Plurality of storage devices
- G06F3/0688—Non-volatile semiconductor memory arrays
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/70—Masking faults in memories by using spares or by reconfiguring
- G11C29/74—Masking faults in memories by using spares or by reconfiguring using duplex memories, i.e. using dual copies
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/70—Masking faults in memories by using spares or by reconfiguring
- G11C29/78—Masking faults in memories by using spares or by reconfiguring using programmable devices
- G11C29/80—Masking faults in memories by using spares or by reconfiguring using programmable devices with improved layout
- G11C29/816—Masking faults in memories by using spares or by reconfiguring using programmable devices with improved layout for an application-specific layout
- G11C29/82—Masking faults in memories by using spares or by reconfiguring using programmable devices with improved layout for an application-specific layout for EEPROMs
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C8/00—Arrangements for selecting an address in a digital store
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/16—Error detection or correction of the data by redundancy in hardware
- G06F11/20—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/52—Protection of memory contents; Detection of errors in memory contents
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Human Computer Interaction (AREA)
- Quality & Reliability (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Read Only Memory (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US12/259,380 US8762621B2 (en) | 2008-10-28 | 2008-10-28 | Logical unit operation |
US12/259,380 | 2008-10-28 | ||
PCT/US2009/005600 WO2010062302A1 (en) | 2008-10-28 | 2009-10-14 | Logical unit operation |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2012507100A JP2012507100A (ja) | 2012-03-22 |
JP5495074B2 true JP5495074B2 (ja) | 2014-05-21 |
Family
ID=42118608
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2011534484A Active JP5495074B2 (ja) | 2008-10-28 | 2009-10-14 | 論理ユニット動作 |
Country Status (7)
Country | Link |
---|---|
US (2) | US8762621B2 (zh) |
EP (1) | EP2347418B1 (zh) |
JP (1) | JP5495074B2 (zh) |
KR (1) | KR101363766B1 (zh) |
CN (1) | CN102239524B (zh) |
TW (1) | TWI443671B (zh) |
WO (1) | WO2010062302A1 (zh) |
Families Citing this family (27)
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US8300825B2 (en) * | 2008-06-30 | 2012-10-30 | Intel Corporation | Data encryption and/or decryption by integrated circuit |
US20110047322A1 (en) * | 2009-08-19 | 2011-02-24 | Ocz Technology Group, Inc. | Methods, systems and devices for increasing data retention on solid-state mass storage devices |
JP5559507B2 (ja) * | 2009-10-09 | 2014-07-23 | ピーエスフォー ルクスコ エスエイアールエル | 半導体装置及びこれを備える情報処理システム |
US8860117B2 (en) | 2011-04-28 | 2014-10-14 | Micron Technology, Inc. | Semiconductor apparatus with multiple tiers of memory cells with peripheral transistors, and methods |
US9390049B2 (en) * | 2011-06-03 | 2016-07-12 | Micron Technology, Inc. | Logical unit address assignment |
US8964474B2 (en) | 2012-06-15 | 2015-02-24 | Micron Technology, Inc. | Architecture for 3-D NAND memory |
KR20140082173A (ko) * | 2012-12-24 | 2014-07-02 | 에스케이하이닉스 주식회사 | 어드레스 카운팅 회로 및 이를 이용한 반도체 장치 |
US9361040B1 (en) * | 2013-02-27 | 2016-06-07 | Marvell International Ltd. | Systems and methods for data storage management |
US9070426B2 (en) | 2013-09-09 | 2015-06-30 | Kabushiki Kaisha Toshiba | Semiconductor memory device capable of setting an internal state of a NAND flash memory in response to a set feature command |
CN106775496B (zh) * | 2013-10-23 | 2020-01-21 | 华为技术有限公司 | 一种存储数据处理方法及装置 |
US9779019B2 (en) * | 2014-06-05 | 2017-10-03 | Micron Technology, Inc. | Data storage layout |
US9767045B2 (en) * | 2014-08-29 | 2017-09-19 | Memory Technologies Llc | Control for authenticated accesses to a memory device |
US9502118B2 (en) * | 2014-09-26 | 2016-11-22 | Intel Corporation | NAND memory addressing |
US10338817B2 (en) * | 2014-12-30 | 2019-07-02 | Sandisk Technologies Llc | Systems and methods for storage recovery |
WO2017096059A1 (en) * | 2015-12-02 | 2017-06-08 | Cryptography Research, Inc. | Freeze logic |
US9679650B1 (en) | 2016-05-06 | 2017-06-13 | Micron Technology, Inc. | 3D NAND memory Z-decoder |
KR20180059208A (ko) * | 2016-11-25 | 2018-06-04 | 삼성전자주식회사 | 리클레임 제어부를 갖는 메모리 콘트롤러 및 그에 따른 동작 제어 방법 |
CN106528000B (zh) * | 2016-12-02 | 2019-12-31 | 苏州浪潮智能科技有限公司 | 一种数据存储装置及其读写性能优化方法、系统 |
US11450381B2 (en) | 2019-08-21 | 2022-09-20 | Micron Technology, Inc. | Multi-deck memory device including buffer circuitry under array |
US11164613B2 (en) | 2019-12-02 | 2021-11-02 | Micron Technology, Inc. | Processing multi-cycle commands in memory devices, and related methods, devices, and systems |
US11321000B2 (en) * | 2020-04-13 | 2022-05-03 | Dell Products, L.P. | System and method for variable sparing in RAID groups based on drive failure probability |
US11495309B2 (en) | 2020-12-16 | 2022-11-08 | Micron Technology, Inc. | Initiating media management operation using voltage distribution metrics in memory system |
US11861212B2 (en) | 2022-02-24 | 2024-01-02 | Silicon Motion, Inc. | Flash memory device, controller, and method capable of performing access operation upon data unit(s) of multiple planes of flash memory device in response one simplified command sequence |
US11935595B2 (en) | 2022-02-24 | 2024-03-19 | Silicon Motion, Inc. | Flash memory device, controller, and method capable of performing access operation upon data unit(s) of multiple planes of flash memory device in response one simplified command sequence |
US11977776B2 (en) | 2022-02-24 | 2024-05-07 | Silicon Motion, Inc. | Flash memory controller and method capable of sending read command or data toggle command to ask for flash memory device return more plane data of different planes |
US11977752B2 (en) | 2022-02-24 | 2024-05-07 | Silicon Motion, Inc. | Flash memory controller and method capable of sending data toggle set-feature signal to enable, disable, or configure data toggle operation of flash memory device |
US11972146B2 (en) | 2022-02-24 | 2024-04-30 | Silicon Motion, Inc. | Flash memory controller and method capable of sending read command or data toggle command to ask for flash memory device return more plane data of different planes |
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JP4818812B2 (ja) * | 2006-05-31 | 2011-11-16 | 株式会社日立製作所 | フラッシュメモリストレージシステム |
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JP2003337790A (ja) * | 2002-05-21 | 2003-11-28 | Mitsubishi Electric Corp | バス制御回路およびプロセッサ |
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JP5216463B2 (ja) * | 2008-07-30 | 2013-06-19 | 株式会社日立製作所 | ストレージ装置、その記憶領域管理方法及びフラッシュメモリパッケージ |
-
2008
- 2008-10-28 US US12/259,380 patent/US8762621B2/en active Active
-
2009
- 2009-10-14 WO PCT/US2009/005600 patent/WO2010062302A1/en active Application Filing
- 2009-10-14 CN CN200980148541.6A patent/CN102239524B/zh active Active
- 2009-10-14 JP JP2011534484A patent/JP5495074B2/ja active Active
- 2009-10-14 EP EP09829426.7A patent/EP2347418B1/en active Active
- 2009-10-14 KR KR1020117012148A patent/KR101363766B1/ko active IP Right Grant
- 2009-10-28 TW TW098136565A patent/TWI443671B/zh active
-
2014
- 2014-02-28 US US14/194,095 patent/US9128637B2/en active Active
Also Published As
Publication number | Publication date |
---|---|
WO2010062302A1 (en) | 2010-06-03 |
CN102239524A (zh) | 2011-11-09 |
CN102239524B (zh) | 2014-10-01 |
TWI443671B (zh) | 2014-07-01 |
US9128637B2 (en) | 2015-09-08 |
US20100106919A1 (en) | 2010-04-29 |
KR101363766B1 (ko) | 2014-02-14 |
US20140250261A1 (en) | 2014-09-04 |
US8762621B2 (en) | 2014-06-24 |
TW201023203A (en) | 2010-06-16 |
EP2347418A1 (en) | 2011-07-27 |
KR20110081878A (ko) | 2011-07-14 |
EP2347418A4 (en) | 2012-10-31 |
JP2012507100A (ja) | 2012-03-22 |
EP2347418B1 (en) | 2018-11-21 |
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