JP5467009B2 - RESIST-FORMED WIRING BOARD AND ELECTRONIC CIRCUIT MANUFACTURING METHOD - Google Patents

Description

  The present invention relates to a resist-formed wiring board and an electronic circuit manufacturing method, and more particularly to a resist-formed wiring board and an electronic circuit manufacturing method for forming a fine circuit pattern.

  In recent years, electronic devices have been remarkably reduced in size and increased in density. Representative examples of consumer devices include personal computers, mobile phones, and liquid crystal displays, and representative examples of industrial devices include servers and wireless base stations. In order to realize such miniaturization and high density, the wiring of the semiconductor chip wiring board and the printed wiring board has been miniaturized, and at present, fine wiring with L / S = 20/20 μm or less is sometimes used. Many.

As a technique for manufacturing a copper wiring, there are a subtractive method using copper as a wiring by etching and an additive method or semi-additive method in which wiring is formed by plating.
In the subtractive method, an etching resist is formed on a copper surface, and then exposure and development are performed to form a resist pattern. Then, copper is partially removed by etching, and after forming a copper wiring, the resist is removed to form a wiring.
On the other hand, in the additive method, a plating resist is formed on the surface of the seed layer, and then exposure and development are performed to form a plating resist pattern. And after forming copper wiring by electroplating, a plating resist is removed and it is set as wiring.

  In the subtractive method, the restriction on the miniaturization of the wiring is mainly due to the etching shape. In particular, it is difficult to form by etching at a fine pitch of L / S = 20/20 μm. This is because the copper portion of the copper foil circuit after etching is etched away from the surface of the copper foil, that is, toward the resin layer (sagging occurs). In particular, when a large “sag” occurs, the copper circuit may be short-circuited near the resin substrate, resulting in a defective product. Here, FIG. 2 shows an enlarged photograph of the circuit surface showing an example in which “sagging” occurs when the copper circuit is formed and the copper circuit is short-circuited in the vicinity of the resin substrate.

  Such “sag” needs to be reduced as much as possible, but in order to prevent such widening etching failure, the etching time is extended, the etching is increased, and this “sag” is reduced. It is possible to make it. However, in this case, if there is a portion that has already reached the predetermined width dimension, it will be further etched, so that the circuit width of the copper foil portion will be reduced accordingly, and the circuit design will be a uniform target. The line width (circuit width) cannot be obtained, and heat is generated particularly in that portion (thinned portion), and in some cases, there is a problem of disconnection. As the fine patterning of electronic circuits further progresses, the problem due to such etching failure still appears more strongly and still becomes a big problem in circuit formation.

  As a method for improving these, Patent Document 1 discloses a surface treatment in which a metal or alloy layer having an etching rate slower than that of copper is formed on a copper foil on the etching surface side. In this case, the metal or alloy includes Ni, Co, and alloys thereof. In circuit design, the etching solution penetrates from the resist coating side, that is, from the surface of the copper foil, so if there is a metal or alloy layer with a slow etching rate directly under the resist, the etching of the copper foil portion in the vicinity is suppressed. Since the etching of the copper foil portion of the metal film progresses, the “sag” is reduced, and a circuit with a more uniform width can be formed. This makes it possible to form a sharper circuit compared to the prior art, and a great progress has been made. It can be said that there was.

  Further, in Patent Document 2, a Cu thin film having a thickness of 1000 to 10,000 mm is formed, and an Ni thin film having an etching rate slower than that of copper having a thickness of 10 to 300 mm is formed on the Cu thin film.

  On the other hand, in Patent Document 3, as a method for improving the adhesion between an etching resist and copper, fine irregularities are formed by oxidizing the copper surface after discretely forming a noble metal on the copper surface. It shows how to do it.

JP 2002-176242 A JP 2000-269619 A Japanese Patent No. 4033237

In recent years, further miniaturization and higher density of circuits have progressed, and there is a demand for a circuit having a smaller “sag” and a sharper cross-sectional shape of an etching side surface. However, the techniques according to Patent Documents 1 and 2 cannot cope with these. The technique according to Patent Document 3 only increases the adhesion between the etching resist and copper, and cannot control the “sag” of the copper foil during subsequent etching.
Therefore, there is a limit to forming a fine circuit by the conventional subtractive method, and it was necessary to use a semi-additive method or an additive method to form a fine pitch fine circuit, but there are many processing steps. Therefore, the manufacturing cost becomes poor.

  SUMMARY OF THE INVENTION An object of the present invention is to provide a resist-formed wiring board and an electronic circuit manufacturing method that can be fine pitched by etching when forming a circuit pattern and have good manufacturing efficiency.

As a result of intensive studies, the present inventors have found that when a trace amount of platinum group metal, gold and / or silver, which is a metal that is not oxidized with respect to the etching solution, is deposited on the etched surface of the copper foil, the deposited metal on the back side of the resist It was found that side etching was suppressed and side etching was suppressed.
The mechanism by which side etching is suppressed is not clear, but experimental facts indicate that platinum group metals, gold and / or silver remain on the back side of the resist, which promotes reduction of the oxidizing agent in the etching solution, It is thought that side etching is suppressed directly under the resist.

  The present invention completed on the basis of the above knowledge is, in one aspect, an insulating substrate, a copper foil base formed on the insulating substrate, and covering at least part of the surface of the copper foil base, a platinum group metal, And the resist formation wiring board provided with the copper foil provided with the coating layer containing 1 or more types selected from the group which consists of gold | metal | money, and the resist formed on the coating layer of copper foil.

In one embodiment of the resist-formed wiring board according to the present invention, the platinum group metal is platinum, palladium, ruthenium, rhodium and / or iridium, and one or more selected from the group consisting of the platinum group metal and gold. The adhesion amount is 1-1000 μg / dm ² .

In another embodiment of the resist-formed wiring board according to the present invention, the platinum group metal is platinum and / or palladium, and the amount of one or more kinds selected from the group consisting of the platinum group metal and gold is 10 ˜500 μg / dm ² .

In still another embodiment of the resist-formed wiring board according to the present invention, the amount of one or more kinds selected from the group consisting of platinum, palladium, and gold is 30 to 350 μg / dm ² .

  In yet another embodiment of the resist-formed wiring board according to the present invention, a platinum group metal on the adhesive surface of the resist after removing the copper foil by dipping in a ferric chloride solution, and At least one selected from the group consisting of gold is attached.

  In another aspect of the present invention, a coating layer is formed by attaching one or more selected from the group consisting of a platinum group metal and gold to the surface of the copper foil by electroless plating or electrolytic plating. An electronic circuit manufacturing method includes forming a resist on a layer and then performing etching to form the resist-formed wiring board of the present invention.

  In one embodiment of the method for producing an electronic circuit according to the present invention, a platinum group metal is bonded to the copper foil of the resist after the copper foil of the resist-formed wiring board is removed by immersion in a ferric chloride solution. And at least one selected from the group consisting of gold is attached.

  According to the present invention, since the etching property at the time of circuit formation is improved, a fine pitch of the circuit can be realized by the subtractive method. Moreover, since the subtractive method is used, manufacturing efficiency is improved. That is, according to the present invention, it is possible to provide a method for manufacturing a resist-formed copper foil and an electronic circuit that can be fine pitched by etching when forming a circuit pattern and have good manufacturing efficiency.

It is the outline | summary of the calculation method of the etching factor (EF) using the surface photograph of a part of circuit pattern, the schematic diagram of the cross section of the width direction of the circuit pattern in the said part, and this schematic diagram. It is an enlarged photograph of the circuit surface which shows the example which produced "sagging" at the time of copper circuit formation, and the copper circuit short-circuited in the resin substrate vicinity.

(Copper foil base material)
Although there is no restriction | limiting in particular in the form of the copper foil base material which can be used for this invention, Typically, it can use with the form of rolled copper foil or electrolytic copper foil. In general, the electrolytic copper foil is produced by electrolytic deposition of copper from a copper sulfate plating bath onto a drum of titanium or stainless steel, and the rolled copper foil is produced by repeating plastic working and heat treatment with a rolling roll. Rolled copper foil is often used for applications that require flexibility.
In addition to high-purity copper such as tough pitch copper and oxygen-free copper, which are usually used as conductor patterns for printed wiring boards, for example, Sn-containing copper, Ag-containing copper, Cr, Zr or Mg are added as the copper foil base material. It is also possible to use a copper alloy such as a copper alloy, a Corson copper alloy to which Ni, Si and the like are added. In addition, when the term “copper foil” is used alone in this specification, a copper alloy foil is also included.

  There is no restriction | limiting in particular also about the thickness of the copper foil base material which can be used for this invention, What is necessary is just to adjust to the thickness suitable for printed wiring boards suitably. For example, it can be set to about 5 to 100 μm. However, for the purpose of forming a fine pattern, it is 30 μm or less, preferably 20 μm or less, and typically about 5 to 20 μm.

  Although the copper foil base material used for this invention is not specifically limited, For example, you may use what does not perform a roughening process. Conventionally, the surface is generally roughened by special plating with irregularities on the order of μm, and the physical anchor effect provides adhesion to the resin. A smooth foil is considered to have good characteristics, and a roughened foil may work in a disadvantageous direction. Moreover, since the roughening process process is abbreviate | omitted if it does not perform a roughening process, there exists an effect of economical efficiency and productivity improvement.

(Coating layer)
A coating layer is formed on at least a part of the surface of the copper foil base opposite to the surface to be bonded to the insulating substrate (circuit formation planned surface side). The coating layer contains one or more selected from the group consisting of platinum group metals and gold. The platinum group metal contained in the coating layer is preferably any one of platinum, palladium, ruthenium, rhodium and iridium, and more preferably platinum and / or palladium.
In addition, on the adhesive surface side of the copper foil base material with the insulating substrate, for the purpose of improving the adhesiveness with the insulating substrate, for example, another coating layer composed of an intermediate layer and a surface layer laminated in order from the copper foil base material surface May be formed. In this case, the intermediate layer preferably contains at least one of Ni, Mo, Ti, Zn, Co, V, Sn, Mn, Nb, Ta, and Cr, for example. The intermediate layer may be composed of a single metal, for example, preferably composed of any one of Ni, Mo, Ti, Zn, Co, Nb, and Ta. The intermediate layer may be made of an alloy, for example, preferably made of an alloy of at least any two of Ni, Zn, V, Sn, Mn, Cr and Cu.

When the concentration of the noble metal atom in the coating layer is too high, the initial etching property is deteriorated, and it becomes difficult to obtain the good etching property according to the present invention. Therefore, in the coating layer of the present invention, platinum, palladium, and is preferably 1 or more deposition amount selected from the group consisting of gold is ^{1~1000μg / dm 2, 10~500μg / dm} 2 However, it is more preferably 30 to 350 μg / dm ² .

  In addition, an underlayer or an upper layer may be provided between the copper foil base material and the coating layer or between the coating layer and the resist from the viewpoint of heat discoloration resistance as long as the initial etching property is not adversely affected. As the underlayer or upper layer, nickel, a nickel alloy, cobalt, silver, or manganese is preferable. Either a dry method or a wet method may be used as a method for providing the base layer or the upper layer.

  Further, a chromium layer or a chromate layer and / or a silane treatment layer can be further formed on the coating layer in order to enhance the rust prevention effect.

(Resist-formed wiring board)
The resist-formed wiring board of the present invention includes an insulating substrate composed of a resin, the above-described copper foil base formed on the insulating substrate, and the above-described coating that covers at least a part of the surface of the copper foil base. The copper foil provided with the layer and the resist formed on the coating layer of the copper foil are provided.
In the resist-formed wiring board, at least one of the above-mentioned platinum, palladium, and gold adheres to the bonding surface of the copper foil of the resist after removing the copper foil portion with a ferric chloride solution. It is preferable. In that case, side etching of the copper foil during etching can be suppressed. Note that, as in Patent Document 3, it is not preferable to oxidize after depositing a noble metal in order to improve the adhesion of the resist because the oxide layer is too thick and the noble metal hardly remains during etching.

(Manufacturing method of copper foil)
In the present invention, the coating layer can be formed on the copper foil substrate by electroless plating, electroplating, displacement plating, spray spraying, coating, sputtering, vapor deposition, or the like. The covering layer may be formed in either a layer shape or an island shape. If the coating layer is formed too thick, it is necessary to dissolve the noble metal layer at the initial stage of etching, and there is a problem that the etching rate becomes slow or non-uniform. For this reason, it is preferable to form the coating layer so that the amount of one or more selected from the group consisting of platinum, palladium, ruthenium, rhodium, iridium, and gold is 1-1000 μg / dm ² .

  Of course, the above-described problems can be solved by pre-etching the noble metal in the opening after the resist pattern is formed. However, in that case, it should be considered that there are two disadvantages, that is, a large amount of expensive noble metal must be used and that one step of pre-etching is increased.

  Various methods for forming a noble metal such as Au, Pt, or Pd on the copper surface are conceivable as described above. The simplest method is a method using electroless plating or displacement plating. This is because the etching process and the via hole plating process are wet processes, and the electroless plating and displacement plating in the wet process can be easily accompanied by the etching process and the via hole plating process.

Examples of plating solutions used in electroless plating include electroless gold plating solution CF500SS (manufactured by Nikko Metal Co., Ltd.), substitutional electroless palladium plating solution CF-400 (manufactured by Nikko Metal Co., Ltd.), and substituted palladium plating solution SA-. 100 (manufactured by Hitachi Chemical Co., Ltd.).
Examples of the plating solution used in the electroplating include an electrolytic pure gold plating solution K710-pure gold (manufactured by Kojima Chemical Co., Ltd.), an electrolytic pure palladium plating solution K-pure palladium (manufactured by Kojima Chemical Co., Ltd.), and an electrolytic platinum plating solution. Examples thereof include Pt-250 (manufactured by N.E. Chemcat Co., Ltd.).

(Electronic circuit manufacturing method)
By forming an electronic circuit using the copper foil according to the present invention, a printed wiring board (PWB) can be produced according to a conventional method. Below, the example of the manufacturing method of a printed wiring board is shown.

  First, a laminated body is manufactured by bonding a copper foil and an insulating substrate. The insulating substrate on which the copper foil is laminated is not particularly limited as long as it has characteristics applicable to a printed wiring board. For example, paper base phenol resin, paper base epoxy resin, synthetic fiber cloth base epoxy Resin, glass cloth / paper composite base material epoxy resin, glass cloth / glass nonwoven fabric composite base material epoxy resin, glass cloth base material epoxy resin, polyester film, polyimide film, liquid crystal polymer and the like can be used.

  In the case of the rigid PWB, a prepreg is prepared by impregnating a base material such as a glass cloth with a resin and curing the resin to a semi-cured state. It can be carried out by superposing a copper foil on the prepreg from the opposite surface of the coating layer and heating and pressing.

  In the case of a flexible printed wiring board (FPC), a polyimide film or a polyester film and a copper foil can be bonded using an epoxy or acrylic adhesive (three-layer structure). In addition, as a method without using an adhesive (two-layer structure), a polyimide varnish (polyamic acid varnish), which is a polyimide precursor, is applied to a copper foil and heated to form an imidization or on a polyimide film There is a laminating method in which a thermoplastic polyimide is applied to the substrate, a copper foil is overlaid thereon, and heated and pressed. In the casting method, it is also effective to apply an anchor coating material such as thermoplastic polyimide in advance before applying the polyimide varnish.

  Although the copper foil which concerns on this invention can be used for various printed wiring boards (PWB) and it does not restrict | limit in particular, For example, from a viewpoint of the number of layers of a conductor pattern, single-sided PWB, double-sided PWB, multilayer PWB ( It is applicable to rigid PWB, flexible PWB (FPC), and rigid flex PWB from the viewpoint of the type of insulating substrate material. Moreover, as a laminated body which comprises a printed wiring board, it is not limited to the above copper clad laminated board which affixes copper foil to resin, The metalizing material which formed the copper layer by sputtering and plating on resin It may be.

  In addition, since the multilayer semiconductor chip mounting substrate and the wiring substrate have a plurality of wiring layers, via holes for electrically connecting the wirings of the respective layers can be provided. The via hole can be formed by providing a connection hole in the substrate and filling the hole with a conductive paste or plating. In particular, when the via hole is filled with plating, copper formed by plating is formed on the surface of the copper foil. And in this case, the above-mentioned coating layer will be formed on this copper plating.

A resist is applied to the surface of the coating layer formed on the copper foil on the insulating substrate produced as described above, the pattern is exposed with a mask, and developed to spray the etching solution on the resist pattern. At this time, the coating layer containing at least one selected from the group consisting of platinum group metal, gold, and silver that suppresses etching is on the surface near the copper foil side of the resist, and the etching of the copper foil proceeds. Thus, it remains on the resist surface. Due to the presence of the coating layer remaining on the resist surface, the etching rate of copper in the vicinity thereof is suppressed. Etching of the copper circuit pattern proceeds almost vertically because the etching is not suppressed as much as the copper away from the resist, that is, the lower copper. Thus, unnecessary portions of copper can be removed, and then the etching resist can be peeled and removed to expose the circuit pattern.
As the etching solution, a chemical etching solution used for a normal wiring board such as a ferric chloride solution, a cupric chloride and hydrochloric acid solution, a sulfuric acid and hydrogen peroxide solution, and an ammonium persulfate solution can be used.
The resist-formed wiring board of the present invention is a group consisting of platinum, palladium, and gold derived from the coating layer on the adhesive surface of the resist after removing the copper foil by immersing it in a ferric chloride solution. 1 or more types selected from are attached.

(Electronic circuit shape)
As described above, the circuit on the copper foil surface of the printed wiring board formed by etching from the coating layer side is not usually formed with two long side surfaces perpendicular to the insulating substrate. From the surface of the foil downward, that is, toward the resin layer, it is formed so as to spread toward the end (generation of sagging). Thus, the two long side surfaces each have an inclination angle θ with respect to the surface of the insulating substrate. It is important to reduce the circuit pitch as much as possible for miniaturization (fine pitch) of the circuit pattern that is currently required. However, if this inclination angle θ is small, the sagging increases accordingly, The pitch becomes wider. In addition, the inclination angle θ is usually not completely constant in each circuit and circuit. If the variation in the inclination angle θ is large, the circuit quality may be adversely affected. Accordingly, the circuit on the copper foil surface of the printed wiring board formed by etching from the coating layer side has two long side surfaces each having an inclination angle θ of 65 to 90 ° with respect to the insulating substrate surface, In addition, it is desirable that the standard deviation of tan θ in the same circuit is 1.0 or less. The etching factor is preferably 1.5 or more, and more preferably 2.5 or more when the circuit pitch is 50 μm or less.

  EXAMPLES Examples of the present invention will be described below, but these are provided for better understanding of the present invention and are not intended to limit the present invention.

(Example 1: Examples 1 to 23)
(Formation of coating layer on copper foil)
As a copper foil base material of Examples 1 to 19, a rolled copper foil (C1100 manufactured by Nikko Metal Co., Ltd.) having a thickness of 9 μm was prepared. The surface roughness (Rz) of the rolled copper foil was 0.5 μm. Moreover, the electrolytic copper foil (Nikko Metal Co., Ltd. product JTC foil) of thickness 9micrometer was prepared as a copper foil base material of Examples 20-22. The surface roughness (Rz) of the surface of the electrolytic copper foil bonded to the resin was 3.8 μm, and the surface roughness (Rz) of the etched surface was 0.21 μm.

First, on one side of these copper foils, a thin oxide film previously attached to the copper foil base material was removed by reverse sputtering under the following conditions, and a Ni layer and a Cr layer were sequentially formed. This surface was used as an adhesive surface with the resin.
-Equipment: Batch type sputtering equipment (ULVAC, Model MNS-6000)
・ Achieving vacuum: 1.0 × 10 ⁻⁵ Pa
・ Sputtering pressure: 0.2 Pa
・ Reverse sputtering power: 100W
-Adhesive surface with target resin: Ni, Cr (3N)
・ Sputtering power: 50W
Film formation rate: About 0.2 μm of film was formed for each target for a certain time, the thickness was measured with a three-dimensional measuring device, and the sputtering rate per unit time was calculated.

A polyimide film with an adhesive (manufactured by Nikkan Kogyo Co., Ltd., CISV1215) was laminated on the copper foil that had been subjected to the surface treatment in the above procedure by a hot press at a pressure of 7 kgf / cm ² and 160 ° C. for 40 minutes.

When the via hole is formed, the copper foil surface is coated with copper plating. Therefore, in order to reproduce the state, in some examples, copper sulfate-based electrolytic copper plating was plated on the copper foil surface by 5 to 10 μm.
Further, in Example 23, Esperflex (manufactured by Sumitomo Metal Mining Co., Ltd.) is representative of a metallized foil in which a heat-resistant layer such as Ni—Cr and a Cu layer are formed on a polyimide film by sputtering and the Cu layer is thickened by electroplating. Was used. The thickness of the Cu layer was 8 μm.

An Au plating film was formed on the copper surface using electrolytic pure gold plating solution K710-pure gold (manufactured by Kojima Chemical Co., Ltd.). The plating thickness was changed by the current density and the plating time.
Detailed plating conditions are as follows.
Au: 8.0 g / L, temperature: 65 ° C., pH: 6.0, current density: 0.2 to 1.0 A / dm ² , time: 0.3 to 3.0 seconds

A substitutional electroless palladium plating solution CF-400 (manufactured by Nikko Metal Co., Ltd.) was used to form a Pd plating film on the copper surface. The plating thickness was changed by the immersion time.
Detailed plating conditions are as follows.
Pd: 0.1 g / L, temperature: 25 ° C., pH: 2.0, time: 0.5-30 minutes

A Pt plating film was formed on the copper surface using an electrolytic platinum plating solution Pt-250 (manufactured by N Chemcat Co., Ltd.). The plating thickness was changed by the current density and plating time.
Pt: 5.0 g / L, temperature: 75 ° C., pH: 6.0, current density: 0.5 to 1.0 A / dm ² , time: 0.3 to 3.0 seconds

Using an electrolytic ruthenium plating solution (in-house preparation), a Ru plating film was formed on the copper surface. The plating thickness was changed by the current density and plating time.
RuNoCl ₃ .5H ₂ O: 10 g / L, NH ₂ SO ₃ H: 15 g / L, temperature: 50 ° C., current density: 0.5 to 1.0 A / dm ² , time: 0.5 to 2.0 seconds

An Rh plating film was formed on the copper surface using an electrolytic rhodium plating solution (in-house preparation). The plating thickness was changed by the current density and plating time.
Rhodium sulfate: 2.0 g / L, sulfuric acid: 40 ml / L, temperature: 50 ° C., current density: 1.0 to 2.0 A / dm ² , time: 0.5 to 2.0 seconds

Using an electrolytic iridium plating solution (self-prepared), an Ir plating film was formed on the copper surface. The plating thickness was changed by the current density and plating time.
10 g / L of iridium bromide as metal iridium, sulfuric acid: 15 g / L, sulfamic acid: 15 g / L, boric acid: 10 g / L, pH: 5.0, temperature: 65 ° C., current density: 0.1-0 .5 A / dm ² , time: 2.0 to 5.0 seconds

<Measurement of adhesion amount>
The adhesion amount of Au, Pd, Pt, Ru, Rh, and Ir in the coating layer was measured by dissolving the surface-treated copper foil sample with aqua regia, diluting the solution, and performing atomic absorption spectrometry.

(Circuit formation by etching)
The etched surface of the copper foil produced by the above procedure was degreased with acetone and immersed in sulfuric acid (100 g / L) for 30 seconds to remove the surface contamination and the oxide layer. Next, using a spin coater, a liquid resist (manufactured by Tokyo Ohka Kogyo Co., Ltd., OFPR-800LB) was dropped on the etching surface of the laminate and dried. The resist thickness after drying was adjusted to 1 μm. Then, by exposure (11 mW / cm ² × 3.5 seconds) and development (developer: NMD-W, manufactured by Tokyo Ohka Kogyo Co., Ltd.), L / S = 33 μm / 17 μm, or L / S = 25 μm / 5 μm A resist pattern was formed. The etching conditions at this time are shown below. Further, the number of circuits is 10 each.

<Etching conditions>
-Ferric chloride aqueous solution: (37 wt%, Baume degree: 40 °)
・ Liquid temperature: 50 ℃
・ Spray pressure: 0.25 MPa
(50 μm pitch circuit formation)
・ Resist L / S = 33μm / 17μm
-Finished circuit top (upper) width: 15 μm
Etching time: 38 seconds (30 μm pitch circuit formation)
・ Resist L / S = 25μm / 5μm
-Finished circuit top (top) width: 10 μm
-Etching time: 50 seconds-Confirmation of etching end point: Etching was carried out at several levels by changing the time, and it was confirmed by an optical microscope that no copper remained between the circuits.
-After the etching, the resist was peeled off by being immersed in a 45 ° C NaOH aqueous solution (100 g / L) for 1 minute.

<Etching factor measurement conditions>
The etching factor is the distance of the length of sagging from the intersection of the vertical line from the upper surface of the copper foil and the resin substrate, assuming that the circuit is etched vertically when sagging at the end (when sagging occurs) Is a ratio of a to the thickness b of the copper foil: b / a, and the larger the value, the larger the inclination angle, and the etching residue does not remain and the sagging is small. It means to become. FIG. 1 shows a surface photograph of a part of a circuit pattern, a schematic diagram of a cross section in the width direction of the circuit pattern at the part, and an outline of a method for calculating an etching factor using the schematic diagram. This a was measured by SEM observation from above the circuit, and the etching factor (EF = b / a) was calculated. By using this etching factor, it is possible to easily determine whether the etching property is good or bad.

<Measurement of atomic concentration on copper foil removal surface of resist>
The undercut (side etch) directly under the resist is at most several to 20 μm. When this portion was directly analyzed by XPS, the X-ray irradiation area (800 μmφ, see below) was not sufficient. For this reason, the atomic concentration in the copper foil removal surface of a resist was measured in the following procedures.
A resist was applied to the copper foil (copper foil before circuit formation) subjected to the above-described surface treatment, and dried without forming a circuit pattern to produce a laminate with resist. Then, this laminated body with a resist was immersed in the ferric chloride solution. The immersion time was the etching time required to form a circuit from various surface-treated copper foils. The adhesion surface of the resist thus obtained with the copper foil was analyzed by XPS. Thereby, the total atomic concentration (%) of gold, platinum, and palladium on the copper foil removal surface of the resist was measured.
(XPS operating conditions)
The operating conditions of XPS when creating a survey spectrum on the back side of the resist are shown below.
・ Device: XPS measuring device (ULVAC-PHI, Model 5600MC)
・ Achieved vacuum: 8.0 × 10 ⁻⁸ Pa
X-ray: Monochromatic AlKα, X-ray output 210 W, detection area 800 μmφ, angle 45 ° between sample and detector

(Example 2: Examples 24-26)
Prepare a rolled copper foil with a thickness of 9 μm, adhere Au, Pt, Pd to the etched surface of the copper foil in the same procedure as in Example 1, laminate it with a polyimide film, form a circuit by etching, evaluate the etching property, And the atomic concentration in the copper foil removal surface of a resist was measured.

(Example 3: Comparative Example 1: Blank material)
A rolled copper foil having a thickness of 9 μm was prepared, subjected to surface treatment according to the procedure of Example 1, evaluation of etching property, and measurement of atomic concentration on the copper foil removal surface of the resist.

(Example 4: Comparative Example 2: Fe plating)
A rolled copper foil having a thickness of 9 μm was prepared and subjected to surface treatment according to the procedure of Example 1. After bonding polyimide and copper foil, Fe plating was performed under the following conditions. Thereafter, a circuit was formed by etching, and evaluation of etching property and measurement of atomic concentration on the copper foil removal surface of the resist were performed.
・ Ferrous chloride: 330 g / L
・ Calcium chloride: 200g / L
-PH: 2.5-3.0
・ Bath temperature: 60-70 ° C
・ Current density: 1A / dm ²
・ Time: 3-5 seconds

(Example 5: Comparative Example 3: Zn plating)
A rolled copper foil having a thickness of 9 μm was prepared and subjected to surface treatment according to the procedure of Example 1. After bonding polyimide and copper foil, Zn plating was performed under the following conditions. Thereafter, a circuit was formed by etching, and evaluation of etching property and measurement of atomic concentration on the copper foil removal surface of the resist were performed.
・ Zinc sulfate: 17.5 g / L
-Potassium sulfate: 75 g / L
・ Ammonium sulfate: 20 g / L
・ Gelatin: 2g / L
・ Polyacrylamide: 5g / L
・ PH: 2
-Temperature: 20-25 ° C
・ Current density: 1A / dm ²
・ Time: 2-4 seconds

(Example 6: Comparative Example 4: Sn plating)
A rolled copper foil having a thickness of 9 μm was prepared and subjected to surface treatment according to the procedure of Example 1. After bonding polyimide and copper foil, Sn plating was performed under the following conditions. Thereafter, a circuit was formed by etching, and evaluation of etching property and measurement of atomic concentration on the copper foil removal surface of the resist were performed.
・ Stannous sulfate: 70 g / L
・ Sulfuric acid: 50 g / L
・ Cresol sulfonic acid: 60 g / L
・ Formalin: 10ml / L
-Temperature: 20-25 ° C
・ Current density: 1A / dm ²
-Time: 2 to 3 seconds Tables 1 and 2 show the measurement results of Examples 1 to 6.

<Evaluation>
In Examples 1 to 23, it was possible to form a circuit with a small trailing edge by using both 50 μm pitch and 30 μm pitch resist patterns.
In Examples 24-26, the adhesion amount of Au, Pt, and Pd was excessive, the initial etching property was very poor, and the corrosion resistance of the etched surface of the copper foil was improved, so that a circuit could not be formed. . However, these circuits can be formed by pre-etching with hydrochloric acid. The etching factor in the case of pre-etching was almost the same value as that in the case where the adhesion amount was optimum.
In Comparative Example 1, which is a blank material, a circuit could not be formed because side etching proceeded above the circuit before etching in the copper foil thickness direction was completed.
In Comparative Examples 2 to 4, since the layer between the resist and the copper foil is made of a metal whose etching rate is faster than that of the copper foil, the effect of suppressing side etching cannot be obtained, and a circuit cannot be formed. It was. In particular, when Zn which is easily etched was used, it was more disadvantageous for forming a circuit than the blank material.

Claims (7)

An insulating substrate;
A copper foil base formed on the insulating substrate, and a coating layer that covers at least a part of the surface of the copper foil base and includes at least one selected from the group consisting of platinum group metals and gold A copper foil with
A resist formed on the coating layer of the copper foil;
A resist-formed wiring board comprising: The platinum group metal is platinum, palladium, ruthenium, rhodium and / or iridium, and the amount of one or more selected from the group consisting of the platinum group metal and gold is 1-1000 μg / dm ^2. 2. The resist-formed wiring board according to 1. 3. The resist formation according to claim ² , wherein the platinum group metal is platinum and / or palladium, and the amount of at least one selected from the group consisting of the platinum group metal and gold is 10 to 500 μg / dm ^2. Wiring board. 4. The resist-formed wiring board according to claim 3, wherein the adhesion amount of at least one selected from the group consisting of platinum, palladium, and gold is 30 to 350 μg / dm ² .   At least one selected from the group consisting of the platinum group metal and gold is attached to the adhesive surface of the resist after removing the copper foil by immersing it in a ferric chloride solution. The resist formation wiring board in any one of Claims 1-4.   One or more selected from the group consisting of the platinum group metal and gold was attached to the surface of the copper foil by electroless plating or electrolytic plating to form a coating layer, and a resist was formed on the coating layer. 6. A method for manufacturing an electronic circuit, the method comprising: subsequently performing etching to form the resist-formed wiring board according to claim 1.   One or more selected from the group consisting of the platinum group metal and gold on the adhesive surface of the resist-formed wiring board after being dipped and removed from the ferric chloride solution with the copper foil of the resist The method of manufacturing an electronic circuit according to claim 6, wherein