JP2011253851A - Formation method of circuit board for printed wiring board - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a formation method of a circuit board for a printed wiring board that allows a circuit pattern to be formed at a favorable fine pitch.SOLUTION: The formation method of a circuit board for a printed wiring board comprises: a step of preparing a laminate of a resin substrate and a copper foil or a copper layer provided with a coating layer on a surface containing at least one component selected from platinum, palladium and gold where a coating weight of platinum is 1050 μg/dmor less, a coating weight of palladium is 600 μg/dmor less, and a coating weight of gold is 1000 μg/dmor less; a step of forming a resist pattern on a surface of the coating layer of the laminate; a step of treating the surface of the coating layer of the laminate on which the resist pattern is formed with a solution containing at least one component selected from hydrochloric acid, sulfuric acid and nitric acid to dissolve copper oxide contained in the surface of the coating layer in the solution; and a step of etching the surface of the coating layer of the laminate where the copper oxide is dissolved by an etchant containing CuCland HCl.

Description

  The present invention relates to a method for forming a circuit board for printed wiring boards, and more particularly to a method for forming a circuit board for flexible printed wiring boards.

  Printed wiring boards have made great progress over the last half century and are now used in almost all electronic devices. In recent years, with the increasing needs for miniaturization and higher performance of electronic devices, higher density mounting of components and higher frequency of signals have progressed, and conductor patterns have become finer (fine pitch) and higher frequency than printed circuit boards. Response is required.

  In general, a printed wiring board is manufactured through a process in which an insulating substrate is bonded to a copper foil to form a laminate, and then a conductor pattern is formed on the copper foil surface by etching. Therefore, good etching properties are required for the copper foil for printed wiring boards.

  If the copper foil is not subjected to surface treatment on the non-adhesive surface with the resin, the copper portion of the copper foil circuit after etching is etched away from the surface of the copper foil, that is, toward the resin layer. (Sagging). Normally, the angle on the side of the circuit is “sagging”, and when a particularly large “sagging” occurs, the copper circuit may short-circuit near the resin substrate, resulting in a defective product. Here, FIG. 5 shows an enlarged photograph of the circuit surface showing an example in which “sagging” occurs during copper circuit formation and the copper circuit is short-circuited in the vicinity of the resin substrate.

  Such “sag” needs to be reduced as much as possible, but in order to prevent such widening etching failure, the etching time is extended, the etching is increased, and this “sag” is reduced. It is possible to make it. However, in this case, if there is a portion that has already reached the predetermined width dimension, it will be further etched, so that the circuit width of the copper foil portion will be reduced accordingly, and the circuit design will be a uniform target. The line width (circuit width) cannot be obtained, and heat is generated particularly in that portion (thinned portion), and in some cases, there is a problem of disconnection. As the fine patterning of electronic circuits further progresses, the problem due to such etching failure still appears more strongly and still becomes a big problem in circuit formation.

  As a method for improving these, Patent Document 1 discloses a surface treatment in which a metal or alloy layer having an etching rate slower than that of copper is formed on a copper foil on the etching surface side. In this case, the metal or alloy includes Ni, Co, and alloys thereof. In circuit design, the etching solution penetrates from the resist coating side, that is, from the surface of the copper foil, so if there is a metal or alloy layer with a slow etching rate directly under the resist, the etching of the copper foil portion in the vicinity is suppressed. Since the etching of the copper foil portion of the metal film progresses, the “sag” is reduced, and a circuit with a more uniform width can be formed. This makes it possible to form a sharper circuit compared to the prior art, and a great progress has been made. It can be said that there was.

  Further, in Patent Document 2, a Cu thin film having a thickness of 1000 to 10,000 mm is formed, and an Ni thin film having an etching rate slower than that of copper having a thickness of 10 to 300 mm is formed on the Cu thin film.

JP 2002-176242 A JP 2000-269619 A

  In recent years, further miniaturization and higher density of circuits have progressed, and there is a demand for circuits having side surfaces that are more steeply inclined. However, the technique described in Patent Document 1 cannot cope with these.

  Moreover, it is necessary to remove the surface treatment layer described in Patent Document 1 by soft etching, and furthermore, the non-adhesive surface-treated copper foil with the resin is a process of processing into a laminate, and the application of the resin High temperature treatment is applied. This causes oxidation of the surface treatment layer, and as a result, the etching property of the copper foil deteriorates.

  As for the former, it is necessary to reduce the thickness of the surface treatment layer as much as possible in order to shorten the etching removal time as much as possible, and to remove it cleanly. In the latter case, in order to receive heat, The underlying copper layer is oxidized (discolored, so it is commonly called “yake”), due to poor resist coatability (uniformity, adhesion), excessive etching of interfacial oxide during etching, etc. There is a problem that defects such as etching property in pattern etching, short circuit, and controllability of the width of the circuit pattern occur, so that improvement is required or replacement with other materials is required.

  Furthermore, although the surface treatment layer described in Patent Documents 1 and 2 is formed using Ni or Co, Ni or Co may adversely affect electronic devices due to its magnetism.

  For such a problem, the applicant of the present application provided a coating layer containing any one or more of platinum, palladium, and gold at a predetermined metal adhesion amount on the non-bonding surface side with the resin of the copper foil. In that case, it has been found that a circuit having an inclination angle of 80 ° or more on the side surface of the circuit can be formed, and the present invention has been filed as Japanese Patent Application No. 2010-77964. And according to the said invention, providing the copper foil for printed wiring boards with which the etching property in the case of circuit pattern formation is favorable, suitable for fine pitch formation, and the magnetism was suppressed favorably, and a laminated body using the same It states that it can be done.

  Here, in general, a method for manufacturing a circuit for a printed wiring board is to obtain a resist pattern on the surface of a copper foil or a copper layer, and then spray an etching solution containing cupric chloride and hydrochloric acid by spraying to form a resist pattern. The circuit is obtained by melting the exposed copper part. Etching is also performed for circuit formation on a laminate including a copper foil or a copper layer containing a coating layer according to the invention filed as the above-mentioned Japanese Patent Application No. 2010-77964, but on the characteristics of the coating layer, The etching method has a greater influence on the shape of the circuit pattern to be formed than a general laminate. For this reason, in order to form a circuit having a good fine pitch, an optimum rule for the etching method is particularly required.

  Then, this invention makes it a subject to provide the formation method of the circuit board for printed wiring boards which can form a circuit pattern with a favorable fine pitch.

  As a result of intensive studies, the present inventors have determined that a copper foil or a copper foil provided with a coating amount containing at least one of platinum, palladium, and gold on the non-adhesive surface side with the resin substrate at a predetermined metal adhesion amount or For the laminated body having a copper layer, the initial etching property of the copper foil or the copper layer is improved by removing the surface treatment element such as palladium from the portion exposed between the resists in advance before etching. I found. That is, by providing a step of dissolving the copper oxide contained in the surface of the coating layer in the acid between the step of forming the resist and the step of etching, the copper oxide is dissolved from the coating layer together with the dissolution of the copper oxide. It has been found that the surface treatment element can be removed, whereby the initial etching property of the copper foil or the copper layer is improved, and a circuit pattern having good linearity can be obtained. According to such a technique, it is possible to form a circuit that can sufficiently cope with the recent miniaturization and high density of the circuit.

The present invention completed on the basis of the above knowledge includes, in one aspect, at least one of platinum, palladium, and gold, an adhesion amount of platinum of 1050 μg / dm ² or less, and an adhesion amount of palladium of 600 μg / dm 2. ² or less, a step of preparing a laminate of a copper foil or a copper layer having a coating layer with a gold adhesion amount of 1000 μg / dm ² or less on the surface and a resin substrate, and a resist pattern on the surface of the coating layer of the laminate And the coating layer surface of the laminate on which the resist pattern is formed is treated with a solution containing at least one of hydrochloric acid, sulfuric acid and nitric acid, and the copper oxide contained on the coating layer surface is dissolved in the solution. a step of the coating layer surface of the laminate obtained by dissolving copper oxide, the method of forming the printed wiring board for a circuit board which includes the step of etching using an etching solution containing CuCl ₂ and HCl A.

In one embodiment of the method for forming a circuit board for a printed wiring board according to the present invention, the adhesion amount of platinum in the coating layer is 20 to 400 μg / dm ² , the adhesion amount of palladium is 20 to 250 μg / dm ² , and the adhesion of gold The amount is 20 to 400 μg / dm ² .

In another embodiment of the method for forming a circuit board for a printed wiring board according to the present invention, the adhesion amount of platinum in the coating layer is 50 to 300 μg / dm ² , the adhesion amount of palladium is 30 to 180 μg / dm ² , gold The adhesion amount is 50 to 300 μg / dm ² .

In still another embodiment of the method for forming a circuit board for a printed wiring board according to the present invention, the etching solution is 1.5 to 4.0 mol / L of CuCl ₂ and 1.0 to 5.0 mol of HCl. The ratio [HCl] / [CuCl ₂ ] of the hydrochloric acid concentration [HCl] and the cupric chloride concentration [CuCl ₂ ] in the etching solution is 3.0 or less.

  In yet another embodiment of the method for forming a printed wiring board circuit board according to the present invention, the copper foil or copper layer of the laminate is formed in a cross-sectional shape in a cross-sectional shape by the etching step, and the coating layer of the copper foil or copper layer is formed. When W1 is the widest circuit width in the range of 1 μm depth from the side surface, and W2 is the circuit width when the circuit width is the narrowest in the entire circuit cross section at a position deeper than 1 μm from the surface, 0.7 A circuit satisfying ≦ W2 / W1 ≦ 1.0 is formed.

  ADVANTAGE OF THE INVENTION According to this invention, the formation method of the circuit board for printed wiring boards which can form a circuit pattern with a favorable fine pitch can be provided.

It is sectional drawing of the copper foil in the case of a pickling process, a coating layer, and a resist. It is the outline | summary of the calculation method of the etching factor (EF) using the surface photograph of a part of circuit pattern, the schematic diagram of the cross section of the width direction of the circuit pattern in the said part, and this schematic diagram. 42 is a photograph showing a circuit formed according to Example 40 and a cross section thereof. 10 is a photograph showing a circuit formed by Comparative Example 52. It is an enlarged photograph of the circuit surface which shows the example which produced "sagging" at the time of copper circuit formation, and the copper circuit short-circuited in the resin substrate vicinity.

(Copper foil base material)
Although there is no restriction | limiting in particular in the form of the copper foil base material which can be used for this invention, Typically, it can use with the form of rolled copper foil or electrolytic copper foil. In general, the electrolytic copper foil is produced by electrolytic deposition of copper from a copper sulfate plating bath onto a drum of titanium or stainless steel, and the rolled copper foil is produced by repeating plastic working and heat treatment with a rolling roll. Rolled copper foil is often used for applications that require flexibility.
In addition to high-purity copper such as tough pitch copper and oxygen-free copper, which are usually used as conductor patterns for printed wiring boards, for example, Sn-containing copper, Ag-containing copper, Cr, Zr or Mg are added as the copper foil base material. It is also possible to use a copper alloy such as a copper alloy, a Corson copper alloy to which Ni, Si and the like are added. In addition, when the term “copper foil” is used alone in this specification, a copper alloy foil is also included.

  There is no restriction | limiting in particular also about the thickness of the copper foil base material which can be used for this invention, What is necessary is just to adjust to the thickness suitable for printed wiring boards suitably. For example, it can be set to about 5 to 100 μm. However, for the purpose of forming a fine pattern, it is 30 μm or less, preferably 20 μm or less, and typically about 5 to 20 μm.

  Although the copper foil base material used for this invention is not specifically limited, For example, you may use what does not perform a roughening process. Conventionally, the surface is generally roughened by special plating with irregularities on the order of μm, and the physical anchor effect provides adhesion to the resin. A smooth foil is considered to have good characteristics, and a roughened foil may work in a disadvantageous direction. Moreover, since the roughening process process is abbreviate | omitted if it does not perform a roughening process, there exists an effect of economical efficiency and productivity improvement.

(Configuration of coating layer)
A coating layer is formed on at least a part of the surface of the copper foil base opposite to the surface to be bonded to the insulating substrate (circuit formation planned surface side). The coating layer contains at least one of platinum, palladium, and gold. If the coating layer is composed of platinum, the amount of deposition of platinum is at 1050μg / dm ² or less, more preferably from 20~400μg / dm ^2, further that a 50~300μg / dm ² from preferable. When the coating layer is made of palladium, the adhesion amount of palladium is 600 μg / dm ² or less, more preferably ²⁰ to 250 μg / dm ² , and even more preferably 30 to 180 μg / dm ^2. preferable. When the coating layer is made of gold, the adhesion amount of gold is 1000 μg / dm ² or less, more preferably ²⁰ to 400 μg / dm ² , and even more preferably 50 to 300 μg / dm ^2. preferable. Adhesion amount of platinum coating layer 1050μg / dm ^2, the coating layer coating weight of 600 [mu] g / dm ² of palladium, and, when the amount of deposition of the gold of the coating layer is more than 1000 [mu] g / dm ^2, adverse effect on the initial etching of respectively Effect. Further, if the amount of the coating layer attached is large, it does not sufficiently diffuse with copper due to thermal history such as when bonding polyimide, and the effect of improving the initial etching property with the pickling solution cannot be sufficiently obtained.

(Manufacturing method of copper foil)
The copper foil for printed wiring boards according to the present invention can be formed by a sputtering method. That is, at least a part of the surface of the copper foil base material is coated with the coating layer by a sputtering method. Specifically, a coating layer made of one selected from the group consisting of a platinum group metal, gold, and silver having an etching rate lower than that of copper is formed on the etching surface side of the copper foil by sputtering. The coating layer is not limited to the sputtering method, and may be formed by, for example, a wet plating method such as electroplating or electroless plating.

(Printed wiring board manufacturing method)
A printed wiring board (PWB) can be manufactured according to a conventional method using the copper foil according to the present invention. Below, the example of the manufacturing method of a printed wiring board is shown.

  First, a laminated body is manufactured by bonding a copper foil and an insulating substrate. The insulating substrate on which the copper foil is laminated is not particularly limited as long as it has characteristics applicable to a printed wiring board. For example, paper base phenolic resin, paper base epoxy resin, synthetic fiber for rigid PWB Use cloth base epoxy resin, glass cloth / paper composite base epoxy resin, glass cloth / glass non-woven composite base epoxy resin, glass cloth base epoxy resin, etc., use polyester film, polyimide film, etc. for FPC I can do things.

  In the case of the rigid PWB, a prepreg is prepared by impregnating a base material such as a glass cloth with a resin and curing the resin to a semi-cured state. It can be carried out by superposing a copper foil on the prepreg from the opposite surface of the coating layer and heating and pressing.

  In the case of a flexible printed wiring board (FPC), a polyimide film or a polyester film and a copper foil can be bonded using an epoxy or acrylic adhesive (three-layer structure). In addition, as a method without using an adhesive (two-layer structure), a polyimide varnish (polyamic acid varnish), which is a polyimide precursor, is applied to a copper foil and heated to form an imidization or on a polyimide film. There is a laminating method in which a thermoplastic polyimide is applied to the substrate, a copper foil is overlaid thereon, and heated and pressed. In the casting method, it is also effective to apply an anchor coating material such as thermoplastic polyimide in advance before applying the polyimide varnish.

  The laminate according to the present invention can be used for various printed wiring boards (PWB) and is not particularly limited. For example, from the viewpoint of the number of layers of the conductor pattern, the single-sided PWB, double-sided PWB, and multilayer PWB ( It is applicable to rigid PWB, flexible PWB (FPC), and rigid flex PWB from the viewpoint of the type of insulating substrate material. Further, the laminate according to the present invention is not limited to the above-described copper-clad laminate obtained by attaching a copper foil to a resin, and is a metalizing material in which a copper layer is formed on the resin by sputtering or plating. Also good.

A resist is applied to the surface of the coating layer formed on the copper foil of the laminate produced as described above, the pattern is exposed with a mask, and developed to form a resist pattern. Next, the surface of the coating layer of the laminate on which the resist pattern is formed is pickled with a solution containing one or more of hydrochloric acid, sulfuric acid, and nitric acid. At this time, as shown in FIG. 1, the copper foil diffused in the coating layer or the copper oxide from the copper layer is dissolved in the pickling solution. The copper oxide constitutes an alloy with the surrounding noble metal in the coating layer. For this reason, when a copper oxide melt | dissolves, a noble metal will also fall from a coating layer in connection with it. Accordingly, in the subsequent etching step, the precious metal has fallen to some extent from the portion of the coating layer that is already desired to be removed, so that the initial etching property is good.
The optimum concentration of hydrochloric acid, sulfuric acid, and nitric acid used in the pickling treatment varies depending on the subsequent etching conditions. If the concentration is too high, the coating layer directly under the resist may be eroded. For this reason, for example, when the circuit is immersed in an etching solution and etching is performed for several minutes, it is preferable to use a solution having a concentration of about 2N or less. However, a solution having a higher concentration may be used when etching is performed in a short time by a spray method, or by adjusting another etching method or etching time.
Subsequently, the pickled laminate is immersed in an etching solution. At this time, the coating layer composed of one type selected from the group consisting of platinum group metal, gold, and silver that suppresses etching is located near the resist portion on the copper foil, and etching of the copper foil on the resist side In this case, the etching of the copper circuit pattern proceeds substantially vertically by the etching of the copper away from the coating layer at a rate faster than the rate at which the vicinity of the coating layer is etched. Thus, unnecessary portions of copper can be removed, and then the etching resist can be peeled and removed to expose the circuit pattern. Further, the copper oxide is eluted from the surface of the coating layer by the pickling treatment before the etching step, so that the noble metal has already fallen off. Therefore, the initial etching property is very good, and a circuit pattern with good linearity can be easily formed.
With respect to the etching solution used for forming the circuit pattern on the laminate, the etching rate of the coating layer is sufficiently smaller than that of copper, so that the etching factor is improved. The etching solution contains CuCl ₂ and HCl. Since the copper foil or copper layer to be etched according to the present invention is greatly affected by the composition of the etching solution due to its characteristics, the concentration of CuCl ₂ and HCl in the etching solution is controlled within the optimum range. Is preferred. Specifically, the etchant contains 1.5 to 4.0 mol / L of CuCl ₂ and 1.0 to 5.0 mol / L of HCl, and the concentration [HCl] of hydrochloric acid in the etchant; The ratio [HCl] / [CuCl ₂ ] to the cupric chloride concentration [CuCl ₂ ] is preferably 3.0 or less. When the concentration of CuCl ₂ is less than 1.5 mol / L, it is difficult to perform etching sufficiently. When the concentration of CuCl ₂ is more than 4.0 mol / L, the solubility of CuCl ₂ is exceeded, causing a problem that CuCl ₂ is precipitated in the liquid. HCl is added to dissolve the hardly soluble cuprous chloride produced by the reaction during etching. When the concentration of HCl is less than 1.0 mol / L, it is insufficient to dissolve poorly soluble cuprous chloride satisfactorily. When the concentration of HCl exceeds 5.0 mol / L, side etching of the circuit surface portion during etching is promoted, and “sag” is likely to occur. Furthermore, the interface between the copper foil or the copper layer and the resist pattern is broken by an acid, and the resist is peeled off during the etching, which increases the possibility of defective etching. Further, the ratio [HCl] / [CuCl ₂ ] between [HCl] and [CuCl ₂ ] in the etching solution is 3.0 or less for the same reason. [HCl] / [CuCl ₂ ] is more preferably 0.8 to 2.5.

(Circuit shape on the copper foil surface of the printed wiring board)
In general, the circuit on the copper foil surface of the printed wiring board formed by etching is not formed so that the two long sides of the circuit board are perpendicular to the insulating substrate, but usually faces downward from the surface of the copper foil. That is, it is formed to spread toward the resin layer (sagging). Thus, the two long side surfaces each have an inclination angle θ with respect to the surface of the insulating substrate. It is important to reduce the circuit pitch as much as possible for miniaturization (fine pitch) of the circuit pattern that is currently required. However, if this inclination angle θ is small, the sagging increases accordingly, The pitch becomes wider. In addition, the inclination angle θ is usually not completely constant in each circuit and circuit. If the variation in the inclination angle θ is large, the circuit quality may be adversely affected. Therefore, the circuit on the copper foil surface of the printed wiring board formed by etching has two long side surfaces each having an inclination angle θ of 70 to 90 ° with respect to the surface of the insulating substrate, and within the same circuit. It is desirable that the standard deviation of tan θ is 1.0 or less. The etching factor is preferably 3.5 or more, and more preferably 4.5 or more when the circuit pitch is 50 μm or less.

  In the circuit on the surface of the copper foil of the printed wiring board formed by etching from the coating layer side as described above, the noble metal of the coating layer is excellent in corrosion resistance, and therefore side etching in the vicinity of the interface between the resist and the copper foil is suppressed. Therefore, in the range of 1 μm depth from the surface on the coating layer forming side of the wiring circuit, the circuit top has the largest circuit width. For this reason, the circuit width is relatively narrower than the circuit top at the lower side. Therefore, the wiring circuit does not have the narrowest circuit width at the circuit top in the thickness direction of the circuit. If the narrowest width is less than 50% of the circuit width of the circuit top, the circuit becomes a thin circuit in the thickness direction of the circuit, which may adversely affect electrical characteristics. As described above, in the cross-sectional form of the circuit, the widest circuit width in the range of 1 μm depth from the surface of the copper foil or copper layer on which the coating layer is formed is W1, and the position where the circuit width is the narrowest in the entire circuit cross section is the surface It is preferable that 0.7 ≦ W2 / W1 ≦ 1.0 is satisfied when the circuit width at this time is W2, which is deeper than 1 μm. W1 and W2 more preferably satisfy 0.8 ≦ W2 / W1 ≦ 1.0.

  EXAMPLES Examples of the present invention will be described below, but these are provided for better understanding of the present invention and are not intended to limit the present invention.

(Example 1: Examples 1 to 51)
(Formation of coating layer on copper foil or copper layer)
As copper foil base materials of Examples 1-42 and 49-51, rolled copper foil (C1100 made by Nikko Metal) having a thickness of 8 or 17 μm was prepared. The surface roughness (Rz) of the rolled copper foil was 0.7 μm. Moreover, as a copper foil base material of Examples 43 to 48, a metalizing CCL having a thickness of 3 μm (Nikko Metal Macinas, copper layer side Ra 0.01 μm, tie coat layer metal adhesion amount Ni 1780 μg / dm ² , Cr 360 μg / dm ² ) Was prepared.

The thin oxide film adhering to the surface of the copper foil was removed by reverse sputtering, and a target of Au, Pt and / or Pd was sputtered with the following apparatus and conditions to form a coating layer. The thickness of the coating layer was changed by adjusting the film formation time. The simple substance of the various metals used for sputtering used the thing of purity 3N.
-Equipment: Batch type sputtering equipment (ULVAC, Model MNS-6000)
・ Achieving vacuum: 1.0 × 10 ⁻⁵ Pa
・ Sputtering pressure: 0.2 Pa
・ Reverse sputtering power: 100W
・ Sputtering power: 50W
Film formation rate: About 0.2 μm of film was formed for each target for a fixed time, the thickness was measured with a three-dimensional measuring device, and the sputtering rate per unit time was calculated.

The thin oxide film previously attached to the copper foil substrate surface under the following conditions is removed by reverse sputtering on the copper foil substrate surface on the opposite side of the surface on which the coating layer is formed, and Ni and Cr alone are removed. A Ni layer and a Cr layer were sequentially formed by sputtering a layer target. The thicknesses of the Ni layer and the Cr layer were changed by adjusting the film formation time.
-Equipment: Batch type sputtering equipment (ULVAC, Model MNS-6000)
・ Achieving vacuum: 1.0 × 10 ⁻⁵ Pa
・ Sputtering pressure: 0.2 Pa
・ Reverse sputtering power: 100W
·target:
For Ni layer = Ni (purity 3N)
For Cr layer = Cr (purity 3N)
・ Sputtering power: 50W
Film formation rate: About 0.2 μm of film was formed for each target for a fixed time, the thickness was measured with a three-dimensional measuring device, and the sputtering rate per unit time was calculated.

A polyimide film was bonded to the Ni layer and Cr layer forming side surface of the copper foil base material by the following procedure.
(1) Using an applicator on a copper foil of 7 cm × 7 cm, Ube Industries-made U varnish-A (polyimide varnish) was applied to a dry body to a thickness of 25 μm.
(2) The resin-coated copper foil obtained in (1) is dried at 130 ° C. for 30 minutes in an air dryer.
(3) Imidization at 350 ° C. for 30 minutes in a high-temperature heating furnace with a nitrogen flow rate set to 10 L / min.

<Measurement of adhesion amount>
The adhesion amount of Au, Pd, and Pt in the coating layer was measured by atomic absorption spectrometry by dissolving the surface-treated copper foil sample with aqua regia, diluting the solution.

(Circuit shape by pickling and etching)
10 circuits are printed on the surface on which the coating layer of the copper foil is formed by applying a photosensitive resist and an exposure process, the surface of the coating layer is pickled, and an etching process for removing unnecessary portions of the copper foil is performed as follows. Conducted under conditions.

<Pickling conditions>
・ Acid to be used: hydrochloric acid, sulfuric acid, nitric acid ・ Pickling time: 10 to 50 seconds

<Etching conditions>
Etching was performed by dipping in a circuit etching solution fixed on a plate and stirring the solution in a bath.
The etching solution was prepared by dissolving the following chemicals in pure water.
· CuCl ₂ (anhydrous or dihydrate): 1.5~4.0mol / L
HCl: 1.0-5.0 mol / L
・ Liquid temperature: 50 ℃
(50 μm pitch circuit formation)
・ Resist L / S = 33μm / 17μm
-Finished circuit bottom (bottom) width: 25 μm
Etching time: 20 to 350 seconds (30 μm pitch circuit formation)
・ Resist L / S = 25μm / 5μm
-Finished circuit bottom (bottom) width: 15 μm
-Etching time: 30 to 400 seconds-Confirmation of etching end point: Etching was carried out at several levels by changing the time, and it was confirmed by an optical microscope that no copper remained between the circuits.
After the etching, the resist was peeled off by dipping in a 45 ° C. aqueous NaOH solution (100 g / L) for 1 minute.

<Etching factor measurement conditions>
The etching factor is the distance of the length of sagging from the intersection of the vertical line from the upper surface of the copper foil and the resin substrate, assuming that the circuit is etched vertically when sagging at the end (when sagging occurs) Is a ratio of a to the thickness b of the copper foil: b / a, and the larger the value, the larger the inclination angle, and the etching residue does not remain and the sagging is small. It means to become. FIG. 2 shows a surface photograph of a part of the circuit pattern, a schematic diagram of a cross section in the width direction of the circuit pattern in the part, and an outline of an etching factor calculation method using the schematic diagram. This a was measured by SEM observation from above the circuit, and the etching factor (EF = b / a) was calculated. By using this etching factor, it is possible to easily determine whether the etching property is good or bad. Furthermore, the inclination angle θ was calculated by calculating the arc tangent using a and the thickness b of the copper foil measured in the above procedure. The measurement range was a circuit length of 600 μm, and an etching factor of 12 points, its standard deviation, and an average value of the inclination angle θ were adopted as a result.

  The cross section of the circuit formed by the above procedure was processed with a cross-section sample preparation device SM-09010 manufactured by JEOL Ltd. From the SEM photograph of the circuit cross section, the widest circuit width W1 (μm) in the range of 1 μm depth from the surface on the coating layer forming side of three arbitrarily selected circuits, and the narrowest circuit width W2 (μm) in the entire circuit cross section. ) And the average value of these was calculated. In addition, W2 / W1 was calculated using the average value.

(Example 2: Comparative Examples 52 to 69)
A rolled copper foil having a thickness of 8 or 17 μm was prepared, and a polyimide film was bonded in the same procedure as in Example 1. Next, each layer of Au, Pd and / or Pt was formed on the copper foil surface by sputtering in the same manner as in Example 1, and after pickling, a circuit was formed by etching.

(Example 3: Comparative Examples 70-81)
As Comparative Examples 70 to 73 and 78 to 81 (blank materials), rolled copper foils having a thickness of 8 μm or 17 μm were prepared, and polyimide films were bonded in the same procedure as in Example 1, respectively. Next, 10 circuits were printed on the opposite surface by a photosensitive resist coating and exposure process, and after pickling, an etching process for removing unnecessary portions of the copper foil was performed. Further, as Comparative Examples 74 to 77, 9 μm thick electrolytic copper foil was prepared, Ni and Co alloy layers were formed under the following plating conditions, and a circuit was formed by etching.
(Ni, Co alloy plating)
・ Co: 1-20g / L
・ Ni: 1-20g / L
-Temperature: Room temperature to 60 ° C
・ Current density: DK: 1 to 15 A / dm ²
-Time: 1 to 10 seconds Tables 1 to 4 show the measurement conditions and measurement results of Examples 1 to 3.

  As shown in FIG. 3B, the cross-sectional shape of the circuit is not exactly a trapezoid whose hypotenuse is a straight line. In the table, the inclination angles of the circuits of the example and the comparative example are described, but this is a value calculated by the definition formula shown in FIG.

(Evaluation)
(Examples 1 to 51)
In each of Examples 1 to 51, the etching factor was large and there was no variation, and a circuit having a cross section close to a rectangular shape could be formed.
In particular, in Examples 40 to 48, since the circuit was formed in a substantially rectangular shape in a circuit with a pitch of 50 μm, no tailing was seen from the upper surface, and the etching factor could not be calculated.
In Examples 46 to 48, [HCl] / [CuCl ₂ ] is more than 3, but in these cases, since the copper layer is as thin as 3 μm, a desired circuit shape can be obtained even if the hydrochloric acid concentration is high. I was able to.
FIG. 3 shows a photograph of a circuit formed according to Example 40 and a cross-sectional photograph thereof.

(Comparative Examples 52-81)
In Comparative Examples 52, 56 and 60, the pickling treatment was not performed, and the initial etching property was poor (the standard deviation of the etching factor was large).
In Comparative Examples 53 to 55, 57 to 59, and 61 to 63, the acid concentration of the pickling was high, and the resist was peeled off during the pickling treatment, so that a desired circuit could not be formed. In this comparative example, the acid concentration of pickling was as high as 3.0 N, and it was evaluated that it was not an appropriate concentration. However, the acid concentration of pickling was only the pickling time and the composition of the coating layer to be etched. It does not indicate that 3.0N is too high in all cases because it is related to the etching conditions and the like.
In Comparative Examples 64 to 69, the amount of precious metal deposited was large and the initial etching property was poor (the standard deviation of the etching factor was large).
Comparative Examples 70-81 each had an etching factor lower than that of the Example.
Here, as an example, FIG. 4 shows a photograph of a circuit formed in Comparative Example 52.

Claims (5)

Platinum, palladium, and includes any one or more of gold, the adhesion amount of platinum 1050μg / dm ² or less, the adhesion amount of palladium 600 [mu] g / dm ² or less, the adhesion amount of gold is 1000 [mu] g / dm ² or less A step of preparing a laminate of a copper foil or a copper layer provided with a coating layer on the surface and a resin substrate;
Forming a resist pattern on the coating layer surface of the laminate;
Treating the coating layer surface of the laminate formed with the resist pattern with a solution containing one or more of hydrochloric acid, sulfuric acid and nitric acid, and dissolving the copper oxide contained in the coating layer surface in the solution;
Etching the coating layer surface of the laminate in which the copper oxide is dissolved using an etchant containing CuCl ₂ and HCl;
A method for forming a circuit board for a printed wiring board comprising: ^2. The printed wiring board according to claim 1, wherein an adhesion amount of platinum in the coating layer is 20 to 400 μg / dm ² , an adhesion amount of palladium is 20 to 250 μg / dm ² , and an adhesion amount of gold is 20 to 400 μg / dm ^2. Circuit board forming method. 3. The printed wiring board according to claim ² , wherein an adhesion amount of platinum in the coating layer is 50 to 300 μg / dm ² , an adhesion amount of palladium is 30 to 180 μg / dm ² , and an adhesion amount of gold is 50 to 300 μg / dm ^2. Circuit board forming method. The etching solution contains 1.5 to 4.0 mol / L of CuCl ₂ and 1.0 to 5.0 mol / L of HCl, and the concentration [HCl] of hydrochloric acid in the etching solution and second chloride 4. The method for forming a circuit board for a printed wiring board according to claim 1, wherein the ratio [HCl] / [CuCl ₂ ] to the copper concentration [CuCl ₂ ] is 3.0 or less.   By the etching step, the widest circuit width in the range of 1 μm depth from the surface of the coating layer forming side of the copper foil or copper layer is defined as W1 in the cross-sectional shape of the copper foil or copper layer of the laminate. 5. A circuit satisfying 0.7 ≦ W2 / W1 ≦ 1.0 is formed, where W2 is a circuit width when the circuit width is the narrowest in the entire circuit cross section at a position deeper than 1 μm. A method for forming a printed wiring board circuit board according to any one of the above.