JP5349775B2 - メモリコントローラ及びその制御方法 - Google Patents
メモリコントローラ及びその制御方法 Download PDFInfo
- Publication number
- JP5349775B2 JP5349775B2 JP2007233377A JP2007233377A JP5349775B2 JP 5349775 B2 JP5349775 B2 JP 5349775B2 JP 2007233377 A JP2007233377 A JP 2007233377A JP 2007233377 A JP2007233377 A JP 2007233377A JP 5349775 B2 JP5349775 B2 JP 5349775B2
- Authority
- JP
- Japan
- Prior art keywords
- memory
- request
- access request
- wiring delay
- register
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Landscapes
- Memory System (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2007233377A JP5349775B2 (ja) | 2007-09-07 | 2007-09-07 | メモリコントローラ及びその制御方法 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2007233377A JP5349775B2 (ja) | 2007-09-07 | 2007-09-07 | メモリコントローラ及びその制御方法 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2009064360A JP2009064360A (ja) | 2009-03-26 |
| JP2009064360A5 JP2009064360A5 (enExample) | 2010-08-26 |
| JP5349775B2 true JP5349775B2 (ja) | 2013-11-20 |
Family
ID=40558878
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2007233377A Active JP5349775B2 (ja) | 2007-09-07 | 2007-09-07 | メモリコントローラ及びその制御方法 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP5349775B2 (enExample) |
Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP5393289B2 (ja) * | 2009-06-24 | 2014-01-22 | キヤノン株式会社 | メモリ制御回路、メモリシステム及び制御方法 |
| JP5393270B2 (ja) * | 2009-06-09 | 2014-01-22 | キヤノン株式会社 | メモリ制御回路、メモリシステム及び制御方法 |
| US8707002B2 (en) | 2009-06-09 | 2014-04-22 | Canon Kabushiki Kaisha | Control apparatus |
| JP5448595B2 (ja) * | 2009-06-18 | 2014-03-19 | キヤノン株式会社 | 制御装置及び制御方法 |
| JP7197998B2 (ja) | 2018-05-02 | 2022-12-28 | キヤノン株式会社 | メモリコントローラおよびメモリコントローラで実施される方法 |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4019056B2 (ja) * | 2004-02-25 | 2007-12-05 | エヌイーシーコンピュータテクノ株式会社 | リードリクエスト調停制御システム及びその方法 |
| US7222224B2 (en) * | 2004-05-21 | 2007-05-22 | Rambus Inc. | System and method for improving performance in computer memory systems supporting multiple memory access latencies |
-
2007
- 2007-09-07 JP JP2007233377A patent/JP5349775B2/ja active Active
Also Published As
| Publication number | Publication date |
|---|---|
| JP2009064360A (ja) | 2009-03-26 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US7743202B2 (en) | Command controller, prefetch buffer and methods for accessing a serial flash in an embedded system | |
| US8499127B2 (en) | Memory hub with internal cache and/or memory access prediction | |
| US6298424B1 (en) | Computer system including priorities for memory operations and allowing a higher priority memory operation to interrupt a lower priority memory operation | |
| US8707002B2 (en) | Control apparatus | |
| JP5188134B2 (ja) | メモリアクセス制御装置及びメモリアクセス制御方法 | |
| JP2003150574A (ja) | マイクロコンピュータ | |
| JP5349775B2 (ja) | メモリコントローラ及びその制御方法 | |
| US20140344512A1 (en) | Data Processing Apparatus and Memory Apparatus | |
| JP2011081553A (ja) | 情報処理装置及びその制御方法 | |
| US20090235026A1 (en) | Data transfer control device and data transfer control method | |
| JP3505728B2 (ja) | 記憶制御装置 | |
| US20060195665A1 (en) | Access control device, method for changing memory addresses, and memory system | |
| US20120310621A1 (en) | Processor, data processing method thereof, and memory system including the processor | |
| US5235694A (en) | Multi i/o device system using temporary store of ram data when associated communicating i/o devices are operating at various clocking phases | |
| JP2002288117A (ja) | 同期型メモリに対するフライバイ転送を可能にするdma制御システム | |
| US20050174857A1 (en) | Nonvolatile memory controlling method and nonvolatile memory controlling apparatus | |
| US6356976B1 (en) | LSI system capable of reading and writing at high speed | |
| US20090276553A1 (en) | Controller, hard disk drive and control method | |
| US6269430B1 (en) | Method for controlling a process of writing data sent by a central processing unit to a memory by using a central processing unit interface | |
| US6629262B1 (en) | Multiplexed storage controlling device | |
| JP2000227895A (ja) | 画像データ転送装置および画像データ転送方法 | |
| US7395399B2 (en) | Control circuit to enable high data rate access to a DRAM with a plurality of areas | |
| JP5448595B2 (ja) | 制御装置及び制御方法 | |
| JP2006146817A (ja) | メモリ制御システム及びメモリ制御装置 | |
| US20070073961A1 (en) | Memory controller |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20100709 |
|
| A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20100709 |
|
| A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20120925 |
|
| A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20121009 |
|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20121207 |
|
| A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20130507 |
|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20130704 |
|
| TRDD | Decision of grant or rejection written | ||
| A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20130722 |
|
| A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20130821 |
|
| R151 | Written notification of patent or utility model registration |
Ref document number: 5349775 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R151 |